X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fia32%2Fia32_emitter.c;h=21bd11ad5868f8dcd7dfe93b7532ee47b34ca415;hb=7c4e33eb7648d9e1cc7efcffc8682a2f27a570a3;hp=7d8dc2c920e799d96b6afe6c950cba609f04e8cc;hpb=4f703c39410d888618a3b8dcc26081d0611a8f4f;p=libfirm diff --git a/ir/be/ia32/ia32_emitter.c b/ir/be/ia32/ia32_emitter.c index 7d8dc2c92..21bd11ad5 100644 --- a/ir/be/ia32/ia32_emitter.c +++ b/ir/be/ia32/ia32_emitter.c @@ -1,8 +1,27 @@ +/* + * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved. + * + * This file is part of libFirm. + * + * This file may be distributed and/or modified under the terms of the + * GNU General Public License version 2 as published by the Free Software + * Foundation and appearing in the file LICENSE.GPL included in the + * packaging of this file. + * + * Licensees holding valid libFirm Professional Edition licenses may use + * this file in accordance with the libFirm Commercial License. + * Agreement provided with the Software. + * + * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE + * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE. + */ + /** * @file - * @brief This file implements the node emitter. - * @author Christian Wuerdig, Matthias Braun - * @version $Id$ + * @brief This file implements the ia32 node emitter. + * @author Christian Wuerdig, Matthias Braun + * @version $Id$ */ #ifdef HAVE_CONFIG_H #include "config.h" @@ -23,6 +42,7 @@ #include "execfreq.h" #include "error.h" #include "raw_bitset.h" +#include "dbginfo.h" #include "../besched_t.h" #include "../benode_t.h" @@ -31,6 +51,7 @@ #include "../beemitter.h" #include "../begnuas.h" #include "../beirg_t.h" +#include "../be_dbgout.h" #include "ia32_emitter.h" #include "gen_ia32_emitter.h" @@ -38,6 +59,7 @@ #include "ia32_nodes_attr.h" #include "ia32_new_nodes.h" #include "ia32_map_regs.h" +#include "ia32_architecture.h" #include "bearch_ia32_t.h" DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;) @@ -46,16 +68,19 @@ DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;) #define SNPRINTF_BUF_LEN 128 +static const arch_env_t *arch_env; +static const ia32_isa_t *isa; +static ia32_code_gen_t *cg; +static int do_pic; +static char pic_base_label[128]; + /** * Returns the register at in position pos. */ -static -const arch_register_t *get_in_reg(ia32_emit_env_t *env, const ir_node *irn, - int pos) +static const arch_register_t *get_in_reg(const ir_node *irn, int pos) { - const arch_env_t *arch_env = env->arch_env; - ir_node *op; - const arch_register_t *reg = NULL; + ir_node *op; + const arch_register_t *reg = NULL; assert(get_irn_arity(irn) > pos && "Invalid IN position"); @@ -67,8 +92,11 @@ const arch_register_t *get_in_reg(ia32_emit_env_t *env, const ir_node *irn, assert(reg && "no in register found"); - /* in case of a joker register: just return a valid register */ - if (arch_register_type_is(reg, joker)) { + if(reg == &ia32_gp_regs[REG_GP_NOREG]) + panic("trying to emit noreg for %+F input %d", irn, pos); + + /* in case of unknown register: just return a valid register */ + if (reg == &ia32_gp_regs[REG_GP_UKNWN]) { const arch_register_req_t *req; /* ask for the requirements */ @@ -90,11 +118,8 @@ const arch_register_t *get_in_reg(ia32_emit_env_t *env, const ir_node *irn, /** * Returns the register at out position pos. */ -static -const arch_register_t *get_out_reg(ia32_emit_env_t *env, const ir_node *irn, - int pos) +static const arch_register_t *get_out_reg(const ir_node *irn, int pos) { - const arch_env_t *arch_env = env->arch_env; ir_node *proj; const arch_register_t *reg = NULL; @@ -104,6 +129,7 @@ const arch_register_t *get_out_reg(ia32_emit_env_t *env, const ir_node *irn, /* Proj with the corresponding projnum for the register */ if (get_irn_mode(irn) != mode_T) { + assert(pos == 0); reg = arch_get_irn_register(arch_env, irn); } else if (is_ia32_irn(irn)) { reg = get_ia32_out_reg(irn, pos); @@ -124,75 +150,11 @@ const arch_register_t *get_out_reg(ia32_emit_env_t *env, const ir_node *irn, return reg; } -/** - * Returns an ident for the given tarval tv. - */ -static -ident *get_ident_for_tv(tarval *tv) { - char buf[256]; - tarval_snprintf(buf, sizeof(buf), tv); - return new_id_from_str(buf); -} - -/** - * Determine the gnu assembler suffix that indicates a mode - */ -static -char get_mode_suffix(const ir_mode *mode) { - if(mode_is_float(mode)) { - switch(get_mode_size_bits(mode)) { - case 32: - return 's'; - case 64: - return 'l'; - case 80: - return 't'; - } - } else { - assert(mode_is_int(mode) || mode_is_reference(mode)); - switch(get_mode_size_bits(mode)) { - case 64: - return 'q'; - case 32: - return 'l'; - case 16: - return 'w'; - case 8: - return 'b'; - } - } - panic("Can't output mode_suffix for %+F\n", mode); -} - -static -int produces_result(const ir_node *node) { - return !(is_ia32_St(node) || - is_ia32_Store8Bit(node) || - is_ia32_CondJmp(node) || - is_ia32_xCondJmp(node) || - is_ia32_CmpSet(node) || - is_ia32_xCmpSet(node) || - is_ia32_SwitchJmp(node)); -} - -static -const char *ia32_get_reg_name_for_mode(ia32_emit_env_t *env, ir_mode *mode, - const arch_register_t *reg) { - switch(get_mode_size_bits(mode)) { - case 8: - return ia32_get_mapped_reg_name(env->isa->regs_8bit, reg); - case 16: - return ia32_get_mapped_reg_name(env->isa->regs_16bit, reg); - default: - return (char *)arch_register_get_name(reg); - } -} - /** * Add a number to a prefix. This number will not be used a second time. */ -static -char *get_unique_label(char *buf, size_t buflen, const char *prefix) { +static char *get_unique_label(char *buf, size_t buflen, const char *prefix) +{ static unsigned long id = 0; snprintf(buf, buflen, "%s%lu", prefix, ++id); return buf; @@ -209,86 +171,133 @@ char *get_unique_label(char *buf, size_t buflen, const char *prefix) { * |_| |_| *************************************************************/ -// we have no C++ and can't define an implicit ia32_emit_env_t* cast to -// be_emit_env_t* so we cheat a bit... -#define be_emit_char(env,c) be_emit_char(env->emit,c) -#define be_emit_string(env,s) be_emit_string(env->emit,s) -#undef be_emit_cstring -#define be_emit_cstring(env,x) { be_emit_string_len(env->emit, x, sizeof(x)-1); } -#define be_emit_ident(env,i) be_emit_ident(env->emit,i) -#define be_emit_write_line(env) be_emit_write_line(env->emit) -#define be_emit_finish_line_gas(env,n) be_emit_finish_line_gas(env->emit,n) -#define be_emit_pad_comment(env) be_emit_pad_comment(env->emit) - -void ia32_emit_source_register(ia32_emit_env_t *env, const ir_node *node, int pos) +static void emit_8bit_register(const arch_register_t *reg) { - const arch_register_t *reg = get_in_reg(env, node, pos); const char *reg_name = arch_register_get_name(reg); - assert(pos < get_irn_arity(node)); - - be_emit_char(env, '%'); - be_emit_string(env, reg_name); + be_emit_char('%'); + be_emit_char(reg_name[1]); + be_emit_char('l'); } -void ia32_emit_dest_register(ia32_emit_env_t *env, const ir_node *node, int pos) { - const arch_register_t *reg = get_out_reg(env, node, pos); - const char *reg_name = arch_register_get_name(reg); +static void emit_16bit_register(const arch_register_t *reg) +{ + const char *reg_name = ia32_get_mapped_reg_name(isa->regs_16bit, reg); - be_emit_char(env, '%'); - be_emit_string(env, reg_name); + be_emit_char('%'); + be_emit_string(reg_name); } -void ia32_emit_x87_name(ia32_emit_env_t *env, const ir_node *node, int pos) +static void emit_register(const arch_register_t *reg, const ir_mode *mode) { - ia32_attr_t *attr = get_ia32_attr(node); + const char *reg_name; + + if(mode != NULL) { + int size = get_mode_size_bits(mode); + if(size == 8) { + emit_8bit_register(reg); + return; + } else if(size == 16) { + emit_16bit_register(reg); + return; + } else { + assert(mode_is_float(mode) || size == 32); + } + } - assert(pos < 3); - be_emit_char(env, '%'); - be_emit_string(env, attr->x87[pos]->name); + reg_name = arch_register_get_name(reg); + + be_emit_char('%'); + be_emit_string(reg_name); } -void ia32_emit_immediate(ia32_emit_env_t *env, const ir_node *node) +void ia32_emit_source_register(const ir_node *node, int pos) { - tarval *tv; - ir_entity *ent; - ident *id; + const arch_register_t *reg = get_in_reg(node, pos); - be_emit_char(env, '$'); + emit_register(reg, NULL); +} - switch(get_ia32_immop_type(node)) { - case ia32_ImmConst: - tv = get_ia32_Immop_tarval(node); - id = get_ident_for_tv(tv); - break; - case ia32_ImmSymConst: - ent = get_ia32_Immop_symconst(node); - mark_entity_visited(ent); - id = get_entity_ld_ident(ent); - break; - default: - assert(0); - be_emit_string(env, "BAD"); +static void emit_ia32_Immediate(const ir_node *node); + +void ia32_emit_8bit_source_register_or_immediate(const ir_node *node, int pos) +{ + const arch_register_t *reg; + ir_node *in = get_irn_n(node, pos); + if(is_ia32_Immediate(in)) { + emit_ia32_Immediate(in); return; } - be_emit_ident(env, id); + reg = get_in_reg(node, pos); + emit_8bit_register(reg); +} + +void ia32_emit_dest_register(const ir_node *node, int pos) +{ + const arch_register_t *reg = get_out_reg(node, pos); + + emit_register(reg, NULL); +} + +void ia32_emit_8bit_dest_register(const ir_node *node, int pos) +{ + const arch_register_t *reg = get_out_reg(node, pos); + + emit_register(reg, mode_Bu); +} + +void ia32_emit_x87_register(const ir_node *node, int pos) +{ + const ia32_x87_attr_t *attr = get_ia32_x87_attr_const(node); + + assert(pos < 3); + be_emit_char('%'); + be_emit_string(attr->x87[pos]->name); +} + +static void ia32_emit_mode_suffix_mode(const ir_mode *mode) +{ + if(mode_is_float(mode)) { + switch(get_mode_size_bits(mode)) { + case 32: be_emit_char('s'); return; + case 64: be_emit_char('l'); return; + case 80: + case 96: be_emit_char('t'); return; + } + } else { + assert(mode_is_int(mode) || mode_is_reference(mode)); + switch(get_mode_size_bits(mode)) { + case 64: be_emit_cstring("ll"); return; + /* gas docu says q is the suffix but gcc, objdump and icc use + ll apparently */ + case 32: be_emit_char('l'); return; + case 16: be_emit_char('w'); return; + case 8: be_emit_char('b'); return; + } + } + panic("Can't output mode_suffix for %+F\n", mode); } -void ia32_emit_mode_suffix(ia32_emit_env_t *env, const ir_mode *mode) +void ia32_emit_mode_suffix(const ir_node *node) { - be_emit_char(env, get_mode_suffix(mode)); + ir_mode *mode = get_ia32_ls_mode(node); + if(mode == NULL) + mode = mode_Iu; + + ia32_emit_mode_suffix_mode(mode); } -void ia32_emit_x87_mode_suffix(ia32_emit_env_t *env, const ir_node *node) +void ia32_emit_x87_mode_suffix(const ir_node *node) { ir_mode *mode = get_ia32_ls_mode(node); - if(mode != NULL) - ia32_emit_mode_suffix(env, mode); + assert(mode != NULL); + /* we only need to emit the mode on address mode */ + if(get_ia32_op_type(node) != ia32_Normal) + ia32_emit_mode_suffix_mode(mode); } -static -char get_xmm_mode_suffix(ir_mode *mode) +static char get_xmm_mode_suffix(ir_mode *mode) { assert(mode_is_float(mode)); switch(get_mode_size_bits(mode)) { @@ -302,174 +311,114 @@ char get_xmm_mode_suffix(ir_mode *mode) return '%'; } -void ia32_emit_xmm_mode_suffix(ia32_emit_env_t *env, const ir_node *node) +void ia32_emit_xmm_mode_suffix(const ir_node *node) { ir_mode *mode = get_ia32_ls_mode(node); assert(mode != NULL); - be_emit_char(env, 's'); - be_emit_char(env, get_xmm_mode_suffix(mode)); + be_emit_char('s'); + be_emit_char(get_xmm_mode_suffix(mode)); } -void ia32_emit_xmm_mode_suffix_s(ia32_emit_env_t *env, const ir_node *node) +void ia32_emit_xmm_mode_suffix_s(const ir_node *node) { ir_mode *mode = get_ia32_ls_mode(node); assert(mode != NULL); - be_emit_char(env, get_xmm_mode_suffix(mode)); + be_emit_char(get_xmm_mode_suffix(mode)); } -void ia32_emit_extend_suffix(ia32_emit_env_t *env, const ir_mode *mode) +void ia32_emit_extend_suffix(const ir_mode *mode) { if(get_mode_size_bits(mode) == 32) return; if(mode_is_signed(mode)) { - be_emit_char(env, 's'); + be_emit_char('s'); } else { - be_emit_char(env, 'z'); - } -} - -static -void ia32_emit_function_object(ia32_emit_env_t *env, const char *name) -{ - switch (be_gas_flavour) { - case GAS_FLAVOUR_NORMAL: - be_emit_cstring(env, "\t.type\t"); - be_emit_string(env, name); - be_emit_cstring(env, ", @function\n"); - be_emit_write_line(env); - break; - case GAS_FLAVOUR_MINGW: - be_emit_cstring(env, "\t.def\t"); - be_emit_string(env, name); - be_emit_cstring(env, ";\t.scl\t2;\t.type\t32;\t.endef\n"); - be_emit_write_line(env); - break; - default: - break; + be_emit_char('z'); } } -static -void ia32_emit_function_size(ia32_emit_env_t *env, const char *name) +void ia32_emit_source_register_or_immediate(const ir_node *node, int pos) { - switch (be_gas_flavour) { - case GAS_FLAVOUR_NORMAL: - be_emit_cstring(env, "\t.size\t"); - be_emit_string(env, name); - be_emit_cstring(env, ", .-"); - be_emit_string(env, name); - be_emit_char(env, '\n'); - be_emit_write_line(env); - break; - default: - break; + ir_node *in = get_irn_n(node, pos); + if(is_ia32_Immediate(in)) { + emit_ia32_Immediate(in); + } else { + const ir_mode *mode = get_ia32_ls_mode(node); + const arch_register_t *reg = get_in_reg(node, pos); + emit_register(reg, mode); } } - - /** * Emits registers and/or address mode of a binary operation. */ -void ia32_emit_binop(ia32_emit_env_t *env, const ir_node *node) { - switch(get_ia32_op_type(node)) { - case ia32_Normal: - if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) { - ia32_emit_immediate(env, node); - be_emit_cstring(env, ", "); - ia32_emit_source_register(env, node, 2); - } else { - const arch_register_t *in1 = get_in_reg(env, node, 2); - const arch_register_t *in2 = get_in_reg(env, node, 3); - const arch_register_t *out = produces_result(node) ? get_out_reg(env, node, 0) : NULL; - const arch_register_t *in; - const char *in_name; - - in = out ? (REGS_ARE_EQUAL(out, in2) ? in1 : in2) : in2; - out = out ? out : in1; - in_name = arch_register_get_name(in); - - if (is_ia32_emit_cl(node)) { - assert(REGS_ARE_EQUAL(&ia32_gp_regs[REG_ECX], in) && "shift operation needs ecx"); - in_name = "cl"; - } - - be_emit_char(env, '%'); - be_emit_string(env, in_name); - be_emit_cstring(env, ", %"); - be_emit_string(env, arch_register_get_name(out)); - } - break; - case ia32_AddrModeS: - ia32_emit_am(env, node); - be_emit_cstring(env, ", "); - if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) { - assert(!produces_result(node) && "Source AM with Const must not produce result"); - ia32_emit_immediate(env, node); - } else if (produces_result(node)) { - ia32_emit_dest_register(env, node, 0); - } else { - ia32_emit_source_register(env, node, 2); - } - break; - case ia32_AddrModeD: - if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) { - ia32_emit_immediate(env, node); - be_emit_cstring(env, ", "); - ia32_emit_am(env, node); - } else { - const arch_register_t *in1 = get_in_reg(env, node, - get_irn_arity(node) == 5 ? 3 : 2); - ir_mode *mode = get_ia32_ls_mode(node); - const char *in_name; +void ia32_emit_binop(const ir_node *node) { + const ir_node *right_op = get_irn_n(node, n_ia32_binary_right); + const ir_mode *mode = get_ia32_ls_mode(node); + const arch_register_t *reg_left; - in_name = ia32_get_reg_name_for_mode(env, mode, in1); - - if (is_ia32_emit_cl(node)) { - assert(REGS_ARE_EQUAL(&ia32_gp_regs[REG_ECX], in1) && "shift operation needs ecx"); - in_name = "cl"; - } - - be_emit_char(env, '%'); - be_emit_string(env, in_name); - be_emit_cstring(env, ", "); - ia32_emit_am(env, node); - } + switch(get_ia32_op_type(node)) { + case ia32_Normal: + reg_left = get_in_reg(node, n_ia32_binary_left); + if(is_ia32_Immediate(right_op)) { + emit_ia32_Immediate(right_op); + be_emit_cstring(", "); + emit_register(reg_left, mode); break; - default: - assert(0 && "unsupported op type"); + } else { + const arch_register_t *reg_right + = get_in_reg(node, n_ia32_binary_right); + emit_register(reg_right, mode); + be_emit_cstring(", "); + emit_register(reg_left, mode); + } + break; + case ia32_AddrModeS: + if(is_ia32_Immediate(right_op)) { + emit_ia32_Immediate(right_op); + be_emit_cstring(", "); + ia32_emit_am(node); + } else { + reg_left = get_in_reg(node, n_ia32_binary_left); + ia32_emit_am(node); + be_emit_cstring(", "); + emit_register(reg_left, mode); + } + break; + case ia32_AddrModeD: + panic("DestMode can't be output by %%binop anymore"); + break; + default: + assert(0 && "unsupported op type"); } } /** * Emits registers and/or address mode of a binary operation. */ -void ia32_emit_x87_binop(ia32_emit_env_t *env, const ir_node *node) { +void ia32_emit_x87_binop(const ir_node *node) { switch(get_ia32_op_type(node)) { case ia32_Normal: - if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) { - // should not happen... - assert(0); - } else { - ia32_attr_t *attr = get_ia32_attr(node); - const arch_register_t *in1 = attr->x87[0]; - const arch_register_t *in2 = attr->x87[1]; - const arch_register_t *out = attr->x87[2]; + { + const ia32_x87_attr_t *x87_attr = get_ia32_x87_attr_const(node); + const arch_register_t *in1 = x87_attr->x87[0]; + const arch_register_t *in2 = x87_attr->x87[1]; + const arch_register_t *out = x87_attr->x87[2]; const arch_register_t *in; - in = out ? (REGS_ARE_EQUAL(out, in2) ? in1 : in2) : in2; + in = out ? ((out == in2) ? in1 : in2) : in2; out = out ? out : in1; - be_emit_char(env, '%'); - be_emit_string(env, arch_register_get_name(in)); - be_emit_cstring(env, ", %"); - be_emit_string(env, arch_register_get_name(out)); + be_emit_char('%'); + be_emit_string(arch_register_get_name(in)); + be_emit_cstring(", %"); + be_emit_string(arch_register_get_name(out)); } break; case ia32_AddrModeS: - case ia32_AddrModeD: - ia32_emit_am(env, node); + ia32_emit_am(node); break; + case ia32_AddrModeD: default: assert(0 && "unsupported op type"); } @@ -478,91 +427,127 @@ void ia32_emit_x87_binop(ia32_emit_env_t *env, const ir_node *node) { /** * Emits registers and/or address mode of a unary operation. */ -void ia32_emit_unop(ia32_emit_env_t *env, const ir_node *node) { +void ia32_emit_unop(const ir_node *node, int pos) { + const ir_node *op; + switch(get_ia32_op_type(node)) { - case ia32_Normal: - if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) { - ia32_emit_immediate(env, node); - } else { - if (is_ia32_Mul(node) || is_ia32_IMul1OP(node)) { - ia32_emit_source_register(env, node, 3); - } else if(is_ia32_IDiv(node) || is_ia32_Div(node)) { - ia32_emit_source_register(env, node, 4); - } else if(is_ia32_Push(node)) { - ia32_emit_source_register(env, node, 2); - } else if(is_ia32_Pop(node)) { - ia32_emit_dest_register(env, node, 1); - } else { - ia32_emit_dest_register(env, node, 0); - } - } - break; - case ia32_AddrModeS: - case ia32_AddrModeD: - ia32_emit_am(env, node); - break; - default: - assert(0 && "unsupported op type"); + case ia32_Normal: + op = get_irn_n(node, pos); + if (is_ia32_Immediate(op)) { + emit_ia32_Immediate(op); + } else { + ia32_emit_source_register(node, pos); + } + break; + case ia32_AddrModeS: + case ia32_AddrModeD: + ia32_emit_am(node); + break; + default: + assert(0 && "unsupported op type"); + } +} + +static void ia32_emit_entity(ir_entity *entity, int no_pic_adjust) +{ + ident *id; + + set_entity_backend_marked(entity, 1); + id = get_entity_ld_ident(entity); + be_emit_ident(id); + + if (get_entity_owner(entity) == get_tls_type()) { + if (get_entity_visibility(entity) == visibility_external_allocated) { + be_emit_cstring("@INDNTPOFF"); + } else { + be_emit_cstring("@NTPOFF"); + } + } + + if (!no_pic_adjust && do_pic) { + /* TODO: only do this when necessary */ + be_emit_char('-'); + be_emit_string(pic_base_label); } } /** * Emits address mode. */ -void ia32_emit_am(ia32_emit_env_t *env, const ir_node *node) { - ia32_am_flavour_t am_flav = get_ia32_am_flavour(node); - ir_entity *ent = get_ia32_am_sc(node); - int offs = get_ia32_am_offs_int(node); +void ia32_emit_am(const ir_node *node) { + ir_entity *ent = get_ia32_am_sc(node); + int offs = get_ia32_am_offs_int(node); + ir_node *base = get_irn_n(node, 0); + int has_base = !is_ia32_NoReg_GP(base); + ir_node *index = get_irn_n(node, 1); + int has_index = !is_ia32_NoReg_GP(index); /* just to be sure... */ assert(!is_ia32_use_frame(node) || get_ia32_frame_ent(node) != NULL); /* emit offset */ if (ent != NULL) { - ident *id; - - mark_entity_visited(ent); - id = get_entity_ld_ident(ent); if (is_ia32_am_sc_sign(node)) - be_emit_char(env, '-'); - be_emit_ident(env, id); - - if(get_entity_owner(ent) == get_tls_type()) { - if (get_entity_visibility(ent) == visibility_external_allocated) { - be_emit_cstring(env, "@INDNTPOFF"); - } else { - be_emit_cstring(env, "@NTPOFF"); - } - } + be_emit_char('-'); + ia32_emit_entity(ent, 0); } if(offs != 0) { if(ent != NULL) { - be_emit_irprintf(env->emit, "%+d", offs); + be_emit_irprintf("%+d", offs); } else { - be_emit_irprintf(env->emit, "%d", offs); + be_emit_irprintf("%d", offs); } } - if (am_flav & (ia32_B | ia32_I)) { - be_emit_char(env, '('); + if (has_base || has_index) { + be_emit_char('('); /* emit base */ - if (am_flav & ia32_B) { - ia32_emit_source_register(env, node, 0); + if (has_base) { + const arch_register_t *reg = get_in_reg(node, n_ia32_base); + emit_register(reg, NULL); } /* emit index + scale */ - if (am_flav & ia32_I) { - be_emit_char(env, ','); - ia32_emit_source_register(env, node, 1); - - if (am_flav & ia32_S) { - be_emit_irprintf(env->emit, ",%d", 1 << get_ia32_am_scale(node)); + if (has_index) { + const arch_register_t *reg = get_in_reg(node, n_ia32_index); + int scale; + be_emit_char(','); + emit_register(reg, NULL); + + scale = get_ia32_am_scale(node); + if (scale > 0) { + be_emit_irprintf(",%d", 1 << get_ia32_am_scale(node)); } } - be_emit_char(env, ')'); + be_emit_char(')'); + } + + /* special case if nothing is set */ + if(ent == NULL && offs == 0 && !has_base && !has_index) { + be_emit_char('0'); + } +} + +static void emit_ia32_IMul(const ir_node *node) +{ + ir_node *left = get_irn_n(node, n_ia32_IMul_left); + const arch_register_t *out_reg = get_out_reg(node, pn_ia32_IMul_res); + + be_emit_cstring("\timul"); + ia32_emit_mode_suffix(node); + be_emit_char(' '); + + ia32_emit_binop(node); + + /* do we need the 3-address form? */ + if(is_ia32_NoReg_GP(left) || + get_in_reg(node, n_ia32_IMul_left) != out_reg) { + be_emit_cstring(", "); + emit_register(out_reg, get_ia32_ls_mode(node)); } + be_emit_finish_line_gas(node); } /************************************************* @@ -583,14 +568,13 @@ void ia32_emit_am(ia32_emit_env_t *env, const ir_node *node) { */ struct cmp2conditon_t { const char *name; - pn_Cmp num; + int num; }; /* * positive conditions for signed compares */ -static -const struct cmp2conditon_t cmp2condition_s[] = { +static const struct cmp2conditon_t cmp2condition_s[] = { { NULL, pn_Cmp_False }, /* always false */ { "e", pn_Cmp_Eq }, /* == */ { "l", pn_Cmp_Lt }, /* < */ @@ -598,22 +582,13 @@ const struct cmp2conditon_t cmp2condition_s[] = { { "g", pn_Cmp_Gt }, /* > */ { "ge", pn_Cmp_Ge }, /* >= */ { "ne", pn_Cmp_Lg }, /* != */ - { NULL, pn_Cmp_Leg}, /* Floating point: ordered */ - { NULL, pn_Cmp_Uo }, /* Floating point: unordered */ - { "e", pn_Cmp_Ue }, /* Floating point: unordered or == */ - { "b", pn_Cmp_Ul }, /* Floating point: unordered or < */ - { "be", pn_Cmp_Ule }, /* Floating point: unordered or <= */ - { "a", pn_Cmp_Ug }, /* Floating point: unordered or > */ - { "ae", pn_Cmp_Uge }, /* Floating point: unordered or >= */ - { "ne", pn_Cmp_Ne }, /* Floating point: unordered or != */ - { NULL, pn_Cmp_True }, /* always true */ + { NULL, pn_Cmp_Leg}, /* always true */ }; /* * positive conditions for unsigned compares */ -static -const struct cmp2conditon_t cmp2condition_u[] = { +static const struct cmp2conditon_t cmp2condition_u[] = { { NULL, pn_Cmp_False }, /* always false */ { "e", pn_Cmp_Eq }, /* == */ { "b", pn_Cmp_Lt }, /* < */ @@ -621,59 +596,177 @@ const struct cmp2conditon_t cmp2condition_u[] = { { "a", pn_Cmp_Gt }, /* > */ { "ae", pn_Cmp_Ge }, /* >= */ { "ne", pn_Cmp_Lg }, /* != */ - { NULL, pn_Cmp_True }, /* always true */ + { NULL, pn_Cmp_Leg }, /* always true */ }; -/* - * returns the condition code +enum { + ia32_pn_Cmp_unsigned = 0x1000, + ia32_pn_Cmp_float = 0x2000, +}; + +/** + * walks up a tree of copies/perms/spills/reloads to find the original value + * that is moved around */ -static -const char *get_cmp_suffix(int cmp_code) +static ir_node *find_original_value(ir_node *node) +{ + inc_irg_visited(current_ir_graph); + while(1) { + mark_irn_visited(node); + if(be_is_Copy(node)) { + node = be_get_Copy_op(node); + } else if(be_is_CopyKeep(node)) { + node = be_get_CopyKeep_op(node); + } else if(is_Proj(node)) { + ir_node *pred = get_Proj_pred(node); + if(be_is_Perm(pred)) { + node = get_irn_n(pred, get_Proj_proj(node)); + } else if(be_is_MemPerm(pred)) { + node = get_irn_n(pred, get_Proj_proj(node) + 1); + } else if(is_ia32_Load(pred)) { + node = get_irn_n(pred, n_ia32_Load_mem); + } else { + return node; + } + } else if(is_ia32_Store(node)) { + node = get_irn_n(node, n_ia32_Store_val); + } else if(is_Phi(node)) { + int i, arity; + arity = get_irn_arity(node); + for(i = 0; i < arity; ++i) { + ir_node *in = get_irn_n(node, i); + if(irn_visited(in)) + continue; + node = in; + break; + } + assert(i < arity); + } else { + return node; + } + } +} + +static int determine_final_pnc(const ir_node *node, int flags_pos, + int pnc) { - assert( (cmp2condition_s[cmp_code & 15].num) == (cmp_code & 15)); - assert( (cmp2condition_u[cmp_code & 7].num) == (cmp_code & 7)); + ir_node *flags = get_irn_n(node, flags_pos); + const ia32_attr_t *flags_attr; + flags = skip_Proj(flags); + + if(is_ia32_Sahf(flags)) { + ir_node *cmp = get_irn_n(flags, n_ia32_Sahf_val); + if(!(is_ia32_FucomFnstsw(cmp) || is_ia32_FucompFnstsw(cmp) + || is_ia32_FucomppFnstsw(cmp) || is_ia32_FtstFnstsw(cmp))) { + cmp = find_original_value(cmp); + assert(is_ia32_FucomFnstsw(cmp) || is_ia32_FucompFnstsw(cmp) + || is_ia32_FucomppFnstsw(cmp) || is_ia32_FtstFnstsw(cmp)); + } - if((cmp_code & ia32_pn_Cmp_Unsigned)) { - return cmp2condition_u[cmp_code & 7].name; + flags_attr = get_ia32_attr_const(cmp); + if(flags_attr->data.ins_permuted) + pnc = get_mirrored_pnc(pnc); + pnc |= ia32_pn_Cmp_float; + } else if(is_ia32_Ucomi(flags) || is_ia32_Fucomi(flags) + || is_ia32_Fucompi(flags)) { + flags_attr = get_ia32_attr_const(flags); + + if(flags_attr->data.ins_permuted) + pnc = get_mirrored_pnc(pnc); + pnc |= ia32_pn_Cmp_float; } else { - return cmp2condition_s[cmp_code & 15].name; +#if 0 + assert(is_ia32_Cmp(flags) || is_ia32_Test(flags) + || is_ia32_Cmp8Bit(flags) || is_ia32_Test8Bit(flags)); +#endif + flags_attr = get_ia32_attr_const(flags); + + if(flags_attr->data.ins_permuted) + pnc = get_mirrored_pnc(pnc); + if(flags_attr->data.cmp_unsigned) + pnc |= ia32_pn_Cmp_unsigned; } + + return pnc; } -void ia32_emit_cmp_suffix(ia32_emit_env_t *env, long pnc) +static void ia32_emit_cmp_suffix(int pnc) { - be_emit_string(env, get_cmp_suffix(pnc)); + const char *str; + + if((pnc & ia32_pn_Cmp_float) || (pnc & ia32_pn_Cmp_unsigned)) { + pnc = pnc & 7; + assert(cmp2condition_u[pnc].num == pnc); + str = cmp2condition_u[pnc].name; + } else { + pnc = pnc & 7; + assert(cmp2condition_s[pnc].num == pnc); + str = cmp2condition_s[pnc].name; + } + + be_emit_string(str); } +void ia32_emit_cmp_suffix_node(const ir_node *node, + int flags_pos) +{ + const ia32_attr_t *attr = get_ia32_attr_const(node); + + pn_Cmp pnc = get_ia32_condcode(node); + + pnc = determine_final_pnc(node, flags_pos, pnc); + if(attr->data.ins_permuted) { + if(pnc & ia32_pn_Cmp_float) { + pnc = get_negated_pnc(pnc, mode_F); + } else { + pnc = get_negated_pnc(pnc, mode_Iu); + } + } + + ia32_emit_cmp_suffix(pnc); +} /** * Returns the target block for a control flow node. */ -static -ir_node *get_cfop_target_block(const ir_node *irn) { +static ir_node *get_cfop_target_block(const ir_node *irn) { return get_irn_link(irn); } /** - * Returns the target label for a control flow node. + * Emits a block label for the given block. + */ +static void ia32_emit_block_name(const ir_node *block) +{ + if (has_Block_label(block)) { + be_emit_string(be_gas_label_prefix()); + be_emit_irprintf("%u", (unsigned)get_Block_label(block)); + } else { + be_emit_cstring(BLOCK_PREFIX); + be_emit_irprintf("%d", get_irn_node_nr(block)); + } +} + +/** + * Emits the target label for a control flow node. */ -void ia32_emit_cfop_target(ia32_emit_env_t * env, const ir_node *node) { +static void ia32_emit_cfop_target(const ir_node *node) +{ ir_node *block = get_cfop_target_block(node); - be_emit_cstring(env, BLOCK_PREFIX); - be_emit_irprintf(env->emit, "%d", get_irn_node_nr(block)); + ia32_emit_block_name(block); } /** Return the next block in Block schedule */ -static ir_node *next_blk_sched(const ir_node *block) { +static ir_node *next_blk_sched(const ir_node *block) +{ return get_irn_link(block); } /** * Returns the Proj with projection number proj and NOT mode_M */ -static -ir_node *get_proj(const ir_node *node, long proj) { +static ir_node *get_proj(const ir_node *node, long proj) { const ir_edge_t *edge; ir_node *src; @@ -695,26 +788,25 @@ ir_node *get_proj(const ir_node *node, long proj) { /** * Emits the jump sequence for a conditional jump (cmp + jmp_true + jmp_false) */ -static -void finish_CondJmp(ia32_emit_env_t *env, const ir_node *node, ir_mode *mode, - long pnc) { +static void emit_ia32_Jcc(const ir_node *node) +{ + int need_parity_label = 0; const ir_node *proj_true; const ir_node *proj_false; const ir_node *block; const ir_node *next_block; - int flipped = 0; + pn_Cmp pnc = get_ia32_condcode(node); - /* get both Proj's */ - proj_true = get_proj(node, pn_Cond_true); - assert(proj_true && "CondJmp without true Proj"); + pnc = determine_final_pnc(node, 0, pnc); - proj_false = get_proj(node, pn_Cond_false); - assert(proj_false && "CondJmp without false Proj"); + /* get both Projs */ + proj_true = get_proj(node, pn_ia32_Jcc_true); + assert(proj_true && "Jcc without true Proj"); - /* for now, the code works for scheduled and non-schedules blocks */ - block = get_nodes_block(node); + proj_false = get_proj(node, pn_ia32_Jcc_false); + assert(proj_false && "Jcc without false Proj"); - /* we have a block schedule */ + block = get_nodes_block(node); next_block = next_blk_sched(block); if (get_cfop_target_block(proj_true) == next_block) { @@ -723,388 +815,142 @@ void finish_CondJmp(ia32_emit_env_t *env, const ir_node *node, ir_mode *mode, proj_true = proj_false; proj_false = t; - flipped = 1; - pnc = get_negated_pnc(pnc, mode); - } - - /* in case of unordered compare, check for parity */ - if (pnc & pn_Cmp_Uo) { - be_emit_cstring(env, "\tjp "); - ia32_emit_cfop_target(env, proj_true); - be_emit_finish_line_gas(env, proj_true); - } - - be_emit_cstring(env, "\tj"); - ia32_emit_cmp_suffix(env, pnc); - be_emit_char(env, ' '); - ia32_emit_cfop_target(env, proj_true); - be_emit_finish_line_gas(env, proj_true); - - /* the second Proj might be a fallthrough */ - if (get_cfop_target_block(proj_false) != next_block) { - be_emit_cstring(env, "\tjmp "); - ia32_emit_cfop_target(env, proj_false); - be_emit_finish_line_gas(env, proj_false); - } else { - be_emit_cstring(env, "\t/* fallthrough to"); - ia32_emit_cfop_target(env, proj_false); - be_emit_cstring(env, " */"); - be_emit_finish_line_gas(env, proj_false); - } -} - -/** - * Emits code for conditional jump. - */ -static -void CondJmp_emitter(ia32_emit_env_t *env, const ir_node *node) { - be_emit_cstring(env, "\tcmp "); - ia32_emit_binop(env, node); - be_emit_finish_line_gas(env, node); - - finish_CondJmp(env, node, mode_Iu, get_ia32_pncode(node)); -} - -/** - * Emits code for conditional jump with two variables. - */ -static -void emit_ia32_CondJmp(ia32_emit_env_t *env, const ir_node *node) { - CondJmp_emitter(env, node); -} - -/** - * Emits code for conditional test and jump. - */ -static -void TestJmp_emitter(ia32_emit_env_t *env, const ir_node *node) { - if(is_ia32_ImmSymConst(node) || is_ia32_ImmConst(node)) { - be_emit_cstring(env, "\ttest "); - ia32_emit_immediate(env, node); - be_emit_cstring(env, ", "); - ia32_emit_source_register(env, node, 0); - be_emit_finish_line_gas(env, node); - } else { - be_emit_cstring(env, "\ttest "); - ia32_emit_source_register(env, node, 1); - be_emit_cstring(env, ", "); - ia32_emit_source_register(env, node, 0); - be_emit_finish_line_gas(env, node); - } - finish_CondJmp(env, node, mode_Iu, get_ia32_pncode(node)); -} - -/** - * Emits code for conditional test and jump with two variables. - */ -static -void emit_ia32_TestJmp(ia32_emit_env_t *env, const ir_node *node) { - TestJmp_emitter(env, node); -} - -static -void emit_ia32_CJmp(ia32_emit_env_t *env, const ir_node *node) { - be_emit_cstring(env, "/* omitted redundant test */"); - be_emit_finish_line_gas(env, node); - - finish_CondJmp(env, node, mode_Is, get_ia32_pncode(node)); -} - -static -void emit_ia32_CJmpAM(ia32_emit_env_t *env, const ir_node *node) { - be_emit_cstring(env, "/* omitted redundant test/cmp */"); - be_emit_finish_line_gas(env, node); - - finish_CondJmp(env, node, mode_Is, get_ia32_pncode(node)); -} - -/** - * Emits code for conditional SSE floating point jump with two variables. - */ -static -void emit_ia32_xCondJmp(ia32_emit_env_t *env, const ir_node *node) { - be_emit_cstring(env, "\tucomi"); - ia32_emit_xmm_mode_suffix(env, node); - be_emit_char(env, ' '); - ia32_emit_binop(env, node); - be_emit_finish_line_gas(env, node); - - finish_CondJmp(env, node, mode_F, get_ia32_pncode(node)); -} - -/** - * Emits code for conditional x87 floating point jump with two variables. - */ -static -void emit_ia32_x87CondJmp(ia32_emit_env_t *env, const ir_node *node) { - ia32_attr_t *attr = get_ia32_attr(node); - const char *reg = attr->x87[1]->name; - long pnc = get_ia32_pncode(node); - - switch (get_ia32_irn_opcode(node)) { - case iro_ia32_fcomrJmp: - pnc = get_inversed_pnc(pnc); - reg = attr->x87[0]->name; - case iro_ia32_fcomJmp: - default: - be_emit_cstring(env, "\tfucom "); - break; - case iro_ia32_fcomrpJmp: - pnc = get_inversed_pnc(pnc); - reg = attr->x87[0]->name; - case iro_ia32_fcompJmp: - be_emit_cstring(env, "\tfucomp "); - break; - case iro_ia32_fcomrppJmp: - pnc = get_inversed_pnc(pnc); - case iro_ia32_fcomppJmp: - be_emit_cstring(env, "\tfucompp "); - reg = ""; - break; + if(pnc & ia32_pn_Cmp_float) { + pnc = get_negated_pnc(pnc, mode_F); + } else { + pnc = get_negated_pnc(pnc, mode_Iu); + } } - if(reg[0] != '\0') { - be_emit_char(env, '%'); - be_emit_string(env, reg); - } - be_emit_finish_line_gas(env, node); - - be_emit_cstring(env, "\tfnstsw %ax"); - be_emit_finish_line_gas(env, node); - be_emit_cstring(env, "\tsahf"); - be_emit_finish_line_gas(env, node); - - finish_CondJmp(env, node, mode_E, pnc); -} - -static -void CMov_emitter(ia32_emit_env_t *env, const ir_node *node) { - long pnc = get_ia32_pncode(node); - int is_PsiCondCMov = is_ia32_PsiCondCMov(node); - int idx_left = 2 - is_PsiCondCMov; - int idx_right = 3 - is_PsiCondCMov; - const arch_register_t *in1, *in2, *out; - - out = arch_get_irn_register(env->arch_env, node); - in1 = arch_get_irn_register(env->arch_env, get_irn_n(node, idx_left)); - in2 = arch_get_irn_register(env->arch_env, get_irn_n(node, idx_right)); - - /* we have to emit the cmp first, because the destination register */ - /* could be one of the compare registers */ - if (is_ia32_CmpCMov(node)) { - be_emit_cstring(env, "\tcmp "); - ia32_emit_source_register(env, node, 1); - be_emit_cstring(env, ", "); - ia32_emit_source_register(env, node, 0); - } else if (is_ia32_xCmpCMov(node)) { - be_emit_cstring(env, "\tucomis"); - ia32_emit_mode_suffix(env, get_irn_mode(node)); - be_emit_char(env, ' '); - ia32_emit_source_register(env, node, 1); - be_emit_cstring(env, ", "); - ia32_emit_source_register(env, node, 0); - } else if (is_PsiCondCMov) { - /* omit compare because flags are already set by And/Or */ - be_emit_cstring(env, "\ttest "); - ia32_emit_source_register(env, node, 0); - be_emit_cstring(env, ", "); - ia32_emit_source_register(env, node, 0); - } else { - assert(0 && "unsupported CMov"); - } - be_emit_finish_line_gas(env, node); + if (pnc & ia32_pn_Cmp_float) { + /* Some floating point comparisons require a test of the parity flag, + * which indicates that the result is unordered */ + switch (pnc & 15) { + case pn_Cmp_Uo: { + be_emit_cstring("\tjp "); + ia32_emit_cfop_target(proj_true); + be_emit_finish_line_gas(proj_true); + break; + } - if (REGS_ARE_EQUAL(out, in2)) { - /* best case: default in == out -> do nothing */ - } else if (REGS_ARE_EQUAL(out, in1)) { - ir_node *n = (ir_node*) node; - /* true in == out -> need complement compare and exchange true and default in */ - ir_node *t = get_irn_n(n, idx_left); - set_irn_n(n, idx_left, get_irn_n(n, idx_right)); - set_irn_n(n, idx_right, t); + case pn_Cmp_Leg: + be_emit_cstring("\tjnp "); + ia32_emit_cfop_target(proj_true); + be_emit_finish_line_gas(proj_true); + break; - pnc = get_negated_pnc(pnc, get_irn_mode(node)); - } else { - /* out is different from in: need copy default -> out */ - if (is_PsiCondCMov) { - be_emit_cstring(env, "\tmovl "); - ia32_emit_dest_register(env, node, 2); - be_emit_cstring(env, ", "); - ia32_emit_dest_register(env, node, 0); - } else { - be_emit_cstring(env, "\tmovl "); - ia32_emit_source_register(env, node, 3); - be_emit_cstring(env, ", "); - ia32_emit_dest_register(env, node, 0); + case pn_Cmp_Eq: + case pn_Cmp_Lt: + case pn_Cmp_Le: + /* we need a local label if the false proj is a fallthrough + * as the falseblock might have no label emitted then */ + if (get_cfop_target_block(proj_false) == next_block) { + need_parity_label = 1; + be_emit_cstring("\tjp 1f"); + } else { + be_emit_cstring("\tjp "); + ia32_emit_cfop_target(proj_false); + } + be_emit_finish_line_gas(proj_false); + goto emit_jcc; + + case pn_Cmp_Ug: + case pn_Cmp_Uge: + case pn_Cmp_Ne: + be_emit_cstring("\tjp "); + ia32_emit_cfop_target(proj_true); + be_emit_finish_line_gas(proj_true); + goto emit_jcc; + + default: + goto emit_jcc; } - be_emit_finish_line_gas(env, node); - } - - if (is_PsiCondCMov) { - be_emit_cstring(env, "\tcmov"); - ia32_emit_cmp_suffix(env, pnc); - be_emit_cstring(env, "l "); - ia32_emit_source_register(env, node, 1); - be_emit_cstring(env, ", "); - ia32_emit_dest_register(env, node, 0); } else { - be_emit_cstring(env, "\tcmov"); - ia32_emit_cmp_suffix(env, pnc); - be_emit_cstring(env, "l "); - ia32_emit_source_register(env, node, 2); - be_emit_cstring(env, ", "); - ia32_emit_dest_register(env, node, 0); +emit_jcc: + be_emit_cstring("\tj"); + ia32_emit_cmp_suffix(pnc); + be_emit_char(' '); + ia32_emit_cfop_target(proj_true); + be_emit_finish_line_gas(proj_true); } - be_emit_finish_line_gas(env, node); -} -static -void emit_ia32_CmpCMov(ia32_emit_env_t *env, const ir_node *node) { - CMov_emitter(env, node); -} - -static -void emit_ia32_PsiCondCMov(ia32_emit_env_t *env, const ir_node *node) { - CMov_emitter(env, node); -} - -static -void emit_ia32_xCmpCMov(ia32_emit_env_t *env, const ir_node *node) { - CMov_emitter(env, node); -} - -static -void Set_emitter(ia32_emit_env_t *env, const ir_node *node, ir_mode *mode) { - int pnc = get_ia32_pncode(node); - const char *reg8bit; - const arch_register_t *out; - - out = arch_get_irn_register(env->arch_env, node); - reg8bit = ia32_get_mapped_reg_name(env->isa->regs_8bit, out); + if(need_parity_label) { + be_emit_cstring("1:"); + be_emit_write_line(); + } - if (is_ia32_CmpSet(node)) { - be_emit_cstring(env, "\tcmp "); - ia32_emit_binop(env, node); - } else if (is_ia32_xCmpSet(node)) { - be_emit_cstring(env, "\tucomis"); - ia32_emit_mode_suffix(env, get_irn_mode(get_irn_n(node, 2))); - be_emit_char(env, ' '); - ia32_emit_binop(env, node); - } else if (is_ia32_PsiCondSet(node)) { - be_emit_cstring(env, "\tcmp $0, "); - ia32_emit_source_register(env, node, 0); + /* the second Proj might be a fallthrough */ + if (get_cfop_target_block(proj_false) != next_block) { + be_emit_cstring("\tjmp "); + ia32_emit_cfop_target(proj_false); + be_emit_finish_line_gas(proj_false); } else { - assert(0 && "unsupported Set"); + be_emit_cstring("\t/* fallthrough to "); + ia32_emit_cfop_target(proj_false); + be_emit_cstring(" */"); + be_emit_finish_line_gas(proj_false); } - be_emit_finish_line_gas(env, node); - - /* use mov to clear target because it doesn't affect the eflags */ - be_emit_cstring(env, "\tmovl $0, %"); - be_emit_string(env, arch_register_get_name(out)); - be_emit_finish_line_gas(env, node); - - be_emit_cstring(env, "\tset"); - ia32_emit_cmp_suffix(env, pnc); - be_emit_cstring(env, " %"); - be_emit_string(env, reg8bit); - be_emit_finish_line_gas(env, node); -} - -static -void emit_ia32_CmpSet(ia32_emit_env_t *env, const ir_node *node) { - Set_emitter(env, node, get_irn_mode(get_irn_n(node, 2))); -} - -static -void emit_ia32_PsiCondSet(ia32_emit_env_t *env, const ir_node *node) { - Set_emitter(env, node, get_irn_mode(get_irn_n(node, 0))); } -static -void emit_ia32_xCmpSet(ia32_emit_env_t *env, const ir_node *node) { - Set_emitter(env, node, get_irn_mode(get_irn_n(node, 2))); -} - -static -void emit_ia32_xCmp(ia32_emit_env_t *env, const ir_node *node) { - int sse_pnc = -1; - long pnc = get_ia32_pncode(node); - long unord = pnc & pn_Cmp_Uo; +static void emit_ia32_CMov(const ir_node *node) +{ + const ia32_attr_t *attr = get_ia32_attr_const(node); + int ins_permuted = attr->data.ins_permuted; + const arch_register_t *out = arch_get_irn_register(arch_env, node); + pn_Cmp pnc = get_ia32_condcode(node); + const arch_register_t *in_true; + const arch_register_t *in_false; - assert( (pnc & ia32_pn_Cmp_Unsigned) == 0); + pnc = determine_final_pnc(node, n_ia32_CMov_eflags, pnc); - switch (pnc) { - case pn_Cmp_Leg: /* odered */ - sse_pnc = 7; - break; - case pn_Cmp_Uo: /* unordered */ - sse_pnc = 3; - break; - case pn_Cmp_Ue: - case pn_Cmp_Eq: /* == */ - sse_pnc = 0; - break; - case pn_Cmp_Ul: - case pn_Cmp_Lt: /* < */ - sse_pnc = 1; - break; - case pn_Cmp_Ule: - case pn_Cmp_Le: /* <= */ - sse_pnc = 2; - break; - case pn_Cmp_Ug: - case pn_Cmp_Gt: /* > */ - sse_pnc = 6; - break; - case pn_Cmp_Uge: - case pn_Cmp_Ge: /* >= */ - sse_pnc = 5; - break; - case pn_Cmp_Ne: - case pn_Cmp_Lg: /* != */ - sse_pnc = 4; - break; - } + in_true = arch_get_irn_register(arch_env, + get_irn_n(node, n_ia32_CMov_val_true)); + in_false = arch_get_irn_register(arch_env, + get_irn_n(node, n_ia32_CMov_val_false)); - assert(sse_pnc >= 0 && "unsupported compare"); + /* should be same constraint fullfilled? */ + if(out == in_false) { + /* yes -> nothing to do */ + } else if(out == in_true) { + const arch_register_t *tmp; - if (unord && sse_pnc != 3) { - /* - We need a separate compare against unordered. - Quick and Dirty solution: - - get some memory on stack - - compare - - store result - - compare - - and result and stored result - - cleanup stack - */ - be_emit_cstring(env, "\tsubl $8, %esp"); - be_emit_finish_line_gas(env, node); + assert(get_ia32_op_type(node) == ia32_Normal); - be_emit_cstring(env, "\tcmpsd $3, "); - ia32_emit_binop(env, node); - be_emit_finish_line_gas(env, node); + ins_permuted = !ins_permuted; - be_emit_cstring(env, "\tmovsd "); - ia32_emit_dest_register(env, node, 0); - be_emit_cstring(env, ", (%esp)"); - be_emit_finish_line_gas(env, node); + tmp = in_true; + in_true = in_false; + in_false = tmp; + } else { + /* we need a mov */ + be_emit_cstring("\tmovl "); + emit_register(in_false, NULL); + be_emit_cstring(", "); + emit_register(out, NULL); + be_emit_finish_line_gas(node); } - be_emit_cstring(env, "\tcmpsd "); - be_emit_irprintf(env->emit, "%d, ", sse_pnc); - ia32_emit_binop(env, node); - be_emit_finish_line_gas(env, node); + if(ins_permuted) { + if(pnc & ia32_pn_Cmp_float) { + pnc = get_negated_pnc(pnc, mode_F); + } else { + pnc = get_negated_pnc(pnc, mode_Iu); + } + } - if (unord && sse_pnc != 3) { - be_emit_cstring(env, "\tandpd (%esp), "); - ia32_emit_dest_register(env, node, 0); - be_emit_finish_line_gas(env, node); + /* TODO: handling of Nans isn't correct yet */ - be_emit_cstring(env, "\taddl $8, %esp"); - be_emit_finish_line_gas(env, node); + be_emit_cstring("\tcmov"); + ia32_emit_cmp_suffix(pnc); + be_emit_char(' '); + if(get_ia32_op_type(node) == ia32_AddrModeS) { + ia32_emit_am(node); + } else { + emit_register(in_true, get_ia32_ls_mode(node)); } + be_emit_cstring(", "); + emit_register(out, get_ia32_ls_mode(node)); + be_emit_finish_line_gas(node); } /********************************************************* @@ -1127,9 +973,9 @@ typedef struct _branch_t { /* jump table for switch generation */ typedef struct _jmp_tbl_t { ir_node *defProj; /**< default target */ - int min_value; /**< smallest switch case */ - int max_value; /**< largest switch case */ - int num_branches; /**< number of jumps */ + long min_value; /**< smallest switch case */ + long max_value; /**< largest switch case */ + long num_branches; /**< number of jumps */ char *label; /**< label of the jump table */ branch_t *branches; /**< jump array */ } jmp_tbl_t; @@ -1137,8 +983,7 @@ typedef struct _jmp_tbl_t { /** * Compare two variables of type branch_t. Used to sort all switch cases */ -static -int ia32_cmp_branch_t(const void *a, const void *b) { +static int ia32_cmp_branch_t(const void *a, const void *b) { branch_t *b1 = (branch_t *)a; branch_t *b2 = (branch_t *)b; @@ -1153,11 +998,12 @@ int ia32_cmp_branch_t(const void *a, const void *b) { * possible otherwise a cmp-jmp cascade). Port from * cggg ia32 backend */ -static -void emit_ia32_SwitchJmp(ia32_emit_env_t *env, const ir_node *node) { +static void emit_ia32_SwitchJmp(const ir_node *node) +{ unsigned long interval; int last_value, i; long pnc; + long default_pn; jmp_tbl_t tbl; ir_node *proj; const ir_edge_t *edge; @@ -1166,11 +1012,12 @@ void emit_ia32_SwitchJmp(ia32_emit_env_t *env, const ir_node *node) { tbl.label = xmalloc(SNPRINTF_BUF_LEN); tbl.label = get_unique_label(tbl.label, SNPRINTF_BUF_LEN, ".TBL_"); tbl.defProj = NULL; - tbl.num_branches = get_irn_n_edges(node); + tbl.num_branches = get_irn_n_edges(node) - 1; tbl.branches = xcalloc(tbl.num_branches, sizeof(tbl.branches[0])); tbl.min_value = INT_MAX; tbl.max_value = INT_MIN; + default_pn = get_ia32_condcode(node); i = 0; /* go over all proj's and collect them */ foreach_out_edge(node, edge) { @@ -1179,21 +1026,22 @@ void emit_ia32_SwitchJmp(ia32_emit_env_t *env, const ir_node *node) { pnc = get_Proj_proj(proj); - /* create branch entry */ - tbl.branches[i].target = proj; - tbl.branches[i].value = pnc; - - tbl.min_value = pnc < tbl.min_value ? pnc : tbl.min_value; - tbl.max_value = pnc > tbl.max_value ? pnc : tbl.max_value; - /* check for default proj */ - if (pnc == get_ia32_pncode(node)) { - assert(tbl.defProj == NULL && "found two defProjs at SwitchJmp"); + if (pnc == default_pn) { + assert(tbl.defProj == NULL && "found two default Projs at SwitchJmp"); tbl.defProj = proj; + } else { + tbl.min_value = pnc < tbl.min_value ? pnc : tbl.min_value; + tbl.max_value = pnc > tbl.max_value ? pnc : tbl.max_value; + + /* create branch entry */ + tbl.branches[i].target = proj; + tbl.branches[i].value = pnc; + ++i; } - i++; } + assert(i == tbl.num_branches); /* sort the branches by their number */ qsort(tbl.branches, tbl.num_branches, sizeof(tbl.branches[0]), ia32_cmp_branch_t); @@ -1202,53 +1050,53 @@ void emit_ia32_SwitchJmp(ia32_emit_env_t *env, const ir_node *node) { interval = tbl.max_value - tbl.min_value; /* emit the table */ - be_emit_cstring(env, "\tcmpl $"); - be_emit_irprintf(env->emit, "%u, ", interval); - ia32_emit_source_register(env, node, 0); - be_emit_finish_line_gas(env, node); + be_emit_cstring("\tcmpl $"); + be_emit_irprintf("%u, ", interval); + ia32_emit_source_register(node, 0); + be_emit_finish_line_gas(node); - be_emit_cstring(env, "\tja "); - ia32_emit_cfop_target(env, tbl.defProj); - be_emit_finish_line_gas(env, node); + be_emit_cstring("\tja "); + ia32_emit_cfop_target(tbl.defProj); + be_emit_finish_line_gas(node); if (tbl.num_branches > 1) { /* create table */ - be_emit_cstring(env, "\tjmp *"); - be_emit_string(env, tbl.label); - be_emit_cstring(env, "(,"); - ia32_emit_source_register(env, node, 0); - be_emit_cstring(env, ",4)"); - be_emit_finish_line_gas(env, node); + be_emit_cstring("\tjmp *"); + be_emit_string(tbl.label); + be_emit_cstring("(,"); + ia32_emit_source_register(node, 0); + be_emit_cstring(",4)"); + be_emit_finish_line_gas(node); - be_gas_emit_switch_section(env->emit, GAS_SECTION_RODATA); - be_emit_cstring(env, "\t.align 4\n"); - be_emit_write_line(env); + be_gas_emit_switch_section(GAS_SECTION_RODATA); + be_emit_cstring("\t.align 4\n"); + be_emit_write_line(); - be_emit_string(env, tbl.label); - be_emit_cstring(env, ":\n"); - be_emit_write_line(env); + be_emit_string(tbl.label); + be_emit_cstring(":\n"); + be_emit_write_line(); - be_emit_cstring(env, ".long "); - ia32_emit_cfop_target(env, tbl.branches[0].target); - be_emit_finish_line_gas(env, NULL); + be_emit_cstring(".long "); + ia32_emit_cfop_target(tbl.branches[0].target); + be_emit_finish_line_gas(NULL); last_value = tbl.branches[0].value; for (i = 1; i < tbl.num_branches; ++i) { while (++last_value < tbl.branches[i].value) { - be_emit_cstring(env, ".long "); - ia32_emit_cfop_target(env, tbl.defProj); - be_emit_finish_line_gas(env, NULL); + be_emit_cstring(".long "); + ia32_emit_cfop_target(tbl.defProj); + be_emit_finish_line_gas(NULL); } - be_emit_cstring(env, ".long "); - ia32_emit_cfop_target(env, tbl.branches[i].target); - be_emit_finish_line_gas(env, NULL); + be_emit_cstring(".long "); + ia32_emit_cfop_target(tbl.branches[i].target); + be_emit_finish_line_gas(NULL); } - be_gas_emit_switch_section(env->emit, GAS_SECTION_TEXT); + be_gas_emit_switch_section(GAS_SECTION_TEXT); } else { /* one jump is enough */ - be_emit_cstring(env, "\tjmp "); - ia32_emit_cfop_target(env, tbl.branches[0].target); - be_emit_finish_line_gas(env, node); + be_emit_cstring("\tjmp "); + ia32_emit_cfop_target(tbl.branches[0].target); + be_emit_finish_line_gas(node); } if (tbl.label) @@ -1260,8 +1108,8 @@ void emit_ia32_SwitchJmp(ia32_emit_env_t *env, const ir_node *node) { /** * Emits code for a unconditional jump. */ -static -void emit_Jmp(ia32_emit_env_t *env, const ir_node *node) { +static void emit_Jmp(const ir_node *node) +{ ir_node *block, *next_block; /* for now, the code works for scheduled and non-schedules blocks */ @@ -1270,14 +1118,194 @@ void emit_Jmp(ia32_emit_env_t *env, const ir_node *node) { /* we have a block schedule */ next_block = next_blk_sched(block); if (get_cfop_target_block(node) != next_block) { - be_emit_cstring(env, "\tjmp "); - ia32_emit_cfop_target(env, node); + be_emit_cstring("\tjmp "); + ia32_emit_cfop_target(node); + } else { + be_emit_cstring("\t/* fallthrough to "); + ia32_emit_cfop_target(node); + be_emit_cstring(" */"); + } + be_emit_finish_line_gas(node); +} + +static void emit_ia32_Immediate(const ir_node *node) +{ + const ia32_immediate_attr_t *attr = get_ia32_immediate_attr_const(node); + + be_emit_char('$'); + if(attr->symconst != NULL) { + if(attr->sc_sign) + be_emit_char('-'); + ia32_emit_entity(attr->symconst, 0); + } + if(attr->symconst == NULL || attr->offset != 0) { + if(attr->symconst != NULL) { + be_emit_irprintf("%+d", attr->offset); + } else { + be_emit_irprintf("0x%X", attr->offset); + } + } +} + +/** + * Emit an inline assembler operand. + * + * @param node the ia32_ASM node + * @param s points to the operand (a %c) + * + * @return pointer to the first char in s NOT in the current operand + */ +static const char* emit_asm_operand(const ir_node *node, const char *s) +{ + const ia32_attr_t *ia32_attr = get_ia32_attr_const(node); + const ia32_asm_attr_t *attr = CONST_CAST_IA32_ATTR(ia32_asm_attr_t, + ia32_attr); + const arch_register_t *reg; + const ia32_asm_reg_t *asm_regs = attr->register_map; + const ia32_asm_reg_t *asm_reg; + const char *reg_name; + char c; + char modifier = 0; + int num = -1; + int p; + + assert(*s == '%'); + c = *(++s); + + /* parse modifiers */ + switch(c) { + case 0: + ir_fprintf(stderr, "Warning: asm text (%+F) ends with %\n", node); + be_emit_char('%'); + return s + 1; + case '%': + be_emit_char('%'); + return s + 1; + case 'w': + case 'b': + case 'h': + modifier = c; + ++s; + break; + case '0': + case '1': + case '2': + case '3': + case '4': + case '5': + case '6': + case '7': + case '8': + case '9': + break; + default: + ir_fprintf(stderr, "Warning: asm text (%+F) contains unknown modifier " + "'%c' for asm op\n", node, c); + ++s; + break; + } + + /* parse number */ + sscanf(s, "%d%n", &num, &p); + if(num < 0) { + ir_fprintf(stderr, "Warning: Couldn't parse assembler operand (%+F)\n", + node); + return s; + } else { + s += p; + } + + if(num < 0 || num >= ARR_LEN(asm_regs)) { + ir_fprintf(stderr, "Error: Custom assembler references invalid " + "input/output (%+F)\n", node); + return s; + } + asm_reg = & asm_regs[num]; + assert(asm_reg->valid); + + /* get register */ + if(asm_reg->use_input == 0) { + reg = get_out_reg(node, asm_reg->inout_pos); + } else { + ir_node *pred = get_irn_n(node, asm_reg->inout_pos); + + /* might be an immediate value */ + if(is_ia32_Immediate(pred)) { + emit_ia32_Immediate(pred); + return s; + } + reg = get_in_reg(node, asm_reg->inout_pos); + } + if(reg == NULL) { + ir_fprintf(stderr, "Warning: no register assigned for %d asm op " + "(%+F)\n", num, node); + return s; + } + + if(asm_reg->memory) { + be_emit_char('('); + } + + /* emit it */ + if(modifier != 0) { + be_emit_char('%'); + switch(modifier) { + case 'b': + reg_name = ia32_get_mapped_reg_name(isa->regs_8bit, reg); + break; + case 'h': + reg_name = ia32_get_mapped_reg_name(isa->regs_8bit_high, reg); + break; + case 'w': + reg_name = ia32_get_mapped_reg_name(isa->regs_16bit, reg); + break; + default: + panic("Invalid asm op modifier"); + } + be_emit_string(reg_name); } else { - be_emit_cstring(env, "\t/* fallthrough to "); - ia32_emit_cfop_target(env, node); - be_emit_cstring(env, " */"); + emit_register(reg, asm_reg->mode); + } + + if(asm_reg->memory) { + be_emit_char(')'); + } + + return s; +} + +/** + * Emits code for an ASM pseudo op. + */ +static void emit_ia32_Asm(const ir_node *node) +{ + const void *gen_attr = get_irn_generic_attr_const(node); + const ia32_asm_attr_t *attr + = CONST_CAST_IA32_ATTR(ia32_asm_attr_t, gen_attr); + ident *asm_text = attr->asm_text; + const char *s = get_id_str(asm_text); + + be_emit_cstring("# Begin ASM \t"); + be_emit_finish_line_gas(node); + + if (s[0] != '\t') + be_emit_char('\t'); + + while(*s != 0) { + if(*s == '%') { + s = emit_asm_operand(node, s); + continue; + } else { + be_emit_char(*s); + } + ++s; } - be_emit_finish_line_gas(env, node); + + be_emit_char('\n'); + be_emit_write_line(); + + be_emit_cstring("# End ASM\n"); + be_emit_write_line(); } /********************************** @@ -1294,25 +1322,24 @@ void emit_Jmp(ia32_emit_env_t *env, const ir_node *node) { /** * Emit movsb/w instructions to make mov count divideable by 4 */ -static -void emit_CopyB_prolog(ia32_emit_env_t *env, int rem) { - be_emit_cstring(env, "\tcld"); - be_emit_finish_line_gas(env, NULL); +static void emit_CopyB_prolog(unsigned size) { + be_emit_cstring("\tcld"); + be_emit_finish_line_gas(NULL); - switch(rem) { + switch (size) { case 1: - be_emit_cstring(env, "\tmovsb"); - be_emit_finish_line_gas(env, NULL); + be_emit_cstring("\tmovsb"); + be_emit_finish_line_gas(NULL); break; case 2: - be_emit_cstring(env, "\tmovsw"); - be_emit_finish_line_gas(env, NULL); + be_emit_cstring("\tmovsw"); + be_emit_finish_line_gas(NULL); break; case 3: - be_emit_cstring(env, "\tmovsb"); - be_emit_finish_line_gas(env, NULL); - be_emit_cstring(env, "\tmovsw"); - be_emit_finish_line_gas(env, NULL); + be_emit_cstring("\tmovsb"); + be_emit_finish_line_gas(NULL); + be_emit_cstring("\tmovsw"); + be_emit_finish_line_gas(NULL); break; } } @@ -1320,31 +1347,29 @@ void emit_CopyB_prolog(ia32_emit_env_t *env, int rem) { /** * Emit rep movsd instruction for memcopy. */ -static -void emit_ia32_CopyB(ia32_emit_env_t *env, const ir_node *node) { - tarval *tv = get_ia32_Immop_tarval(node); - int rem = get_tarval_long(tv); +static void emit_ia32_CopyB(const ir_node *node) +{ + unsigned size = get_ia32_copyb_size(node); - emit_CopyB_prolog(env, rem); + emit_CopyB_prolog(size); - be_emit_cstring(env, "\trep movsd"); - be_emit_finish_line_gas(env, node); + be_emit_cstring("\trep movsd"); + be_emit_finish_line_gas(node); } /** * Emits unrolled memcopy. */ -static -void emit_ia32_CopyB_i(ia32_emit_env_t *env, const ir_node *node) { - tarval *tv = get_ia32_Immop_tarval(node); - int size = get_tarval_long(tv); +static void emit_ia32_CopyB_i(const ir_node *node) +{ + unsigned size = get_ia32_copyb_size(node); - emit_CopyB_prolog(env, size & 0x3); + emit_CopyB_prolog(size & 0x3); size >>= 2; while (size--) { - be_emit_cstring(env, "\tmovsd"); - be_emit_finish_line_gas(env, NULL); + be_emit_cstring("\tmovsd"); + be_emit_finish_line_gas(NULL); } } @@ -1363,76 +1388,74 @@ void emit_ia32_CopyB_i(ia32_emit_env_t *env, const ir_node *node) { /** * Emit code for conversions (I, FP), (FP, I) and (FP, FP). */ -static -void emit_ia32_Conv_with_FP(ia32_emit_env_t *env, const ir_node *node) { +static void emit_ia32_Conv_with_FP(const ir_node *node) +{ ir_mode *ls_mode = get_ia32_ls_mode(node); int ls_bits = get_mode_size_bits(ls_mode); - be_emit_cstring(env, "\tcvt"); + be_emit_cstring("\tcvt"); if(is_ia32_Conv_I2FP(node)) { if(ls_bits == 32) { - be_emit_cstring(env, "si2ss"); + be_emit_cstring("si2ss"); } else { - be_emit_cstring(env, "si2sd"); + be_emit_cstring("si2sd"); } } else if(is_ia32_Conv_FP2I(node)) { if(ls_bits == 32) { - be_emit_cstring(env, "ss2si"); + be_emit_cstring("ss2si"); } else { - be_emit_cstring(env, "sd2si"); + be_emit_cstring("sd2si"); } } else { assert(is_ia32_Conv_FP2FP(node)); if(ls_bits == 32) { - be_emit_cstring(env, "sd2ss"); + be_emit_cstring("sd2ss"); } else { - be_emit_cstring(env, "ss2sd"); + be_emit_cstring("ss2sd"); } } - be_emit_char(env, ' '); + be_emit_char(' '); switch(get_ia32_op_type(node)) { case ia32_Normal: - ia32_emit_source_register(env, node, 2); - be_emit_cstring(env, ", "); - ia32_emit_dest_register(env, node, 0); + ia32_emit_source_register(node, n_ia32_unary_op); break; case ia32_AddrModeS: - ia32_emit_dest_register(env, node, 0); - be_emit_cstring(env, ", "); - ia32_emit_am(env, node); + ia32_emit_am(node); break; default: assert(0 && "unsupported op type for Conv"); } - be_emit_finish_line_gas(env, node); + be_emit_cstring(", "); + ia32_emit_dest_register(node, 0); + be_emit_finish_line_gas(node); } -static -void emit_ia32_Conv_I2FP(ia32_emit_env_t *env, const ir_node *node) { - emit_ia32_Conv_with_FP(env, node); +static void emit_ia32_Conv_I2FP(const ir_node *node) +{ + emit_ia32_Conv_with_FP(node); } -static -void emit_ia32_Conv_FP2I(ia32_emit_env_t *env, const ir_node *node) { - emit_ia32_Conv_with_FP(env, node); +static void emit_ia32_Conv_FP2I(const ir_node *node) +{ + emit_ia32_Conv_with_FP(node); } -static -void emit_ia32_Conv_FP2FP(ia32_emit_env_t *env, const ir_node *node) { - emit_ia32_Conv_with_FP(env, node); +static void emit_ia32_Conv_FP2FP(const ir_node *node) +{ + emit_ia32_Conv_with_FP(node); } /** * Emits code for an Int conversion. */ -static -void emit_ia32_Conv_I2I(ia32_emit_env_t *env, const ir_node *node) { - const char *sign_suffix; - ir_mode *smaller_mode = get_ia32_ls_mode(node); - int smaller_bits = get_mode_size_bits(smaller_mode); - int signed_mode; +static void emit_ia32_Conv_I2I(const ir_node *node) +{ + const char *sign_suffix; + ir_mode *smaller_mode = get_ia32_ls_mode(node); + int smaller_bits = get_mode_size_bits(smaller_mode); + int signed_mode; const arch_register_t *in_reg, *out_reg; assert(!mode_is_float(smaller_mode)); @@ -1447,64 +1470,44 @@ void emit_ia32_Conv_I2I(ia32_emit_env_t *env, const ir_node *node) { sign_suffix = signed_mode ? "s" : "z"; } + out_reg = get_out_reg(node, 0); + switch(get_ia32_op_type(node)) { case ia32_Normal: - in_reg = get_in_reg(env, node, 2); - out_reg = get_out_reg(env, node, 0); + in_reg = get_in_reg(node, n_ia32_unary_op); - if (REGS_ARE_EQUAL(in_reg, &ia32_gp_regs[REG_EAX]) && - REGS_ARE_EQUAL(out_reg, in_reg) && - signed_mode) + if (in_reg == &ia32_gp_regs[REG_EAX] && + out_reg == &ia32_gp_regs[REG_EAX] && + signed_mode && + smaller_bits == 16) { /* argument and result are both in EAX and */ - /* signedness is ok: -> use converts */ - if (smaller_bits == 8) { - be_emit_cstring(env, "\tcbtw"); - } else if (smaller_bits == 16) { - be_emit_cstring(env, "\tcwtl"); - } else { - assert(0); - } - } else if (REGS_ARE_EQUAL(out_reg, in_reg) && !signed_mode) { - /* argument and result are in the same register */ - /* and signedness is ok: -> use and with mask */ - int mask = (1 << smaller_bits) - 1; - be_emit_cstring(env, "\tandl $0x"); - be_emit_irprintf(env->emit, "%x, ", mask); - ia32_emit_dest_register(env, node, 0); + /* signedness is ok: -> use the smaller cwtl opcode */ + be_emit_cstring("\tcwtl"); } else { - const char *sreg = ia32_get_reg_name_for_mode(env, smaller_mode, in_reg); - - be_emit_cstring(env, "\tmov"); - be_emit_string(env, sign_suffix); - ia32_emit_mode_suffix(env, smaller_mode); - be_emit_cstring(env, "l %"); - be_emit_string(env, sreg); - be_emit_cstring(env, ", "); - ia32_emit_dest_register(env, node, 0); + be_emit_cstring("\tmov"); + be_emit_string(sign_suffix); + ia32_emit_mode_suffix_mode(smaller_mode); + be_emit_cstring("l "); + emit_register(in_reg, smaller_mode); + be_emit_cstring(", "); + emit_register(out_reg, NULL); } break; case ia32_AddrModeS: { - be_emit_cstring(env, "\tmov"); - be_emit_string(env, sign_suffix); - ia32_emit_mode_suffix(env, smaller_mode); - be_emit_cstring(env, "l %"); - ia32_emit_am(env, node); - be_emit_cstring(env, ", "); - ia32_emit_dest_register(env, node, 0); + be_emit_cstring("\tmov"); + be_emit_string(sign_suffix); + ia32_emit_mode_suffix_mode(smaller_mode); + be_emit_cstring("l "); + ia32_emit_am(node); + be_emit_cstring(", "); + emit_register(out_reg, NULL); break; } default: assert(0 && "unsupported op type for Conv"); } - be_emit_finish_line_gas(env, node); -} - -/** - * Emits code for an 8Bit Int conversion. - */ -void emit_ia32_Conv_I2I8Bit(ia32_emit_env_t *env, const ir_node *node) { - emit_ia32_Conv_I2I(env, node); + be_emit_finish_line_gas(node); } @@ -1521,194 +1524,300 @@ void emit_ia32_Conv_I2I8Bit(ia32_emit_env_t *env, const ir_node *node) { /** * Emits a backend call */ -static -void emit_be_Call(ia32_emit_env_t *env, const ir_node *node) { +static void emit_be_Call(const ir_node *node) +{ ir_entity *ent = be_Call_get_entity(node); - be_emit_cstring(env, "\tcall "); + be_emit_cstring("\tcall "); if (ent) { - mark_entity_visited(ent); - be_emit_string(env, get_entity_ld_name(ent)); + ia32_emit_entity(ent, 1); } else { - be_emit_char(env, '*'); - ia32_emit_dest_register(env, get_irn_n(node, be_pos_Call_ptr), 0); + const arch_register_t *reg = get_in_reg(node, be_pos_Call_ptr); + be_emit_char('*'); + emit_register(reg, NULL); } - be_emit_finish_line_gas(env, node); + be_emit_finish_line_gas(node); } /** * Emits code to increase stack pointer. */ -static -void emit_be_IncSP(ia32_emit_env_t *env, const ir_node *node) { - int offs = be_get_IncSP_offset(node); +static void emit_be_IncSP(const ir_node *node) +{ + int offs = be_get_IncSP_offset(node); + const arch_register_t *reg = arch_get_irn_register(arch_env, node); if (offs == 0) return; if (offs > 0) { - be_emit_cstring(env, "\tsubl $"); - be_emit_irprintf(env->emit, "%u, ", offs); - ia32_emit_source_register(env, node, 0); + be_emit_cstring("\tsubl $"); + be_emit_irprintf("%u, ", offs); + emit_register(reg, NULL); } else { - be_emit_cstring(env, "\taddl $"); - be_emit_irprintf(env->emit, "%u, ", -offs); - ia32_emit_source_register(env, node, 0); + be_emit_cstring("\taddl $"); + be_emit_irprintf("%u, ", -offs); + emit_register(reg, NULL); } - be_emit_finish_line_gas(env, node); -} - -/** - * Emits code to set stack pointer. - */ -static -void emit_be_SetSP(ia32_emit_env_t *env, const ir_node *node) { - be_emit_cstring(env, "\tmovl "); - ia32_emit_source_register(env, node, 2); - be_emit_cstring(env, ", "); - ia32_emit_dest_register(env, node, 0); - be_emit_finish_line_gas(env, node); + be_emit_finish_line_gas(node); } /** * Emits code for Copy/CopyKeep. */ -static -void Copy_emitter(ia32_emit_env_t *env, const ir_node *node, const ir_node *op) +static void Copy_emitter(const ir_node *node, const ir_node *op) { - const arch_env_t *aenv = env->arch_env; - ir_mode *mode; + const arch_register_t *in = arch_get_irn_register(arch_env, op); + const arch_register_t *out = arch_get_irn_register(arch_env, node); + ir_mode *mode; - if (REGS_ARE_EQUAL(arch_get_irn_register(aenv, node), arch_get_irn_register(aenv, op)) || - arch_register_type_is(arch_get_irn_register(aenv, op), virtual)) + if(in == out) { + return; + } + if(is_unknown_reg(in)) + return; + /* copies of vf nodes aren't real... */ + if(arch_register_get_class(in) == &ia32_reg_classes[CLASS_ia32_vfp]) return; mode = get_irn_mode(node); if (mode == mode_E) { - be_emit_cstring(env, "\tmovsd "); - ia32_emit_source_register(env, node, 0); - be_emit_cstring(env, ", "); - ia32_emit_dest_register(env, node, 0); + be_emit_cstring("\tmovsd "); + emit_register(in, NULL); + be_emit_cstring(", "); + emit_register(out, NULL); } else { - be_emit_cstring(env, "\tmovl "); - ia32_emit_source_register(env, node, 0); - be_emit_cstring(env, ", "); - ia32_emit_dest_register(env, node, 0); + be_emit_cstring("\tmovl "); + emit_register(in, NULL); + be_emit_cstring(", "); + emit_register(out, NULL); } - be_emit_finish_line_gas(env, node); + be_emit_finish_line_gas(node); } -static -void emit_be_Copy(ia32_emit_env_t *env, const ir_node *node) { - Copy_emitter(env, node, be_get_Copy_op(node)); +static void emit_be_Copy(const ir_node *node) +{ + Copy_emitter(node, be_get_Copy_op(node)); } -static -void emit_be_CopyKeep(ia32_emit_env_t *env, const ir_node *node) { - Copy_emitter(env, node, be_get_CopyKeep_op(node)); +static void emit_be_CopyKeep(const ir_node *node) +{ + Copy_emitter(node, be_get_CopyKeep_op(node)); } /** * Emits code for exchange. */ -static -void emit_be_Perm(ia32_emit_env_t *env, const ir_node *node) { - const arch_register_t *in1, *in2; - const arch_register_class_t *cls1, *cls2; +static void emit_be_Perm(const ir_node *node) +{ + const arch_register_t *in0, *in1; + const arch_register_class_t *cls0, *cls1; - in1 = arch_get_irn_register(env->arch_env, get_irn_n(node, 0)); - in2 = arch_get_irn_register(env->arch_env, get_irn_n(node, 1)); + in0 = arch_get_irn_register(arch_env, get_irn_n(node, 0)); + in1 = arch_get_irn_register(arch_env, get_irn_n(node, 1)); + cls0 = arch_register_get_class(in0); cls1 = arch_register_get_class(in1); - cls2 = arch_register_get_class(in2); - - assert(cls1 == cls2 && "Register class mismatch at Perm"); - - if (cls1 == &ia32_reg_classes[CLASS_ia32_gp]) { - be_emit_cstring(env, "\txchg "); - ia32_emit_source_register(env, node, 1); - be_emit_cstring(env, ", "); - ia32_emit_source_register(env, node, 0); - be_emit_finish_line_gas(env, node); - } else if (cls1 == &ia32_reg_classes[CLASS_ia32_xmm]) { - be_emit_cstring(env, "\txorpd "); - ia32_emit_source_register(env, node, 1); - be_emit_cstring(env, ", "); - ia32_emit_source_register(env, node, 0); - be_emit_finish_line_gas(env, NULL); - - be_emit_cstring(env, "\txorpd "); - ia32_emit_source_register(env, node, 0); - be_emit_cstring(env, ", "); - ia32_emit_source_register(env, node, 1); - be_emit_finish_line_gas(env, NULL); - - be_emit_cstring(env, "\txorpd "); - ia32_emit_source_register(env, node, 1); - be_emit_cstring(env, ", "); - ia32_emit_source_register(env, node, 0); - be_emit_finish_line_gas(env, node); - } else if (cls1 == &ia32_reg_classes[CLASS_ia32_vfp]) { + + assert(cls0 == cls1 && "Register class mismatch at Perm"); + + if (cls0 == &ia32_reg_classes[CLASS_ia32_gp]) { + be_emit_cstring("\txchg "); + emit_register(in1, NULL); + be_emit_cstring(", "); + emit_register(in0, NULL); + be_emit_finish_line_gas(node); + } else if (cls0 == &ia32_reg_classes[CLASS_ia32_xmm]) { + be_emit_cstring("\txorpd "); + emit_register(in1, NULL); + be_emit_cstring(", "); + emit_register(in0, NULL); + be_emit_finish_line_gas(NULL); + + be_emit_cstring("\txorpd "); + emit_register(in0, NULL); + be_emit_cstring(", "); + emit_register(in1, NULL); + be_emit_finish_line_gas(NULL); + + be_emit_cstring("\txorpd "); + emit_register(in1, NULL); + be_emit_cstring(", "); + emit_register(in0, NULL); + be_emit_finish_line_gas(node); + } else if (cls0 == &ia32_reg_classes[CLASS_ia32_vfp]) { /* is a NOP */ - } else if (cls1 == &ia32_reg_classes[CLASS_ia32_st]) { + } else if (cls0 == &ia32_reg_classes[CLASS_ia32_st]) { /* is a NOP */ + } else { + panic("unexpected register class in be_Perm (%+F)\n", node); } } /** * Emits code for Constant loading. */ -static -void emit_ia32_Const(ia32_emit_env_t *env, const ir_node *node) { - ia32_immop_type_t imm_tp = get_ia32_immop_type(node); - - if (imm_tp == ia32_ImmSymConst) { - be_emit_cstring(env, "\tmovl "); - ia32_emit_immediate(env, node); - be_emit_cstring(env, ", "); - ia32_emit_dest_register(env, node, 0); +static void emit_ia32_Const(const ir_node *node) +{ + be_emit_cstring("\tmovl "); + emit_ia32_Immediate(node); + be_emit_cstring(", "); + ia32_emit_dest_register(node, 0); + + be_emit_finish_line_gas(node); +} + +/** + * Emits code to load the TLS base + */ +static void emit_ia32_LdTls(const ir_node *node) +{ + be_emit_cstring("\tmovl %gs:0, "); + ia32_emit_dest_register(node, 0); + be_emit_finish_line_gas(node); +} + +/* helper function for emit_ia32_Minus64Bit */ +static void emit_mov(const ir_node* node, const arch_register_t *src, const arch_register_t *dst) +{ + be_emit_cstring("\tmovl "); + emit_register(src, NULL); + be_emit_cstring(", "); + emit_register(dst, NULL); + be_emit_finish_line_gas(node); +} + +/* helper function for emit_ia32_Minus64Bit */ +static void emit_neg(const ir_node* node, const arch_register_t *reg) +{ + be_emit_cstring("\tnegl "); + emit_register(reg, NULL); + be_emit_finish_line_gas(node); +} + +/* helper function for emit_ia32_Minus64Bit */ +static void emit_sbb0(const ir_node* node, const arch_register_t *reg) +{ + be_emit_cstring("\tsbbl $0, "); + emit_register(reg, NULL); + be_emit_finish_line_gas(node); +} + +/* helper function for emit_ia32_Minus64Bit */ +static void emit_sbb(const ir_node* node, const arch_register_t *src, const arch_register_t *dst) +{ + be_emit_cstring("\tsbbl "); + emit_register(src, NULL); + be_emit_cstring(", "); + emit_register(dst, NULL); + be_emit_finish_line_gas(node); +} + +/* helper function for emit_ia32_Minus64Bit */ +static void emit_xchg(const ir_node* node, const arch_register_t *src, const arch_register_t *dst) +{ + be_emit_cstring("\txchgl "); + emit_register(src, NULL); + be_emit_cstring(", "); + emit_register(dst, NULL); + be_emit_finish_line_gas(node); +} + +/* helper function for emit_ia32_Minus64Bit */ +static void emit_zero(const ir_node* node, const arch_register_t *reg) +{ + be_emit_cstring("\txorl "); + emit_register(reg, NULL); + be_emit_cstring(", "); + emit_register(reg, NULL); + be_emit_finish_line_gas(node); +} + +static void emit_ia32_Minus64Bit(const ir_node *node) +{ + const arch_register_t *in_lo = get_in_reg(node, 0); + const arch_register_t *in_hi = get_in_reg(node, 1); + const arch_register_t *out_lo = get_out_reg(node, 0); + const arch_register_t *out_hi = get_out_reg(node, 1); + + if (out_lo == in_lo) { + if (out_hi != in_hi) { + /* a -> a, b -> d */ + goto zero_neg; + } else { + /* a -> a, b -> b */ + goto normal_neg; + } + } else if (out_lo == in_hi) { + if (out_hi == in_lo) { + /* a -> b, b -> a */ + emit_xchg(node, in_lo, in_hi); + goto normal_neg; + } else { + /* a -> b, b -> d */ + emit_mov(node, in_hi, out_hi); + emit_mov(node, in_lo, out_lo); + goto normal_neg; + } } else { - tarval *tv = get_ia32_Immop_tarval(node); - assert(get_irn_mode(node) == mode_Iu); - /* beware: in some rare cases mode is mode_b which has no tarval_null() */ - if (tarval_is_null(tv)) { - if (env->isa->opt_arch == arch_pentium_4) { - /* P4 prefers sub r, r, others xor r, r */ - be_emit_cstring(env, "\tsubl "); - } else { - be_emit_cstring(env, "\txorl "); - } - ia32_emit_dest_register(env, node, 0); - be_emit_cstring(env, ", "); - ia32_emit_dest_register(env, node, 0); + if (out_hi == in_lo) { + /* a -> c, b -> a */ + emit_mov(node, in_lo, out_lo); + goto zero_neg; + } else if (out_hi == in_hi) { + /* a -> c, b -> b */ + emit_mov(node, in_lo, out_lo); + goto normal_neg; } else { - be_emit_cstring(env, "\tmovl "); - ia32_emit_immediate(env, node); - be_emit_cstring(env, ", "); - ia32_emit_dest_register(env, node, 0); + /* a -> c, b -> d */ + emit_mov(node, in_lo, out_lo); + goto zero_neg; } } - be_emit_finish_line_gas(env, node); + +normal_neg: + emit_neg( node, out_hi); + emit_neg( node, out_lo); + emit_sbb0(node, out_hi); + return; + +zero_neg: + emit_zero(node, out_hi); + emit_neg( node, out_lo); + emit_sbb( node, in_hi, out_hi); } -/** - * Emits code to load the TLS base - */ -static -void emit_ia32_LdTls(ia32_emit_env_t *env, const ir_node *node) { - be_emit_cstring(env, "\tmovl %gs:0, "); - ia32_emit_dest_register(env, node, 0); - be_emit_finish_line_gas(env, node); +static void emit_ia32_GetEIP(const ir_node *node) +{ + be_emit_cstring("\tcall "); + be_emit_string(pic_base_label); + be_emit_finish_line_gas(node); + + be_emit_string(pic_base_label); + be_emit_cstring(":\n"); + be_emit_write_line(); + + be_emit_cstring("\tpopl "); + ia32_emit_dest_register(node, 0); + be_emit_char('\n'); + be_emit_write_line(); } -static -void emit_be_Return(ia32_emit_env_t *env, const ir_node *node) { - be_emit_cstring(env, "\tret"); - be_emit_finish_line_gas(env, node); +static void emit_be_Return(const ir_node *node) +{ + unsigned pop; + be_emit_cstring("\tret"); + + pop = be_Return_get_pop(node); + if (pop > 0 || be_Return_get_emit_pop(node)) { + be_emit_irprintf(" $%d", pop); + } + be_emit_finish_line_gas(node); } -static -void emit_Nothing(ia32_emit_env_t *env, const ir_node *node) { +static void emit_Nothing(const ir_node *node) +{ + (void) node; } @@ -1726,8 +1835,7 @@ void emit_Nothing(ia32_emit_env_t *env, const ir_node *node) { * Enters the emitter functions for handled nodes into the generic * pointer of an opcode. */ -static -void ia32_register_emitters(void) { +static void ia32_register_emitters(void) { #define IA32_EMIT2(a,b) op_ia32_##a->ops.generic = (op_func)emit_ia32_##b #define IA32_EMIT(a) IA32_EMIT2(a,a) @@ -1743,14 +1851,9 @@ void ia32_register_emitters(void) { ia32_register_spec_emitters(); /* other ia32 emitter functions */ - IA32_EMIT(CondJmp); - IA32_EMIT(TestJmp); - IA32_EMIT(CJmp); - IA32_EMIT(CJmpAM); - IA32_EMIT(CmpCMov); - IA32_EMIT(PsiCondCMov); - IA32_EMIT(CmpSet); - IA32_EMIT(PsiCondSet); + IA32_EMIT(Asm); + IA32_EMIT(CMov); + IA32_EMIT(IMul); IA32_EMIT(SwitchJmp); IA32_EMIT(CopyB); IA32_EMIT(CopyB_i); @@ -1758,24 +1861,16 @@ void ia32_register_emitters(void) { IA32_EMIT(Conv_FP2I); IA32_EMIT(Conv_FP2FP); IA32_EMIT(Conv_I2I); - IA32_EMIT(Conv_I2I8Bit); + IA32_EMIT2(Conv_I2I8Bit, Conv_I2I); IA32_EMIT(Const); IA32_EMIT(LdTls); - IA32_EMIT(xCmp); - IA32_EMIT(xCmpSet); - IA32_EMIT(xCmpCMov); - IA32_EMIT(xCondJmp); - IA32_EMIT2(fcomJmp, x87CondJmp); - IA32_EMIT2(fcompJmp, x87CondJmp); - IA32_EMIT2(fcomppJmp, x87CondJmp); - IA32_EMIT2(fcomrJmp, x87CondJmp); - IA32_EMIT2(fcomrpJmp, x87CondJmp); - IA32_EMIT2(fcomrppJmp, x87CondJmp); + IA32_EMIT(Minus64Bit); + IA32_EMIT(Jcc); + IA32_EMIT(GetEIP); /* benode emitter */ BE_EMIT(Call); BE_EMIT(IncSP); - BE_EMIT(SetSP); BE_EMIT(Copy); BE_EMIT(CopyKeep); BE_EMIT(Perm); @@ -1798,289 +1893,218 @@ void ia32_register_emitters(void) { #undef IA32_EMIT } -static const char *last_name = NULL; -static unsigned last_line = -1; -static unsigned num = -1; - -/** - * Emit the debug support for node node. - */ -static -void ia32_emit_dbg(ia32_emit_env_t *env, const ir_node *node) { - dbg_info *db = get_irn_dbg_info(node); - unsigned lineno; - const char *fname = be_retrieve_dbg_info(db, &lineno); - - if (! env->cg->birg->main_env->options->stabs_debug_support) - return; - - if (fname) { - if (last_name != fname) { - last_line = -1; - be_dbg_include_begin(env->cg->birg->main_env->db_handle, fname); - last_name = fname; - } - if (last_line != lineno) { - char name[64]; - - snprintf(name, sizeof(name), ".LM%u", ++num); - last_line = lineno; - be_dbg_line(env->cg->birg->main_env->db_handle, lineno, name); - be_emit_string(env, name); - be_emit_cstring(env, ":\n"); - be_emit_write_line(env); - } - } -} - -typedef void (*emit_func_ptr) (ia32_emit_env_t *, const ir_node *); +typedef void (*emit_func_ptr) (const ir_node *); /** * Emits code for a node. */ -static -void ia32_emit_node(ia32_emit_env_t *env, const ir_node *node) { +static void ia32_emit_node(const ir_node *node) +{ ir_op *op = get_irn_op(node); DBG((dbg, LEVEL_1, "emitting code for %+F\n", node)); if (op->ops.generic) { emit_func_ptr func = (emit_func_ptr) op->ops.generic; - ia32_emit_dbg(env, node); - (*func) (env, node); + + be_dbg_set_dbg_info(get_irn_dbg_info(node)); + + (*func) (node); } else { - emit_Nothing(env, node); - ir_fprintf(stderr, "Warning: No emit handler for node %+F (%+G)\n", node, node); + emit_Nothing(node); + ir_fprintf(stderr, "Error: No emit handler for node %+F (%+G, graph %+F)\n", node, node, current_ir_graph); + abort(); } } /** * Emits gas alignment directives */ -static -void ia32_emit_alignment(ia32_emit_env_t *env, unsigned align, unsigned skip) { - be_emit_cstring(env, "\t.p2align "); - be_emit_irprintf(env->emit, "%u,,%u\n", align, skip); - be_emit_write_line(env); +static void ia32_emit_alignment(unsigned align, unsigned skip) +{ + be_emit_cstring("\t.p2align "); + be_emit_irprintf("%u,,%u\n", align, skip); + be_emit_write_line(); } /** - * Emits gas alignment directives for Functions depended on cpu architecture. + * Emits gas alignment directives for Labels depended on cpu architecture. */ -static -void ia32_emit_align_func(ia32_emit_env_t *env, cpu_support cpu) { - unsigned align; - unsigned maximum_skip; - - switch (cpu) { - case arch_i386: - align = 2; - break; - case arch_i486: - align = 4; - break; - case arch_k6: - align = 5; - break; - default: - align = 4; - } - maximum_skip = (1 << align) - 1; - ia32_emit_alignment(env, align, maximum_skip); +static void ia32_emit_align_label(void) +{ + unsigned align = ia32_cg_config.label_alignment; + unsigned maximum_skip = ia32_cg_config.label_alignment_max_skip; + ia32_emit_alignment(align, maximum_skip); } /** - * Emits gas alignment directives for Labels depended on cpu architecture. + * Test whether a block should be aligned. + * For cpus in the P4/Athlon class it is useful to align jump labels to + * 16 bytes. However we should only do that if the alignment nops before the + * label aren't executed more often than we have jumps to the label. */ -static -void ia32_emit_align_label(ia32_emit_env_t *env, cpu_support cpu) { - unsigned align; unsigned maximum_skip; - - switch (cpu) { - case arch_i386: - align = 2; - break; - case arch_i486: - align = 4; - break; - case arch_k6: - align = 5; - break; - default: - align = 4; - } - maximum_skip = (1 << align) - 1; - ia32_emit_alignment(env, align, maximum_skip); -} - -static -int is_first_loop_block(ia32_emit_env_t *env, ir_node *block, ir_node *prev_block) { - ir_exec_freq *exec_freq = env->cg->birg->exec_freq; - double block_freq, prev_freq; +static int should_align_block(ir_node *block, ir_node *prev) +{ static const double DELTA = .0001; - cpu_support cpu = env->isa->opt_arch; + ir_exec_freq *exec_freq = cg->birg->exec_freq; + double block_freq; + double prev_freq = 0; /**< execfreq of the fallthrough block */ + double jmp_freq = 0; /**< execfreq of all non-fallthrough blocks */ + int i, n_cfgpreds; if(exec_freq == NULL) return 0; - if(cpu == arch_i386 || cpu == arch_i486) + if(ia32_cg_config.label_alignment_factor <= 0) return 0; block_freq = get_block_execfreq(exec_freq, block); - prev_freq = get_block_execfreq(exec_freq, prev_block); - - if(block_freq < DELTA || prev_freq < DELTA) + if(block_freq < DELTA) return 0; - block_freq /= prev_freq; + n_cfgpreds = get_Block_n_cfgpreds(block); + for(i = 0; i < n_cfgpreds; ++i) { + ir_node *pred = get_Block_cfgpred_block(block, i); + double pred_freq = get_block_execfreq(exec_freq, pred); - switch (cpu) { - case arch_athlon: - case arch_athlon_64: - case arch_k6: - return block_freq > 3; - default: - break; + if(pred == prev) { + prev_freq += pred_freq; + } else { + jmp_freq += pred_freq; + } } - return block_freq > 2; + if(prev_freq < DELTA && !(jmp_freq < DELTA)) + return 1; + + jmp_freq /= prev_freq; + + return jmp_freq > ia32_cg_config.label_alignment_factor; } /** - * Walks over the nodes in a block connected by scheduling edges - * and emits code for each node. + * Return non-zero, if a instruction in a fall-through. */ -static -void ia32_gen_block(ia32_emit_env_t *env, ir_node *block, ir_node *last_block) { - ir_graph *irg = get_irn_irg(block); - ir_node *start_block = get_irg_start_block(irg); - int need_label = 1; - const ir_node *node; - int i; +static int is_fallthrough(ir_node *cfgpred) +{ + ir_node *pred; - assert(is_Block(block)); + if(!is_Proj(cfgpred)) + return 1; + pred = get_Proj_pred(cfgpred); + if(is_ia32_SwitchJmp(pred)) + return 0; - if (block == start_block) - need_label = 0; + return 1; +} - if (need_label && get_irn_arity(block) == 1) { - ir_node *pred_block = get_Block_cfgpred_block(block, 0); +/** + * Emit the block header for a block. + * + * @param block the block + * @param prev_block the previous block + */ +static void ia32_emit_block_header(ir_node *block, ir_node *prev_block) +{ + ir_graph *irg = current_ir_graph; + int n_cfgpreds; + int need_label = 1; + int i, arity; + ir_exec_freq *exec_freq = cg->birg->exec_freq; - if (pred_block == last_block && get_irn_n_edges_kind(pred_block, EDGE_KIND_BLOCK) <= 2) - need_label = 0; - } + if(block == get_irg_end_block(irg) || block == get_irg_start_block(irg)) + return; - /* special case: if one of our cfg preds is a switch-jmp we need a label, */ - /* otherwise there might be jump table entries jumping to */ - /* non-existent (omitted) labels */ - for (i = get_Block_n_cfgpreds(block) - 1; i >= 0; --i) { - ir_node *pred = get_Block_cfgpred(block, i); + n_cfgpreds = get_Block_n_cfgpreds(block); - if (is_Proj(pred)) { - assert(get_irn_mode(pred) == mode_X); - if (is_ia32_SwitchJmp(get_Proj_pred(pred))) { - need_label = 1; - break; - } + if(n_cfgpreds == 0) { + need_label = 0; + } else if(n_cfgpreds == 1) { + ir_node *cfgpred = get_Block_cfgpred(block, 0); + if(get_nodes_block(cfgpred) == prev_block && is_fallthrough(cfgpred)) { + need_label = 0; } } - if (need_label) { - int i, arity; - int align = 1; - ir_exec_freq *exec_freq = env->cg->birg->exec_freq; - - /* align the loop headers */ - if (! is_first_loop_block(env, block, last_block)) { - /* align blocks where the previous block has no fallthrough */ - arity = get_irn_arity(block); + if (ia32_cg_config.label_alignment > 0) { + /* align the current block if: + * a) if should be aligned due to its execution frequency + * b) there is no fall-through here + */ + if (should_align_block(block, prev_block)) { + ia32_emit_align_label(); + } else { + /* if the predecessor block has no fall-through, + we can always align the label. */ + int i; + ir_node *check_node = NULL; - for (i = 0; i < arity; ++i) { - ir_node *predblock = get_Block_cfgpred_block(block, i); + for (i = n_cfgpreds - 1; i >= 0; --i) { + ir_node *cfg_pred = get_Block_cfgpred(block, i); - if (predblock == last_block) { - align = 0; + if (get_nodes_block(skip_Proj(cfg_pred)) == prev_block) { + check_node = cfg_pred; break; } } + if (check_node == NULL || !is_fallthrough(check_node)) + ia32_emit_align_label(); } + } - if (align) - ia32_emit_align_label(env, env->isa->opt_arch); + if (need_label) { + ia32_emit_block_name(block); + be_emit_char(':'); - be_emit_cstring(env, BLOCK_PREFIX); - be_emit_irprintf(env->emit, "%d:", get_irn_node_nr(block)); - be_emit_pad_comment(env); - be_emit_cstring(env, " /* preds:"); + be_emit_pad_comment(); + be_emit_cstring(" /* "); + } else { + be_emit_cstring("\t/* "); + ia32_emit_block_name(block); + be_emit_cstring(": "); + } - /* emit list of pred blocks in comment */ - arity = get_irn_arity(block); - for (i = 0; i < arity; ++i) { - ir_node *predblock = get_Block_cfgpred_block(block, i); - be_emit_irprintf(env->emit, " %d", get_irn_node_nr(predblock)); - } + be_emit_cstring("preds:"); - if (exec_freq != NULL) { - be_emit_irprintf(env->emit, " freq: %f", get_block_execfreq(exec_freq, block)); - } - be_emit_cstring(env, " */\n"); - be_emit_write_line(env); + /* emit list of pred blocks in comment */ + arity = get_irn_arity(block); + for (i = 0; i < arity; ++i) { + ir_node *predblock = get_Block_cfgpred_block(block, i); + be_emit_irprintf(" %d", get_irn_node_nr(predblock)); } - - /* emit the contents of the block */ - ia32_emit_dbg(env, block); - sched_foreach(block, node) { - ia32_emit_node(env, node); + if (exec_freq != NULL) { + be_emit_irprintf(" freq: %f", + get_block_execfreq(exec_freq, block)); } + be_emit_cstring(" */\n"); + be_emit_write_line(); } /** - * Emits code for function start. + * Walks over the nodes in a block connected by scheduling edges + * and emits code for each node. */ -static -void ia32_emit_func_prolog(ia32_emit_env_t *env, ir_graph *irg) { - ir_entity *irg_ent = get_irg_entity(irg); - const char *irg_name = get_entity_ld_name(irg_ent); - cpu_support cpu = env->isa->opt_arch; - const be_irg_t *birg = env->cg->birg; - - be_emit_write_line(env); - be_gas_emit_switch_section(env->emit, GAS_SECTION_TEXT); - be_dbg_method_begin(birg->main_env->db_handle, irg_ent, be_abi_get_stack_layout(birg->abi)); - ia32_emit_align_func(env, cpu); - if (get_entity_visibility(irg_ent) == visibility_external_visible) { - be_emit_cstring(env, ".global "); - be_emit_string(env, irg_name); - be_emit_char(env, '\n'); - be_emit_write_line(env); - } - ia32_emit_function_object(env, irg_name); - be_emit_string(env, irg_name); - be_emit_cstring(env, ":\n"); - be_emit_write_line(env); -} +static void ia32_gen_block(ir_node *block, ir_node *last_block) +{ + const ir_node *node; -/** - * Emits code for function end - */ -static -void ia32_emit_func_epilog(ia32_emit_env_t *env, ir_graph *irg) { - const char *irg_name = get_entity_ld_name(get_irg_entity(irg)); - const be_irg_t *birg = env->cg->birg; + ia32_emit_block_header(block, last_block); - ia32_emit_function_size(env, irg_name); - be_dbg_method_end(birg->main_env->db_handle); - be_emit_char(env, '\n'); - be_emit_write_line(env); + /* emit the contents of the block */ + be_dbg_set_dbg_info(get_irn_dbg_info(block)); + sched_foreach(block, node) { + ia32_emit_node(node); + } } /** * Block-walker: * Sets labels for control flow nodes (jump target) */ -static -void ia32_gen_labels(ir_node *block, void *data) { +static void ia32_gen_labels(ir_node *block, void *data) +{ ir_node *pred; int n = get_Block_n_cfgpreds(block); + (void) data; for (n--; n >= 0; n--) { pred = get_Block_cfgpred(block, n); @@ -2088,24 +2112,40 @@ void ia32_gen_labels(ir_node *block, void *data) { } } +/** + * Emit an exception label if the current instruction can fail. + */ +void ia32_emit_exc_label(const ir_node *node) +{ + if (get_ia32_exc_label(node)) { + be_emit_irprintf(".EXL%u\n", 0); + be_emit_write_line(); + } +} + /** * Main driver. Emits the code for one routine. */ -void ia32_gen_routine(ia32_code_gen_t *cg, ir_graph *irg) { - ia32_emit_env_t env; - ir_node *block; - ir_node *last_block = NULL; +void ia32_gen_routine(ia32_code_gen_t *ia32_cg, ir_graph *irg) +{ + ir_node *block; + ir_node *last_block = NULL; + ir_entity *entity = get_irg_entity(irg); int i, n; - env.isa = (ia32_isa_t *)cg->arch_env->isa; - env.emit = &env.isa->emit; - env.arch_env = cg->arch_env; - env.cg = cg; + cg = ia32_cg; + isa = (const ia32_isa_t*) cg->arch_env->isa; + arch_env = cg->arch_env; + do_pic = cg->birg->main_env->options->pic; ia32_register_emitters(); - ia32_emit_func_prolog(&env, irg); - irg_block_walk_graph(irg, ia32_gen_labels, NULL, &env); + get_unique_label(pic_base_label, sizeof(pic_base_label), ".PIC_BASE"); + + be_dbg_method_begin(entity, be_abi_get_stack_layout(cg->birg->abi)); + be_gas_emit_function_prolog(entity, ia32_cg_config.function_alignment); + + irg_block_walk_graph(irg, ia32_gen_labels, NULL, NULL); n = ARR_LEN(cg->blk_sched); for (i = 0; i < n;) { @@ -2117,11 +2157,14 @@ void ia32_gen_routine(ia32_code_gen_t *cg, ir_graph *irg) { /* set here the link. the emitter expects to find the next block here */ set_irn_link(block, next_bl); - ia32_gen_block(&env, block, last_block); + ia32_gen_block(block, last_block); last_block = block; } - ia32_emit_func_epilog(&env, irg); + be_gas_emit_function_epilog(entity); + be_dbg_method_end(); + be_emit_char('\n'); + be_emit_write_line(); } void ia32_init_emitter(void)