X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fia32%2Fia32_emitter.c;h=15400952b1c1884e332cb3ca2be4d027c0506c6b;hb=e407e33d9fdb18b3acde96b249d4c78c58650fab;hp=b9dd7089f897285e65a78abced43b3e96ac472e9;hpb=399e9483347d0d5d1b5fddd0e91685174df3ad0a;p=libfirm

diff --git a/ir/be/ia32/ia32_emitter.c b/ir/be/ia32/ia32_emitter.c
index b9dd7089f..15400952b 100644
--- a/ir/be/ia32/ia32_emitter.c
+++ b/ir/be/ia32/ia32_emitter.c
@@ -105,10 +105,17 @@ static void ia32_dump_function_size(FILE *F, const char *name)
  * |_|                                       |_|
  *************************************************************/
 
+static INLINE int be_is_unknown_reg(const arch_register_t *reg) {
+	return \
+		REGS_ARE_EQUAL(reg, &ia32_gp_regs[REG_GP_UKNWN])   || \
+		REGS_ARE_EQUAL(reg, &ia32_xmm_regs[REG_XMM_UKNWN]) || \
+		REGS_ARE_EQUAL(reg, &ia32_vfp_regs[REG_VFP_UKNWN]);
+}
+
 /**
  * returns true if a node has x87 registers
  */
-static int has_x87_register(const ir_node *n) {
+static INLINE int has_x87_register(const ir_node *n) {
 	return is_irn_machine_user(n, 0);
 }
 
@@ -327,7 +334,7 @@ const lc_arg_env_t *ia32_get_arg_env(void) {
 	return env;
 }
 
-static char *ia32_get_reg_name_for_mode(ia32_emit_env_t *env, ir_mode *mode, const arch_register_t *reg) {
+static const char *ia32_get_reg_name_for_mode(ia32_emit_env_t *env, ir_mode *mode, const arch_register_t *reg) {
 	switch(get_mode_size_bits(mode)) {
 		case 8:
 			return ia32_get_mapped_reg_name(env->isa->regs_8bit, reg);
@@ -967,6 +974,154 @@ static void emit_ia32_x87CondJmp(ir_node *irn, ia32_emit_env_t *env) {
 	finish_CondJmp(F, irn, mode_Is);
 }
 
+static void CMov_emitter(ir_node *irn, ia32_emit_env_t *env) {
+	FILE               *F       = env->out;
+	const lc_arg_env_t *arg_env = ia32_get_arg_env();
+	const char *cmp_suffix = get_cmp_suffix(get_ia32_pncode(irn), ! mode_is_signed(get_irn_mode(get_irn_n(irn, 0))));
+
+	char cmd_buf[SNPRINTF_BUF_LEN];
+	char cmnt_buf[SNPRINTF_BUF_LEN];
+	const arch_register_t *in1, *in2, *out;
+
+	out = arch_get_irn_register(env->arch_env, irn);
+	in1 = arch_get_irn_register(env->arch_env, get_irn_n(irn, 2));
+	in2 = arch_get_irn_register(env->arch_env, get_irn_n(irn, 3));
+
+	/* we have to emit the cmp first, because the destination register */
+	/* could be one of the compare registers                           */
+	if (is_ia32_CMov(irn)) {
+		lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "cmp %1S, %2S", irn, irn);
+	}
+	else if (is_ia32_xCmpCMov(irn)) {
+		lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "ucomis%M %1S, %2S", get_irn_n(irn, 0), irn, irn);
+	}
+	else {
+		assert(0 && "unsupported CMov");
+	}
+	lc_esnprintf(arg_env, cmnt_buf, SNPRINTF_BUF_LEN, "/* Psi condition */" );
+	IA32_DO_EMIT(irn);
+
+	if (REGS_ARE_EQUAL(out, in2)) {
+		/* best case: default in == out -> do nothing */
+	}
+	else if (REGS_ARE_EQUAL(out, in1)) {
+		/* true in == out -> need complement compare and exchange true and default in */
+		ir_node *t = get_irn_n(irn, 2);
+		set_irn_n(irn, 2, get_irn_n(irn, 3));
+		set_irn_n(irn, 3, t);
+
+		cmp_suffix = get_cmp_suffix(get_inversed_pnc(get_ia32_pncode(irn)), ! mode_is_signed(get_irn_mode(get_irn_n(irn, 0))));
+
+	}
+	else {
+		/* out is different from in: need copy default -> out */
+		lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "mov %1D, %4S", irn, irn);
+		lc_esnprintf(arg_env, cmnt_buf, SNPRINTF_BUF_LEN, "/* copy default -> out */" );
+		IA32_DO_EMIT(irn);
+	}
+
+	lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "cmov%s %1D, %3S", cmp_suffix, irn, irn);
+	lc_esnprintf(arg_env, cmnt_buf, SNPRINTF_BUF_LEN, "/* condition is true case */" );
+	IA32_DO_EMIT(irn);
+}
+
+static void emit_ia32_CMov(ir_node *irn, ia32_emit_env_t *env) {
+	CMov_emitter(irn, env);
+}
+
+static void emit_ia32_xCmpCMov(ir_node *irn, ia32_emit_env_t *env) {
+	CMov_emitter(irn, env);
+}
+
+static void Set_emitter(ir_node *irn, ia32_emit_env_t *env) {
+	FILE               *F       = env->out;
+	const lc_arg_env_t *arg_env = ia32_get_arg_env();
+	const char *cmp_suffix = get_cmp_suffix(get_ia32_pncode(irn), ! mode_is_signed(get_irn_mode(get_irn_n(irn, 0))));
+	const char *instr      = "xor";
+	const char *reg8bit;
+
+	char cmd_buf[SNPRINTF_BUF_LEN];
+	char cmnt_buf[SNPRINTF_BUF_LEN];
+	const arch_register_t *out;
+
+	out     = arch_get_irn_register(env->arch_env, irn);
+	reg8bit = ia32_get_mapped_reg_name(env->isa->regs_8bit, out);
+
+	if (env->isa->opt_arch == arch_pentium_4) {
+		/* P4 prefers sub r, r, others xor r, r */
+		instr = "sub";
+	}
+
+	lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "%s %1D, %1D", instr, irn, irn);
+	snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* clear target as set modifies only lower 8 bit */");
+	IA32_DO_EMIT(irn);
+
+	if (is_ia32_Set(irn)) {
+		lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "cmp %1S, %2S", irn, irn);
+	}
+	else if (is_ia32_xCmpSet(irn)) {
+		lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "ucomis%M %1S, %2S", get_irn_n(irn, 0), irn, irn);
+	}
+	else {
+		assert(0 && "unsupported Set");
+	}
+	snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* calculate Psi condition */" );
+	IA32_DO_EMIT(irn);
+
+	snprintf(cmd_buf, SNPRINTF_BUF_LEN, "set%s %%%s", cmp_suffix, reg8bit);
+	snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* set 1 iff true, 0 otherweise */" );
+	IA32_DO_EMIT(irn);
+}
+
+static void emit_ia32_Set(ir_node *irn, ia32_emit_env_t *env) {
+	Set_emitter(irn, env);
+}
+
+static void emit_ia32_xCmpSet(ir_node *irn, ia32_emit_env_t *env) {
+	Set_emitter(irn, env);
+}
+
+static void emit_ia32_xCmp(ir_node *irn, ia32_emit_env_t *env) {
+	FILE               *F       = env->out;
+	const lc_arg_env_t *arg_env = ia32_get_arg_env();
+	int                sse_pnc  = -1;
+	char cmd_buf[SNPRINTF_BUF_LEN];
+	char cmnt_buf[SNPRINTF_BUF_LEN];
+
+	switch (get_ia32_pncode(irn)) {
+		case pn_Cmp_Leg: /* odered */
+			sse_pnc = 7;
+			break;
+		case pn_Cmp_Uo:  /* unordered */
+			sse_pnc = 3;
+			break;
+		case pn_Cmp_Ue:  /* == */
+			sse_pnc = 0;
+			break;
+		case pn_Cmp_Ul:  /* < */
+			sse_pnc = 1;
+			break;
+		case pn_Cmp_Ule: /* <= */
+			sse_pnc = 2;
+			break;
+		case pn_Cmp_Ug:  /* > */
+			sse_pnc = 6;
+			break;
+		case pn_Cmp_Uge: /* >= */
+			sse_pnc = 5;
+			break;
+		case pn_Cmp_Ne:  /* != */
+			sse_pnc = 4;
+			break;
+	}
+
+	assert(sse_pnc >= 0 && "unsupported floating point compare");
+
+	lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "cmps%M %s, %d", irn, ia32_emit_binop(irn, env), sse_pnc);
+	lc_esnprintf(arg_env, cmnt_buf, SNPRINTF_BUF_LEN, "/* SSE compare with result in %1D */", irn);
+	IA32_DO_EMIT(irn);
+}
+
 /*********************************************************
  *                 _ _       _
  *                (_) |     (_)
@@ -1455,7 +1610,8 @@ static void emit_be_Copy(const ir_node *irn, ia32_emit_env_t *emit_env) {
 	const arch_env_t *aenv = emit_env->arch_env;
 	char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
 
-	if (REGS_ARE_EQUAL(arch_get_irn_register(aenv, irn), arch_get_irn_register(aenv, be_get_Copy_op(irn))))
+	if (REGS_ARE_EQUAL(arch_get_irn_register(aenv, irn), arch_get_irn_register(aenv, be_get_Copy_op(irn))) ||
+		be_is_unknown_reg(arch_get_irn_register(aenv, be_get_Copy_op(irn))))
 		return;
 
 	if (mode_is_float(get_irn_mode(irn)))
@@ -1549,6 +1705,8 @@ static void ia32_register_emitters(void) {
 	IA32_EMIT(TestJmp);
 	IA32_EMIT(CJmp);
 	IA32_EMIT(CJmpAM);
+	IA32_EMIT(CMov);
+	IA32_EMIT(Set);
 	IA32_EMIT(SwitchJmp);
 	IA32_EMIT(CopyB);
 	IA32_EMIT(CopyB_i);
@@ -1558,6 +1716,9 @@ static void ia32_register_emitters(void) {
 	IA32_EMIT(Conv_I2I);
 	IA32_EMIT(Conv_I2I8Bit);
 	IA32_EMIT(Const);
+	IA32_EMIT(xCmp);
+	IA32_EMIT(xCmpSet);
+	IA32_EMIT(xCmpCMov);
 	IA32_EMIT2(fcomJmp, x87CondJmp);
 	IA32_EMIT2(fcompJmp, x87CondJmp);
 	IA32_EMIT2(fcomppJmp, x87CondJmp);