X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fia32%2Fia32_common_transform.c;h=3ef6f542f453d390e141646d104c0e6f3710bed5;hb=413caa540c4f2d6456cf5cfba73eecffad4fd160;hp=51eeb3054317c2d4953b99312e037e320a178528;hpb=32ea6ea0320f551448bb66e534e3351977464d42;p=libfirm

diff --git a/ir/be/ia32/ia32_common_transform.c b/ir/be/ia32/ia32_common_transform.c
index 51eeb3054..3ef6f542f 100644
--- a/ir/be/ia32/ia32_common_transform.c
+++ b/ir/be/ia32/ia32_common_transform.c
@@ -181,9 +181,9 @@ const arch_register_t *ia32_get_clobber_register(const char *clobber)
 
 	/* TODO: construct a hashmap instead of doing linear search for clobber
 	 * register */
-	for(c = 0; c < N_CLASSES; ++c) {
+	for (c = 0; c < N_CLASSES; ++c) {
 		cls = & ia32_reg_classes[c];
-		for(r = 0; r < cls->n_regs; ++r) {
+		for (r = 0; r < cls->n_regs; ++r) {
 			const arch_register_t *temp_reg = arch_register_for_index(cls, r);
 			if (strcmp(temp_reg->name, clobber) == 0
 					|| (c == CLASS_ia32_gp && strcmp(temp_reg->name+1, clobber) == 0)) {
@@ -230,8 +230,8 @@ static void parse_asm_constraints(constraint_t *constraint, const char *c,
 
 	/* TODO: improve error messages with node and source info. (As users can
 	 * easily hit these) */
-	while(*c != 0) {
-		switch(*c) {
+	while (*c != 0) {
+		switch (*c) {
 		case ' ':
 		case '\t':
 		case '\n':
@@ -247,7 +247,7 @@ static void parse_asm_constraints(constraint_t *constraint, const char *c,
 			++c;
 			break;
 		case '#':
-			while(*c != 0 && *c != ',')
+			while (*c != 0 && *c != ',')
 				++c;
 			break;
 
@@ -448,10 +448,23 @@ static bool can_match(const arch_register_req_t *in,
 	return (*in->limited & *out->limited) != 0;
 }
 
+static inline ir_node *get_new_node(ir_node *node)
+{
+#ifdef FIRM_GRGEN_BE
+	if (be_transformer == TRANSFORMER_DEFAULT) {
+		return be_transform_node(node);
+	} else {
+		return node;
+	}
+#else
+	return be_transform_node(node);
+#endif
+}
+
 ir_node *gen_ASM(ir_node *node)
 {
-	ir_node                    *block = NULL;
-	ir_node                    *new_block = NULL;
+	ir_node                    *block     = get_nodes_block(node);
+	ir_node                    *new_block = get_new_node(block);
 	dbg_info                   *dbgi      = get_irn_dbg_info(node);
 	int                         i, arity;
 	int                         out_idx;
@@ -475,23 +488,6 @@ ir_node *gen_ASM(ir_node *node)
 
 	memset(&clobber_bits, 0, sizeof(clobber_bits));
 
-	switch (be_transformer) {
-	case TRANSFORMER_DEFAULT:
-		block     = get_nodes_block(node);
-		new_block = be_transform_node(block);
-		break;
-
-#ifdef FIRM_GRGEN_BE
-	case TRANSFORMER_PBQP:
-	case TRANSFORMER_RAND:
-		new_block = get_nodes_block(node);
-		break;
-#endif
-
-	default:
-		panic("invalid transformer");
-	}
-
 	/* workaround for lots of buggy code out there as most people think volatile
 	 * asm is enough for everything and forget the flags (linux kernel, etc.)
 	 */
@@ -604,22 +600,8 @@ ir_node *gen_ASM(ir_node *node)
 		}
 
 		if (input == NULL) {
-			ir_node *pred = NULL;
-			switch (be_transformer) {
-			case TRANSFORMER_DEFAULT:
-				pred  = get_irn_n(node, i);
-				input = be_transform_node(pred);
-				break;
-
-#ifdef FIRM_GRGEN_BE
-			case TRANSFORMER_PBQP:
-			case TRANSFORMER_RAND:
-				input = get_irn_n(node, i);
-				break;
-#endif
-
-			default: panic("invalid transformer");
-			}
+			ir_node *pred = get_irn_n(node, i);
+			input = get_new_node(pred);
 
 			if (parsed_constraint.cls == NULL
 					&& parsed_constraint.same_as < 0) {
@@ -792,42 +774,18 @@ ir_node *gen_ASM(ir_node *node)
 
 ir_node *gen_CopyB(ir_node *node)
 {
-	ir_node  *block    = NULL;
-	ir_node  *src      = NULL;
-	ir_node  *new_src  = NULL;
-	ir_node  *dst      = NULL;
-	ir_node  *new_dst  = NULL;
-	ir_node  *mem      = NULL;
-	ir_node  *new_mem  = NULL;
+	ir_node  *block    = get_new_node(get_nodes_block(node));
+	ir_node  *src      = get_CopyB_src(node);
+	ir_node  *new_src  = get_new_node(src);
+	ir_node  *dst      = get_CopyB_dst(node);
+	ir_node  *new_dst  = get_new_node(dst);
+	ir_node  *mem      = get_CopyB_mem(node);
+	ir_node  *new_mem  = get_new_node(mem);
 	ir_node  *res      = NULL;
 	dbg_info *dbgi     = get_irn_dbg_info(node);
 	int      size      = get_type_size_bytes(get_CopyB_type(node));
 	int      rem;
 
-	switch (be_transformer) {
-		case TRANSFORMER_DEFAULT:
-			block    = be_transform_node(get_nodes_block(node));
-			src      = get_CopyB_src(node);
-			new_src  = be_transform_node(src);
-			dst      = get_CopyB_dst(node);
-			new_dst  = be_transform_node(dst);
-			mem      = get_CopyB_mem(node);
-			new_mem  = be_transform_node(mem);
-			break;
-
-#ifdef FIRM_GRGEN_BE
-		case TRANSFORMER_PBQP:
-		case TRANSFORMER_RAND:
-			block    = get_nodes_block(node);
-			new_src  = get_CopyB_src(node);
-			new_dst  = get_CopyB_dst(node);
-			new_mem  = get_CopyB_mem(node);
-			break;
-#endif
-
-		default: panic("invalid transformer");
-	}
-
 	/* If we have to copy more than 32 bytes, we use REP MOVSx and */
 	/* then we need the size explicitly in ECX.                    */
 	if (size >= 32 * 4) {
@@ -853,53 +811,36 @@ ir_node *gen_CopyB(ir_node *node)
 
 ir_node *gen_Proj_tls(ir_node *node)
 {
-	ir_node  *block = NULL;
-	dbg_info *dbgi  = NULL;
-	ir_node  *res   = NULL;
+	ir_node *block = get_new_node(get_nodes_block(node));
+	ir_node *res   = NULL;
 
-	switch (be_transformer) {
-		case TRANSFORMER_DEFAULT:
-			block = be_transform_node(get_nodes_block(node));
-			break;
-
-#ifdef FIRM_GRGEN_BE
-		case TRANSFORMER_PBQP:
-		case TRANSFORMER_RAND:
-			block = get_nodes_block(node);
-			break;
-#endif
-
-		default: panic("invalid transformer");
-	}
-
-	res = new_bd_ia32_LdTls(dbgi, block, mode_Iu);
+	res = new_bd_ia32_LdTls(NULL, block, mode_Iu);
 
 	return res;
 }
 
 ir_node *gen_Unknown(ir_node *node)
 {
-	ir_mode *mode = get_irn_mode(node);
+	ir_mode  *mode  = get_irn_mode(node);
+	ir_graph *irg   = current_ir_graph;
+	dbg_info *dbgi  = get_irn_dbg_info(node);
+	ir_node  *block = get_irg_start_block(irg);
+	ir_node  *res   = NULL;
 
 	if (mode_is_float(mode)) {
 		if (ia32_cg_config.use_sse2) {
-			return ia32_new_Unknown_xmm(env_cg);
+			res = new_bd_ia32_xUnknown(dbgi, block);
 		} else {
-			/* Unknown nodes are buggy in x87 simulator, use zero for now... */
-			ir_graph *irg   = current_ir_graph;
-			dbg_info *dbgi  = get_irn_dbg_info(node);
-			ir_node  *block = get_irg_start_block(irg);
-			ir_node  *ret   = new_bd_ia32_vfldz(dbgi, block);
-
-			be_dep_on_frame(ret);
-			return ret;
+			res = new_bd_ia32_vfldz(dbgi, block);
 		}
 	} else if (ia32_mode_needs_gp_reg(mode)) {
-		return ia32_new_Unknown_gp(env_cg);
+		res = new_bd_ia32_Unknown(dbgi, block);
 	} else {
 		panic("unsupported Unknown-Mode");
 	}
-	return NULL;
+
+	be_dep_on_frame(res);
+	return res;
 }
 
 const arch_register_req_t *make_register_req(const constraint_t *constraint,
@@ -1021,12 +962,8 @@ int prevents_AM(ir_node *const block, ir_node *const am_candidate,
 
 ir_node *try_create_Immediate(ir_node *node, char immediate_constraint_type)
 {
-	int          minus         = 0;
-	tarval      *offset        = NULL;
-	int          offset_sign   = 0;
 	long         val = 0;
 	ir_entity   *symconst_ent  = NULL;
-	int          symconst_sign = 0;
 	ir_mode     *mode;
 	ir_node     *cnst          = NULL;
 	ir_node     *symconst      = NULL;
@@ -1037,61 +974,34 @@ ir_node *try_create_Immediate(ir_node *node, char immediate_constraint_type)
 		return NULL;
 	}
 
-	if (is_Minus(node)) {
-		minus = 1;
-		node  = get_Minus_op(node);
-	}
-
 	if (is_Const(node)) {
-		cnst        = node;
-		symconst    = NULL;
-		offset_sign = minus;
-	} else if (is_SymConst(node)) {
-		cnst          = NULL;
-		symconst      = node;
-		symconst_sign = minus;
+		cnst     = node;
+		symconst = NULL;
+	} else if (is_Global(node)) {
+		cnst     = NULL;
+		symconst = node;
 	} else if (is_Add(node)) {
 		ir_node *left  = get_Add_left(node);
 		ir_node *right = get_Add_right(node);
-		if (is_Const(left) && is_SymConst(right)) {
-			cnst          = left;
-			symconst      = right;
-			symconst_sign = minus;
-			offset_sign   = minus;
-		} else if (is_SymConst(left) && is_Const(right)) {
-			cnst          = right;
-			symconst      = left;
-			symconst_sign = minus;
-			offset_sign   = minus;
-		}
-	} else if (is_Sub(node)) {
-		ir_node *left  = get_Sub_left(node);
-		ir_node *right = get_Sub_right(node);
-		if (is_Const(left) && is_SymConst(right)) {
-			cnst          = left;
-			symconst      = right;
-			symconst_sign = !minus;
-			offset_sign   = minus;
-		} else if (is_SymConst(left) && is_Const(right)) {
-			cnst          = right;
-			symconst      = left;
-			symconst_sign = minus;
-			offset_sign   = !minus;
+		if (is_Const(left) && is_Global(right)) {
+			cnst     = left;
+			symconst = right;
+		} else if (is_Global(left) && is_Const(right)) {
+			cnst     = right;
+			symconst = left;
 		}
 	} else {
 		return NULL;
 	}
 
 	if (cnst != NULL) {
-		offset = get_Const_tarval(cnst);
-		if (tarval_is_long(offset)) {
-			val = get_tarval_long(offset);
-		} else {
-			ir_fprintf(stderr, "Optimisation Warning: tarval from %+F is not a "
-			           "long?\n", cnst);
+		tarval *offset = get_Const_tarval(cnst);
+		if (!tarval_is_long(offset)) {
+			ir_fprintf(stderr, "Optimisation Warning: tarval of %+F is not a long?\n", cnst);
 			return NULL;
 		}
 
+		val = get_tarval_long(offset);
 		if (!check_immediate_constraint(val, immediate_constraint_type))
 			return NULL;
 	}
@@ -1101,22 +1011,11 @@ ir_node *try_create_Immediate(ir_node *node, char immediate_constraint_type)
 			return NULL;
 		}
 
-		/* unfortunately the assembler/linker doesn't support -symconst */
-		if (symconst_sign)
-			return NULL;
-
-		if (get_SymConst_kind(symconst) != symconst_addr_ent)
-			return NULL;
-		symconst_ent = get_SymConst_entity(symconst);
+		symconst_ent = get_Global_entity(symconst);
 	}
 	if (cnst == NULL && symconst == NULL)
 		return NULL;
 
-	if (offset_sign && offset != NULL) {
-		offset = tarval_neg(offset);
-	}
-
-	new_node = ia32_create_Immediate(symconst_ent, symconst_sign, val);
-
+	new_node = ia32_create_Immediate(symconst_ent, 0, val);
 	return new_node;
 }