X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fia32%2Fia32_architecture.h;h=a88776f7446525899205f82e9eb1ddb47b0c9959;hb=df8a2f7b2ea4349b84b95761f321adcb54e4661e;hp=ea89355c06c20861c9715fe31ef0a104bfeacb8c;hpb=146262bf8a65da4c74f0662dd84ee3f8c308c013;p=libfirm

diff --git a/ir/be/ia32/ia32_architecture.h b/ir/be/ia32/ia32_architecture.h
index ea89355c0..a88776f74 100644
--- a/ir/be/ia32/ia32_architecture.h
+++ b/ir/be/ia32/ia32_architecture.h
@@ -31,7 +31,7 @@ typedef struct {
 	unsigned optimize_size:1;
 	/** use leave in function epilogue */
 	unsigned use_leave:1;
-	/** use inc, dec instead of add ,1 and add, -1 */
+	/** use inc, dec instead of add $1, reg and add $-1, reg */
 	unsigned use_incdec:1;
 	/** use sse2 instructions (instead of x87) */
 	unsigned use_sse2:1;
@@ -51,25 +51,35 @@ typedef struct {
 	unsigned use_modeD_moves:1;
 	/** use add esp, 4 instead of pop */
 	unsigned use_add_esp_4:1;
-	/** use add esp, 8 instead of 2 pop's */
+	/** use add esp, 8 instead of 2 pops */
 	unsigned use_add_esp_8:1;
 	/** use sub esp, 4 instead of push */
 	unsigned use_sub_esp_4:1;
-	/** use sub esp, 8 instead of 2 push's */
+	/** use sub esp, 8 instead of 2 pushs */
 	unsigned use_sub_esp_8:1;
-	/** use imul mem, imm32 instruction (slow on some cpu's */
+	/** use imul mem, imm32 instruction (slow on some CPUs) */
 	unsigned use_imul_mem_imm32:1;
 	/** use pxor instead xorps/xorpd */
 	unsigned use_pxor:1;
 	/** use mov reg, 0 instruction */
 	unsigned use_mov_0:1;
+	/** use cwtl/cltd, which are shorter, to sign extend ax/eax */
+	unsigned use_short_sex_eax:1;
 	/** pad Ret instructions that are destination of conditional jump or directly preceded
 	    by other jump instruction. */
 	unsigned use_pad_return:1;
 	/** use the bt instruction */
 	unsigned use_bt:1;
-	/** use fisttp instruction (requieres SSE3) */
+	/** use fisttp instruction (requires SSE3) */
 	unsigned use_fisttp:1;
+	/** use SSE prefetch instructions */
+	unsigned use_sse_prefetch:1;
+	/** use 3DNow! prefetch instructions */
+	unsigned use_3dnow_prefetch:1;
+	/** use SSE4.2 or SSE4a popcnt instruction */
+	unsigned use_popcnt:1;
+	/** use i486 instructions */
+	unsigned use_i486:1;
 	/** optimize calling convention where possible */
 	unsigned optimize_cc:1;
 	/**
@@ -84,7 +94,7 @@ typedef struct {
 	unsigned label_alignment;
 	/** maximum skip alignment for labels (which are expected to be frequent jump targets) */
 	unsigned label_alignment_max_skip;
-	/** if a blocks execfreq is factor higher than it's predecessor then align
+	/** if a blocks execfreq is factor higher than its predecessor then align
 	 *  the blocks label (0 switches off label alignment) */
 	double label_alignment_factor;
 } ia32_code_gen_config_t;