X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fia32%2Fia32_architecture.h;h=84c0938df4482da44e41f3b5d8a0cecef3e8d2d4;hb=b151d11c50d89b9dffadfb63f7ccfd81ea8db44f;hp=4c448d5efed2fa2d55e95c4bb0478e5583fcde56;hpb=aa83491db2e090125df08dc75e752d9745edeaa7;p=libfirm

diff --git a/ir/be/ia32/ia32_architecture.h b/ir/be/ia32/ia32_architecture.h
index 4c448d5ef..84c0938df 100644
--- a/ir/be/ia32/ia32_architecture.h
+++ b/ir/be/ia32/ia32_architecture.h
@@ -27,9 +27,11 @@
 #define FIRM_BE_IA32_ARCHITECTURE_H
 
 typedef struct {
+	/** optimize for size */
+	unsigned optimize_size:1;
 	/** use leave in function epilogue */
 	unsigned use_leave:1;
-	/** use inc, dec instead of add ,1 and add, -1 */
+	/** use inc, dec instead of add $1, reg and add $-1, reg */
 	unsigned use_incdec:1;
 	/** use sse2 instructions (instead of x87) */
 	unsigned use_sse2:1;
@@ -49,19 +51,35 @@ typedef struct {
 	unsigned use_modeD_moves:1;
 	/** use add esp, 4 instead of pop */
 	unsigned use_add_esp_4:1;
-	/** use add esp, 8 instead of 2 pop's */
+	/** use add esp, 8 instead of 2 pops */
 	unsigned use_add_esp_8:1;
 	/** use sub esp, 4 instead of push */
 	unsigned use_sub_esp_4:1;
-	/** use sub esp, 8 instead of 2 push's */
+	/** use sub esp, 8 instead of 2 pushs */
 	unsigned use_sub_esp_8:1;
-	/** use imul mem, imm32 instruction (slow on some cpu's */
+	/** use imul mem, imm32 instruction (slow on some CPUs) */
 	unsigned use_imul_mem_imm32:1;
+	/** use pxor instead xorps/xorpd */
+	unsigned use_pxor:1;
 	/** use mov reg, 0 instruction */
 	unsigned use_mov_0:1;
-	/** pad Ret that are destination of conditional jump or directly preceded
+	/** use cwtl/cltd, which are shorter, to sign extend ax/eax */
+	unsigned use_short_sex_eax:1;
+	/** pad Ret instructions that are destination of conditional jump or directly preceded
 	    by other jump instruction. */
-	unsigned use_pad_return;
+	unsigned use_pad_return:1;
+	/** use the bt instruction */
+	unsigned use_bt:1;
+	/** use fisttp instruction (requires SSE3) */
+	unsigned use_fisttp:1;
+	/** use SSE prefetch instructions */
+	unsigned use_sse_prefetch:1;
+	/** use 3DNow! prefetch instructions */
+	unsigned use_3dnow_prefetch:1;
+	/** use SSE4.2 or SSE4a popcnt instruction */
+	unsigned use_popcnt:1;
+	/** use i486 instructions */
+	unsigned use_i486:1;
 	/** optimize calling convention where possible */
 	unsigned optimize_cc:1;
 	/**
@@ -70,22 +88,38 @@ typedef struct {
 	 * rounding mode
 	 */
 	unsigned use_unsafe_floatconv:1;
+	/** emit machine code instead of assembler */
+	unsigned emit_machcode:1;
+
 	/** function alignment (a power of two in bytes) */
 	unsigned function_alignment;
 	/** alignment for labels (which are expected to be frequent jump targets) */
 	unsigned label_alignment;
 	/** maximum skip alignment for labels (which are expected to be frequent jump targets) */
 	unsigned label_alignment_max_skip;
-	/** if a blocks execfreq is factor higher than it's predecessor then align
+	/** if a blocks execfreq is factor higher than its predecessor then align
 	 *  the blocks label (0 switches off label alignment) */
 	double label_alignment_factor;
 } ia32_code_gen_config_t;
 
 extern ia32_code_gen_config_t  ia32_cg_config;
 
+/** Initialize the ia32 architecture module. */
 void ia32_init_architecture(void);
+
+/** Setup the ia32_cg_config structure by inspecting current user settings. */
 void ia32_setup_cg_config(void);
 
-int ia32_evaluate_insn(insn_kind kind, tarval *tv);
+/**
+ * Evaluate the costs of an instruction. Used by the irach multiplication
+ * lowerer.
+ *
+ * @param kind   the instruction
+ * @param mode   the mode of the instruction
+ * @param tv     for MUL instruction, the multiplication constant
+ *
+ * @return the cost
+ */
+int ia32_evaluate_insn(insn_kind kind, const ir_mode *mode, ir_tarval *tv);
 
 #endif