X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fia32%2Fia32_address_mode.c;h=8acfdbf5a63cdc369ccbc1d02c8acc8c4c569775;hb=4c875e72735d6f438c64a9e0d8de71a5ceb838c8;hp=6ab862b7ccf9be31c06cead7a8d1a86e05c029c3;hpb=c7194024c1f9f32396a9e201816424438fc2ee9a;p=libfirm diff --git a/ir/be/ia32/ia32_address_mode.c b/ir/be/ia32/ia32_address_mode.c index 6ab862b7c..8acfdbf5a 100644 --- a/ir/be/ia32/ia32_address_mode.c +++ b/ir/be/ia32/ia32_address_mode.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved. + * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved. * * This file is part of libFirm. * @@ -24,9 +24,7 @@ * @author Matthias Braun * @version $Id$ */ -#ifdef HAVE_CONFIG_H #include "config.h" -#endif #include "ia32_address_mode.h" #include "ia32_transform.h" @@ -45,7 +43,6 @@ /* gas/ld don't support negative symconsts :-( */ #undef SUPPORT_NEGATIVE_SYMCONSTS -static be_lv_t *lv; static bitset_t *non_address_mode_nodes; /** @@ -67,8 +64,9 @@ static int do_is_immediate(const ir_node *node, int *symconsts, int negate) /* Consts are typically immediates */ if (!tarval_is_long(get_Const_tarval(node))) { #ifdef DEBUG_libfirm - ir_fprintf(stderr, "Optimisation warning tarval of %+F(%+F) is not " - "a long.\n", node, current_ir_graph); + ir_fprintf(stderr, + "Optimisation warning tarval of %+F(%+F) is not a long.\n", + node, current_ir_graph); #endif return 0; } @@ -77,28 +75,29 @@ static int do_is_immediate(const ir_node *node, int *symconsts, int negate) /* the first SymConst of a DAG can be fold into an immediate */ #ifndef SUPPORT_NEGATIVE_SYMCONSTS /* unfortunately the assembler/linker doesn't support -symconst */ - if(negate) + if (negate) return 0; #endif - if(get_SymConst_kind(node) != symconst_addr_ent) + if (get_SymConst_kind(node) != symconst_addr_ent) return 0; (*symconsts)++; - if(*symconsts > 1) + if (*symconsts > 1) return 0; return 1; case iro_Add: case iro_Sub: - /* Add's and Sub's are typically supported as long as both operands are immediates */ - if(bitset_is_set(non_address_mode_nodes, get_irn_idx(node))) + /* Add's and Sub's are typically supported as long as both operands are + * immediates */ + if (ia32_is_non_address_mode_node(node)) return 0; left = get_binop_left(node); right = get_binop_right(node); - if(!do_is_immediate(left, symconsts, negate)) + if (!do_is_immediate(left, symconsts, negate)) return 0; - if(!do_is_immediate(right, symconsts, is_Sub(node) ? !negate : negate)) + if (!do_is_immediate(right, symconsts, is_Sub(node) ? !negate : negate)) return 0; return 1; @@ -164,8 +163,7 @@ static void eat_immediate(ia32_address_t *addr, ir_node *node, int negate) case iro_SymConst: /* place the entity into the symconst */ if (addr->symconst_ent != NULL) { - panic("Internal error: more than 1 symconst in address " - "calculation"); + panic("Internal error: more than 1 symconst in address calculation"); } addr->symconst_ent = get_SymConst_entity(node); #ifndef SUPPORT_NEGATIVE_SYMCONSTS @@ -174,14 +172,14 @@ static void eat_immediate(ia32_address_t *addr, ir_node *node, int negate) addr->symconst_sign = negate; break; case iro_Add: - assert(!bitset_is_set(non_address_mode_nodes, get_irn_idx(node))); + assert(!ia32_is_non_address_mode_node(node)); left = get_Add_left(node); right = get_Add_right(node); eat_immediate(addr, left, negate); eat_immediate(addr, right, negate); break; case iro_Sub: - assert(!bitset_is_set(non_address_mode_nodes, get_irn_idx(node))); + assert(!ia32_is_non_address_mode_node(node)); left = get_Sub_left(node); right = get_Sub_right(node); eat_immediate(addr, left, negate); @@ -197,32 +195,35 @@ static void eat_immediate(ia32_address_t *addr, ir_node *node, int negate) * * @param addr the address mode data so far * @param node the node - * @param force if set, ignore the marking of node as a non-address-mode node + * @param flags the flags * * @return the folded node */ -static ir_node *eat_immediates(ia32_address_t *addr, ir_node *node, int force) +static ir_node *eat_immediates(ia32_address_t *addr, ir_node *node, + ia32_create_am_flags_t flags) { - if(!force && bitset_is_set(non_address_mode_nodes, get_irn_idx(node))) + if (!(flags & ia32_create_am_force) && + ia32_is_non_address_mode_node(node) && + (!(flags & ia32_create_am_double_use) || get_irn_n_edges(node) > 2)) return node; - if(is_Add(node)) { + if (is_Add(node)) { ir_node *left = get_Add_left(node); ir_node *right = get_Add_right(node); - if(is_immediate(addr, left, 0)) { + if (is_immediate(addr, left, 0)) { eat_immediate(addr, left, 0); return eat_immediates(addr, right, 0); } - if(is_immediate(addr, right, 0)) { + if (is_immediate(addr, right, 0)) { eat_immediate(addr, right, 0); return eat_immediates(addr, left, 0); } - } else if(is_Sub(node)) { + } else if (is_Sub(node)) { ir_node *left = get_Sub_left(node); ir_node *right = get_Sub_right(node); - if(is_immediate(addr, right, 1)) { + if (is_immediate(addr, right, 1)) { eat_immediate(addr, right, 1); return eat_immediates(addr, left, 0); } @@ -244,34 +245,33 @@ static int eat_shl(ia32_address_t *addr, ir_node *node) ir_node *shifted_val; long val; - if(is_Shl(node)) { + if (is_Shl(node)) { ir_node *right = get_Shl_right(node); tarval *tv; /* we can use shl with 1, 2 or 3 shift */ - if(!is_Const(right)) + if (!is_Const(right)) return 0; tv = get_Const_tarval(right); - if(!tarval_is_long(tv)) + if (!tarval_is_long(tv)) return 0; val = get_tarval_long(tv); - if(val < 0 || val > 3) + if (val < 0 || val > 3) return 0; - if(val == 0) { - ir_fprintf(stderr, "Optimisation warning: unoptimized Shl(,0) " - "found\n"); + if (val == 0) { + ir_fprintf(stderr, "Optimisation warning: unoptimized Shl(,0) found\n"); } shifted_val = get_Shl_left(node); - } else if(is_Add(node)) { + } else if (is_Add(node)) { /* might be an add x, x */ ir_node *left = get_Add_left(node); ir_node *right = get_Add_right(node); - if(left != right) + if (left != right) return 0; - if(is_Const(left)) + if (is_Const(left)) return 0; val = 1; @@ -281,13 +281,13 @@ static int eat_shl(ia32_address_t *addr, ir_node *node) } /* we can only eat a shl if we don't have a scale or index set yet */ - if(addr->scale != 0 || addr->index != NULL) + if (addr->scale != 0 || addr->index != NULL) return 0; - if(bitset_is_set(non_address_mode_nodes, get_irn_idx(node))) + if (ia32_is_non_address_mode_node(node)) return 0; #ifndef AGGRESSIVE_AM - if(get_irn_n_edges(node) > 1) + if (get_irn_n_edges(node) > 1) return 0; #endif @@ -297,91 +297,95 @@ static int eat_shl(ia32_address_t *addr, ir_node *node) } /* Create an address mode for a given node. */ -void ia32_create_address_mode(ia32_address_t *addr, ir_node *node, int force) +void ia32_create_address_mode(ia32_address_t *addr, ir_node *node, ia32_create_am_flags_t flags) { int res = 0; ir_node *eat_imms; - if(is_immediate(addr, node, 0)) { + if (is_immediate(addr, node, 0)) { eat_immediate(addr, node, 0); return; } #ifndef AGGRESSIVE_AM - if(!force && get_irn_n_edges(node) > 1) { + if (!(flags & ia32_create_am_force) && get_irn_n_edges(node) > 1) { addr->base = node; return; } #endif - if(!force && bitset_is_set(non_address_mode_nodes, get_irn_idx(node))) { + if (!(flags & ia32_create_am_force) && + ia32_is_non_address_mode_node(node) && + (!(flags & ia32_create_am_double_use) || get_irn_n_edges(node) > 2)) { addr->base = node; return; } - eat_imms = eat_immediates(addr, node, force); - if(eat_imms != node) { - if(force) { + eat_imms = eat_immediates(addr, node, flags); + if (eat_imms != node) { + if (flags & ia32_create_am_force) { eat_imms = ia32_skip_downconv(eat_imms); } res = 1; node = eat_imms; #ifndef AGGRESSIVE_AM - if(get_irn_n_edges(node) > 1) { + if (get_irn_n_edges(node) > 1) { addr->base = node; return; } #endif - if(bitset_is_set(non_address_mode_nodes, get_irn_idx(node))) { + if (ia32_is_non_address_mode_node(node)) { addr->base = node; return; } } /* starting point Add, Sub or Shl, FrameAddr */ - if(is_Shl(node)) { + if (is_Shl(node)) { /* We don't want to eat add x, x as shl here, so only test for real Shl * instructions, because we want the former as Lea x, x, not Shl x, 1 */ - if(eat_shl(addr, node)) + if (eat_shl(addr, node)) return; - } else if(is_immediate(addr, node, 0)) { + } else if (is_immediate(addr, node, 0)) { eat_immediate(addr, node, 0); return; - } else if(be_is_FrameAddr(node)) { + } else if (be_is_FrameAddr(node)) { assert(addr->base == NULL); assert(addr->frame_entity == NULL); addr->base = be_get_FrameAddr_frame(node); addr->use_frame = 1; addr->frame_entity = be_get_FrameAddr_entity(node); return; - } else if(is_Add(node)) { + } else if (is_Add(node)) { ir_node *left = get_Add_left(node); ir_node *right = get_Add_right(node); - if(force) { + if (flags & ia32_create_am_force) { left = ia32_skip_downconv(left); right = ia32_skip_downconv(right); } - assert(force || !is_immediate(addr, left, 0)); - assert(force || !is_immediate(addr, right, 0)); + assert(flags & ia32_create_am_force || !is_immediate(addr, left, 0)); + assert(flags & ia32_create_am_force || !is_immediate(addr, right, 0)); - if(eat_shl(addr, left)) { + if (eat_shl(addr, left)) { left = NULL; - } else if(eat_shl(addr, right)) { + } else if (eat_shl(addr, right)) { right = NULL; } - if(left != NULL && be_is_FrameAddr(left) - && !bitset_is_set(non_address_mode_nodes, get_irn_idx(left))) { + if (left != NULL && + be_is_FrameAddr(left) && + !ia32_is_non_address_mode_node(left)) { assert(addr->base == NULL); assert(addr->frame_entity == NULL); addr->base = be_get_FrameAddr_frame(left); addr->use_frame = 1; addr->frame_entity = be_get_FrameAddr_entity(left); left = NULL; - } else if(right != NULL && be_is_FrameAddr(right) - && !bitset_is_set(non_address_mode_nodes, get_irn_idx(right))) { + } else if (right != NULL && + be_is_FrameAddr(right) && + !ia32_is_non_address_mode_node(right)) { assert(addr->base == NULL); assert(addr->frame_entity == NULL); addr->base = be_get_FrameAddr_frame(right); @@ -390,8 +394,8 @@ void ia32_create_address_mode(ia32_address_t *addr, ir_node *node, int force) right = NULL; } - if(left != NULL) { - if(addr->base != NULL) { + if (left != NULL) { + if (addr->base != NULL) { assert(addr->index == NULL && addr->scale == 0); assert(right == NULL); addr->index = left; @@ -399,8 +403,8 @@ void ia32_create_address_mode(ia32_address_t *addr, ir_node *node, int force) addr->base = left; } } - if(right != NULL) { - if(addr->base == NULL) { + if (right != NULL) { + if (addr->base == NULL) { addr->base = right; } else { assert(addr->index == NULL && addr->scale == 0); @@ -418,9 +422,14 @@ void ia32_mark_non_am(ir_node *node) bitset_set(non_address_mode_nodes, get_irn_idx(node)); } -static int value_last_used_here(ir_node *here, ir_node *value) +int ia32_is_non_address_mode_node(ir_node const *node) { - ir_node *block = get_nodes_block(here); + return bitset_is_set(non_address_mode_nodes, get_irn_idx(node)); +} + +static int value_last_used_here(be_lv_t *lv, ir_node *here, ir_node *value) +{ + ir_node *block = get_nodes_block(here); const ir_edge_t *edge; /* If the value is live end it is for sure it does not die here */ @@ -441,22 +450,23 @@ static int value_last_used_here(ir_node *here, ir_node *value) /** * Walker: mark those nodes that cannot be part of an address mode because - * there value must be access through an register + * their value must be accessed through a register */ static void mark_non_address_nodes(ir_node *node, void *env) { - int i, arity; + be_lv_t *lv = env; + int arity; + int i; ir_node *val; ir_node *left; ir_node *right; ir_mode *mode; - (void) env; mode = get_irn_mode(node); - if(!mode_is_int(mode) && !mode_is_reference(mode) && mode != mode_b) + if (!mode_is_int(mode) && !mode_is_reference(mode) && mode != mode_b) return; - switch(get_irn_opcode(node)) { + switch (get_irn_opcode(node)) { case iro_Load: /* Nothing to do. especially do not mark the pointer, because we want to * turn it into AM. */ @@ -465,13 +475,13 @@ static void mark_non_address_nodes(ir_node *node, void *env) case iro_Store: /* Do not mark the pointer, because we want to turn it into AM. */ val = get_Store_value(node); - bitset_set(non_address_mode_nodes, get_irn_idx(val)); + ia32_mark_non_am(val); break; case iro_Shl: case iro_Add: /* only 1 user: AM folding is always beneficial */ - if(get_irn_n_edges(node) <= 1) + if (get_irn_n_edges(node) <= 1) break; /* for adds and shls with multiple users we use this heuristic: @@ -487,23 +497,23 @@ static void mark_non_address_nodes(ir_node *node, void *env) * an addition and has the same register pressure for the case that only * one operand dies, but is faster (on Pentium 4). * && instead of || only folds AM if both operands do not die here */ - if (!value_last_used_here(node, left) || - !value_last_used_here(node, right)) { + if (!value_last_used_here(lv, node, left) || + !value_last_used_here(lv, node, right)) { return; } /* At least one of left and right are not used by anyone else, so it is * beneficial for the register pressure (if both are unused otherwise, * else neutral) and ALU use to not fold AM. */ - bitset_set(non_address_mode_nodes, get_irn_idx(node)); + ia32_mark_non_am(node); break; default: arity = get_irn_arity(node); - for(i = 0; i < arity; ++i) { + for (i = 0; i < arity; ++i) { ir_node *in = get_irn_n(node, i); - bitset_set(non_address_mode_nodes, get_irn_idx(in)); + ia32_mark_non_am(in); } break; } @@ -512,11 +522,11 @@ static void mark_non_address_nodes(ir_node *node, void *env) void ia32_calculate_non_address_mode_nodes(be_irg_t *birg) { ir_graph *irg = be_get_birg_irg(birg); + be_lv_t *lv = be_assure_liveness(birg); - lv = be_assure_liveness(birg); non_address_mode_nodes = bitset_malloc(get_irg_last_idx(irg)); - irg_walk_graph(irg, NULL, mark_non_address_nodes, NULL); + irg_walk_graph(irg, NULL, mark_non_address_nodes, lv); } void ia32_free_non_address_mode_nodes(void)