X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fia32%2Fia32_address_mode.c;h=487b5960815bec4f6feb55292f271e1989c08753;hb=fa58db3dfe73586f59ba99952806e418849c9740;hp=72c43a69791abcd3d9f3ccab377543b83f4eb235;hpb=99bb87e21131c71877ef9ddaaa1dd2781fd9417a;p=libfirm

diff --git a/ir/be/ia32/ia32_address_mode.c b/ir/be/ia32/ia32_address_mode.c
index 72c43a697..487b59608 100644
--- a/ir/be/ia32/ia32_address_mode.c
+++ b/ir/be/ia32/ia32_address_mode.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 1995-2007 University of Karlsruhe.  All right reserved.
+ * Copyright (C) 1995-2008 University of Karlsruhe.  All right reserved.
  *
  * This file is part of libFirm.
  *
@@ -20,7 +20,7 @@
 /**
  * @file
  * @brief       This file contains functions for matching firm graphs for
- *              nodes that can be used as addressmode for x86 commands
+ *              nodes that can be used as address mode for x86 instructions
  * @author      Matthias Braun
  * @version     $Id$
  */
@@ -45,24 +45,37 @@
 /* gas/ld don't support negative symconsts :-( */
 #undef SUPPORT_NEGATIVE_SYMCONSTS
 
+static be_lv_t  *lv;
 static bitset_t *non_address_mode_nodes;
 
+/**
+ * Recursive worker for checking if a DAG with root node can be represented as a simple immediate,
+ *
+ * @param node       the node
+ * @param symconsts  number of symconsts found so far
+ * @param negate     if set, the immediate must be negated
+ *
+ * @return non-zero if the DAG represents an immediate, 0 else
+ */
 static int do_is_immediate(const ir_node *node, int *symconsts, int negate)
 {
 	ir_node *left;
 	ir_node *right;
 
-	switch(get_irn_opcode(node)) {
+	switch (get_irn_opcode(node)) {
 	case iro_Const:
-		if(!tarval_is_long(get_Const_tarval(node))) {
+		/* Consts are typically immediates */
+		if (!tarval_is_long(get_Const_tarval(node))) {
 #ifdef DEBUG_libfirm
-			ir_fprintf(stderr, "Optimisation warning tarval of %+F(%+F) is not "
-			           "a long.\n", node, current_ir_graph);
+			ir_fprintf(stderr,
+			           "Optimisation warning tarval of %+F(%+F) is not a long.\n",
+			           node, current_ir_graph);
 #endif
 			return 0;
 		}
 		return 1;
 	case iro_SymConst:
+		/* the first SymConst of a DAG can be fold into an immediate */
 #ifndef SUPPORT_NEGATIVE_SYMCONSTS
 		/* unfortunately the assembler/linker doesn't support -symconst */
 		if(negate)
@@ -78,6 +91,8 @@ static int do_is_immediate(const ir_node *node, int *symconsts, int negate)
 		return 1;
 	case iro_Add:
 	case iro_Sub:
+		/* Add's and Sub's are typically supported as long as both operands are
+		 * immediates */
 		if(bitset_is_set(non_address_mode_nodes, get_irn_idx(node)))
 			return 0;
 
@@ -90,48 +105,68 @@ static int do_is_immediate(const ir_node *node, int *symconsts, int negate)
 
 		return 1;
 	default:
-		break;
+		/* all other nodes are NO immediates */
+		return 0;
 	}
-
-	return 0;
 }
 
-static int is_immediate_simple(const ir_node *node)
-{
+/**
+ * Checks if a DAG with a single root node can be represented as a simple immediate.
+ *
+ * @param node  the node
+ *
+ * @return non-zero if the DAG represents an immediate, 0 else
+ */
+#if 0
+static int is_immediate_simple(const ir_node *node) {
 	int symconsts = 0;
 	return do_is_immediate(node, &symconsts, 0);
 }
+#endif
 
+/**
+ * Check if a DAG starting with root node can be folded into an address mode
+ * as an immediate.
+ *
+ * @param addr    the address mode data so far
+ * @param node    the node
+ * @param negate  if set, the immediate must be negated
+ */
 static int is_immediate(ia32_address_t *addr, const ir_node *node, int negate)
 {
-	int symconsts = 0;
-	if(addr->symconst_ent != NULL)
-		symconsts = 1;
-
+	int symconsts = (addr->symconst_ent != NULL);
 	return do_is_immediate(node, &symconsts, negate);
 }
 
+/**
+ * Place a DAG with root node into an address mode.
+ *
+ * @param addr    the address mode data so far
+ * @param node    the node
+ * @param negate  if set, the immediate must be negated
+ */
 static void eat_immediate(ia32_address_t *addr, ir_node *node, int negate)
 {
 	tarval  *tv;
 	ir_node *left;
 	ir_node *right;
-  long val;
+	long    val;
 
-	switch(get_irn_opcode(node)) {
+	switch (get_irn_opcode(node)) {
 	case iro_Const:
+		/* simply add the value to the offset */
 		tv = get_Const_tarval(node);
 		val = get_tarval_long(tv);
-		if(negate) {
+		if (negate) {
 			addr->offset -= val;
 		} else {
 			addr->offset += val;
 		}
 		break;
 	case iro_SymConst:
-		if(addr->symconst_ent != NULL) {
-			panic("Internal error: more than 1 symconst in address "
-			      "calculation");
+		/* place the entity into the symconst */
+		if (addr->symconst_ent != NULL) {
+			panic("Internal error: more than 1 symconst in address calculation");
 		}
 		addr->symconst_ent  = get_SymConst_entity(node);
 #ifndef SUPPORT_NEGATIVE_SYMCONSTS
@@ -158,6 +193,15 @@ static void eat_immediate(ia32_address_t *addr, ir_node *node, int negate)
 	}
 }
 
+/**
+ * Place operands of node into an address mode.
+ *
+ * @param addr    the address mode data so far
+ * @param node    the node
+ * @param force   if set, ignore the marking of node as a non-address-mode node
+ *
+ * @return the folded node
+ */
 static ir_node *eat_immediates(ia32_address_t *addr, ir_node *node, int force)
 {
 	if(!force && bitset_is_set(non_address_mode_nodes, get_irn_idx(node)))
@@ -188,28 +232,57 @@ static ir_node *eat_immediates(ia32_address_t *addr, ir_node *node, int force)
 	return node;
 }
 
+/**
+ * Try to place a Shl into an address mode.
+ *
+ * @param addr    the address mode data so far
+ * @param node   the node to place
+ *
+ * @return non-zero on success
+ */
 static int eat_shl(ia32_address_t *addr, ir_node *node)
 {
-	ir_node *right = get_Shl_right(node);
-	tarval  *tv;
+	ir_node *shifted_val;
 	long     val;
 
-	/* we can only eat a shl if we don't have a scale or index set */
-	if(addr->scale != 0 || addr->index != NULL)
-		return 0;
+	if(is_Shl(node)) {
+		ir_node *right = get_Shl_right(node);
+		tarval  *tv;
 
-	/* we can use shl with 1, 2 or 3 shift */
-	if(!is_Const(right))
-		return 0;
-	tv = get_Const_tarval(right);
-	if(!tarval_is_long(tv))
-		return 0;
-	val = get_tarval_long(tv);
-	if(val < 0 || val > 3)
+		/* we can use shl with 1, 2 or 3 shift */
+		if(!is_Const(right))
+			return 0;
+		tv = get_Const_tarval(right);
+		if(!tarval_is_long(tv))
+			return 0;
+
+		val = get_tarval_long(tv);
+		if(val < 0 || val > 3)
+			return 0;
+		if(val == 0) {
+			ir_fprintf(stderr, "Optimisation warning: unoptimized Shl(,0) found\n");
+		}
+
+		shifted_val = get_Shl_left(node);
+	} else if(is_Add(node)) {
+		/* might be an add x, x */
+		ir_node *left  = get_Add_left(node);
+		ir_node *right = get_Add_right(node);
+
+		if(left != right)
+			return 0;
+		if(is_Const(left))
+			return 0;
+
+		val         = 1;
+		shifted_val = left;
+	} else {
 		return 0;
-	if(val == 0) {
-		ir_fprintf(stderr, "Optimisation warning: unoptimized Shl(,0) found\n");
 	}
+
+	/* we can only eat a shl if we don't have a scale or index set yet */
+	if(addr->scale != 0 || addr->index != NULL)
+		return 0;
 	if(bitset_is_set(non_address_mode_nodes, get_irn_idx(node)))
 		return 0;
 
@@ -219,49 +292,11 @@ static int eat_shl(ia32_address_t *addr, ir_node *node)
 #endif
 
 	addr->scale = val;
-	addr->index = eat_immediates(addr, get_Shl_left(node), 0);
+	addr->index = shifted_val;
 	return 1;
 }
 
-static INLINE int mode_needs_gp_reg(ir_mode *mode) {
-	if(mode == mode_fpcw)
-		return 0;
-	if(get_mode_size_bits(mode) > 32)
-		return 0;
-	return mode_is_int(mode) || mode_is_reference(mode) || mode == mode_b;
-}
-
-static int is_downconv(const ir_node *node)
-{
-	ir_mode *src_mode;
-	ir_mode *dest_mode;
-
-	if(!is_Conv(node))
-		return 0;
-
-	/* we only want to skip the conv when we're the only user
-	 * (not optimal but for now...)
-	 */
-	if(get_irn_n_edges(node) > 1)
-		return 0;
-
-	src_mode  = get_irn_mode(get_Conv_op(node));
-	dest_mode = get_irn_mode(node);
-	return mode_needs_gp_reg(src_mode)
-		&& mode_needs_gp_reg(dest_mode)
-		&& get_mode_size_bits(dest_mode) < get_mode_size_bits(src_mode);
-}
-
-static ir_node *skip_downconv(ir_node *node)
-{
-#if 0
-	while(is_downconv(node))
-		node = get_Conv_op(node);
-#endif
-
-	return node;
-}
-
+/* Create an address mode for a given node. */
 void ia32_create_address_mode(ia32_address_t *addr, ir_node *node, int force)
 {
 	int      res = 0;
@@ -287,7 +322,7 @@ void ia32_create_address_mode(ia32_address_t *addr, ir_node *node, int force)
 	eat_imms = eat_immediates(addr, node, force);
 	if(eat_imms != node) {
 		if(force) {
-			eat_imms = skip_downconv(eat_imms);
+			eat_imms = ia32_skip_downconv(eat_imms);
 		}
 
 		res  = 1;
@@ -306,6 +341,8 @@ void ia32_create_address_mode(ia32_address_t *addr, ir_node *node, int force)
 
 	/* starting point Add, Sub or Shl, FrameAddr */
 	if(is_Shl(node)) {
+		/* We don't want to eat add x, x as shl here, so only test for real Shl
+		 * instructions, because we want the former as Lea x, x, not Shl x, 1 */
 		if(eat_shl(addr, node))
 			return;
 	} else if(is_immediate(addr, node, 0)) {
@@ -323,16 +360,16 @@ void ia32_create_address_mode(ia32_address_t *addr, ir_node *node, int force)
 		ir_node *right = get_Add_right(node);
 
 		if(force) {
-			left  = skip_downconv(left);
-			right = skip_downconv(right);
+			left  = ia32_skip_downconv(left);
+			right = ia32_skip_downconv(right);
 		}
 
 		assert(force || !is_immediate(addr, left, 0));
 		assert(force || !is_immediate(addr, right, 0));
 
-		if(is_Shl(left) && eat_shl(addr, left)) {
+		if(eat_shl(addr, left)) {
 			left = NULL;
-		} else if(is_Shl(right) && eat_shl(addr, right)) {
+		} else if(eat_shl(addr, right)) {
 			right = NULL;
 		}
 		if(left != NULL && be_is_FrameAddr(left)
@@ -376,48 +413,95 @@ void ia32_create_address_mode(ia32_address_t *addr, ir_node *node, int force)
 	addr->base = node;
 }
 
+void ia32_mark_non_am(ir_node *node)
+{
+	bitset_set(non_address_mode_nodes, get_irn_idx(node));
+}
 
+int ia32_is_non_address_mode_node(ir_node *node)
+{
+	return bitset_is_set(non_address_mode_nodes, get_irn_idx(node));
+}
+
+static int value_last_used_here(ir_node *here, ir_node *value)
+{
+	ir_node *block = get_nodes_block(here);
+	const ir_edge_t *edge;
+
+	/* If the value is live end it is for sure it does not die here */
+	if (be_is_live_end(lv, block, value)) return 0;
+
+	/* if multiple nodes in this block use the value, then we cannot decide
+	 * whether the value will die here (because there is no schedule yet).
+	 * Assume it does not die in this case. */
+	foreach_out_edge(value, edge) {
+		ir_node *user = get_edge_src_irn(edge);
+		if (user != here && get_nodes_block(user) == block) {
+			return 0;
+		}
+	}
 
+	return 1;
+}
+
+/**
+ * Walker: mark those nodes that cannot be part of an address mode because
+ * their value must be accessed through a register
+ */
 static void mark_non_address_nodes(ir_node *node, void *env)
 {
 	int i, arity;
-	ir_node *ptr;
-	ir_node *mem;
 	ir_node *val;
 	ir_node *left;
 	ir_node *right;
+	ir_mode *mode;
 	(void) env;
 
+	mode = get_irn_mode(node);
+	if(!mode_is_int(mode) && !mode_is_reference(mode) && mode != mode_b)
+		return;
+
 	switch(get_irn_opcode(node)) {
 	case iro_Load:
-		ptr = get_Load_ptr(node);
-		mem = get_Load_mem(node);
-
-		bitset_set(non_address_mode_nodes, get_irn_idx(mem));
+		/* Nothing to do. especially do not mark the pointer, because we want to
+		 * turn it into AM. */
 		break;
 
 	case iro_Store:
+		/* Do not mark the pointer, because we want to turn it into AM. */
 		val = get_Store_value(node);
-		ptr = get_Store_ptr(node);
-		mem = get_Store_mem(node);
-
 		bitset_set(non_address_mode_nodes, get_irn_idx(val));
-		bitset_set(non_address_mode_nodes, get_irn_idx(mem));
 		break;
 
+	case iro_Shl:
 	case iro_Add:
-		left  = get_Add_left(node);
-		right = get_Add_right(node);
-		/* if we can do source address mode then we will never fold the add
-		 * into address mode */
-		if(!mode_is_float(get_irn_mode(node)) && (is_immediate_simple(right) ||
-			 (!use_source_address_mode(get_nodes_block(node), left, right)
-		     && !use_source_address_mode(get_nodes_block(node), right, left))))
-		{
-		    break;
+		/* only 1 user: AM folding is always beneficial */
+		if(get_irn_n_edges(node) <= 1)
+			break;
+
+		/* for adds and shls with multiple users we use this heuristic:
+		 * we do not fold them into address mode if their operands don't live
+		 * out of the block, because in this case we will reduce register
+		 * pressure. Otherwise we fold them in aggressively in the hope, that
+		 * the node itself doesn't exist anymore and we were able to save the
+		 * register for the result */
+		left  = get_binop_left(node);
+		right = get_binop_right(node);
+
+		/* Fold AM if any of the two operands does not die here.  This duplicates
+		 * an addition and has the same register pressure for the case that only
+		 * one operand dies, but is faster (on Pentium 4).
+		 * && instead of || only folds AM if both operands do not die here */
+		if (!value_last_used_here(node, left) ||
+				!value_last_used_here(node, right)) {
+			return;
 		}
+
+		/* At least one of left and right are not used by anyone else, so it is
+		 * beneficial for the register pressure (if both are unused otherwise,
+		 * else neutral) and ALU use to not fold AM. */
 		bitset_set(non_address_mode_nodes, get_irn_idx(node));
-		/* fallthrough */
+		break;
 
 	default:
 		arity = get_irn_arity(node);
@@ -430,14 +514,17 @@ static void mark_non_address_nodes(ir_node *node, void *env)
 	}
 }
 
-void calculate_non_address_mode_nodes(ir_graph *irg)
+void ia32_calculate_non_address_mode_nodes(be_irg_t *birg)
 {
+	ir_graph *irg = be_get_birg_irg(birg);
+
+	lv                     = be_assure_liveness(birg);
 	non_address_mode_nodes = bitset_malloc(get_irg_last_idx(irg));
 
 	irg_walk_graph(irg, NULL, mark_non_address_nodes, NULL);
 }
 
-void free_non_address_mode_nodes(void)
+void ia32_free_non_address_mode_nodes(void)
 {
 	bitset_free(non_address_mode_nodes);
 }