X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fia32%2Fbearch_ia32_t.h;h=bdaabd3761ad1ae0fc25373ea454bf0a1db3eab1;hb=dc5eb2926b1ff88193b0ec00f3fbc8f969baaa4f;hp=8811416d996c1b725c8bff38b58ee3e64a6d72a3;hpb=8f4a278d0dd7e1f13c792c233711e11366f3ec47;p=libfirm diff --git a/ir/be/ia32/bearch_ia32_t.h b/ir/be/ia32/bearch_ia32_t.h index 8811416d9..bdaabd376 100644 --- a/ir/be/ia32/bearch_ia32_t.h +++ b/ir/be/ia32/bearch_ia32_t.h @@ -1,27 +1,12 @@ /* - * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved. - * * This file is part of libFirm. - * - * This file may be distributed and/or modified under the terms of the - * GNU General Public License version 2 as published by the Free Software - * Foundation and appearing in the file LICENSE.GPL included in the - * packaging of this file. - * - * Licensees holding valid libFirm Professional Edition licenses may use - * this file in accordance with the libFirm Commercial License. - * Agreement provided with the Software. - * - * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE - * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE. + * Copyright (C) 2012 University of Karlsruhe. */ /** * @file * @brief This is the main ia32 firm backend driver. * @author Christian Wuerdig - * @version $Id$ */ #ifndef FIRM_BE_IA32_BEARCH_IA32_T_H #define FIRM_BE_IA32_BEARCH_IA32_T_H @@ -34,8 +19,9 @@ #include "pdeq.h" #include "be.h" -#include "../bemachine.h" -#include "../beemitter.h" +#include "beemitter.h" +#include "beirg.h" +#include "gen_ia32_regalloc_if.h" #ifdef NDEBUG #define SET_IA32_ORIG_NODE(n, o) @@ -43,69 +29,39 @@ #define SET_IA32_ORIG_NODE(n, o) set_ia32_orig_node(n, o) #endif /* NDEBUG */ -/* some typedefs */ -typedef enum ia32_optimize_t ia32_optimize_t; -typedef enum cpu_support cpu_support; -typedef enum fp_support fp_support; - typedef struct ia32_isa_t ia32_isa_t; -typedef struct ia32_code_gen_t ia32_code_gen_t; typedef struct ia32_irn_ops_t ia32_irn_ops_t; typedef struct ia32_intrinsic_env_t ia32_intrinsic_env_t; -/** - * IA32 code generator - */ -struct ia32_code_gen_t { - const arch_code_generator_if_t *impl; /**< implementation */ - ir_graph *irg; /**< current irg */ - set *reg_set; /**< set to memorize registers for non-ia32 nodes (e.g. phi nodes) */ - ia32_isa_t *isa; /**< for fast access to the isa object */ - be_irg_t *birg; /**< The be-irg (contains additional information about the irg) */ - ir_node **blk_sched; /**< an array containing the scheduled blocks */ - unsigned do_x87_sim:1; /**< set to 1 if x87 simulation should be enforced */ - unsigned dump:1; /**< set to 1 if graphs should be dumped */ - unsigned gprof:1; /**< set to 1 grof profiling is in use */ - ir_node *unknown_gp; /**< unique Unknown_GP node */ - ir_node *unknown_vfp; /**< unique Unknown_VFP node */ - ir_node *unknown_xmm; /**< unique Unknown_XMM node */ - ir_node *noreg_gp; /**< unique NoReg_GP node */ - ir_node *noreg_vfp; /**< unique NoReg_VFP node */ - ir_node *noreg_xmm; /**< unique NoReg_XMM node */ - - ir_node *fpu_trunc_mode; /**< truncate fpu mode */ - ir_node *get_eip; /**< get eip node */ - - struct obstack *obst; -}; +typedef struct ia32_irg_data_t { + ir_node **blk_sched; /**< an array containing the scheduled blocks */ + unsigned do_x87_sim:1; /**< set to 1 if x87 simulation should be enforced */ + unsigned dump:1; /**< set to 1 if graphs should be dumped */ + ir_node *noreg_gp; /**< unique NoReg_GP node */ + ir_node *noreg_fp; /**< unique NoReg_FP node */ + ir_node *noreg_xmm; /**< unique NoReg_XMM node */ + + ir_node *fpu_trunc_mode; /**< truncate fpu mode */ + ir_node *get_eip; /**< get eip node */ +} ia32_irg_data_t; /** * IA32 ISA object */ struct ia32_isa_t { - arch_env_t arch_env; /**< must be derived from arch_env_t */ - pmap *regs_16bit; /**< Contains the 16bits names of the gp registers */ - pmap *regs_8bit; /**< Contains the 8bits names of the gp registers */ - pmap *regs_8bit_high; /**< contains the high part of the 8 bit names of the gp registers */ - pmap *types; /**< A map of modes to primitive types */ - pmap *tv_ent; /**< A map of entities that store const tarvals */ - ia32_code_gen_t *cg; /**< the current code generator */ - const be_machine_t *cpu; /**< the abstract machine */ -#ifndef NDEBUG - struct obstack *name_obst; /**< holds the original node names (for debugging) */ -#endif /* NDEBUG */ + arch_env_t base; /**< must be derived from arch_env_t */ + pmap *tv_ent; /**< A map of entities that store const tarvals */ + int fpu_arch; /**< FPU architecture */ }; /** * A helper type collecting needed info for IA32 intrinsic lowering. */ struct ia32_intrinsic_env_t { - ia32_isa_t *isa; /**< the isa object */ - ir_graph *irg; /**< the irg, these entities belong to */ - ir_entity *divdi3; /**< entity for __divdi3 library call */ - ir_entity *moddi3; /**< entity for __moddi3 library call */ - ir_entity *udivdi3; /**< entity for __udivdi3 library call */ - ir_entity *umoddi3; /**< entity for __umoddi3 library call */ + ir_entity *divdi3; /**< entity for __divdi3 library call */ + ir_entity *moddi3; /**< entity for __moddi3 library call */ + ir_entity *udivdi3; /**< entity for __udivdi3 library call */ + ir_entity *umoddi3; /**< entity for __umoddi3 library call */ }; typedef enum transformer_t { @@ -125,36 +81,39 @@ extern transformer_t be_transformer; #endif /** The mode for the floating point control word. */ -extern ir_mode *mode_fpcw; - -/** The current code generator. */ -extern ia32_code_gen_t *ia32_current_cg; +extern ir_mode *ia32_mode_fpcw; +/** extended floatingpoint mode */ +extern ir_mode *ia32_mode_E; +extern ir_type *ia32_type_E; + +static inline ia32_irg_data_t *ia32_get_irg_data(const ir_graph *irg) +{ + return (ia32_irg_data_t*) be_birg_from_irg(irg)->isa_link; +} + +static inline void ia32_request_x87_sim(ir_graph const *const irg) +{ + ia32_irg_data_t *const d = ia32_get_irg_data(irg); + d->do_x87_sim = true; +} /** * Returns the unique per irg GP NoReg node. */ -ir_node *ia32_new_NoReg_gp(ia32_code_gen_t *cg); -ir_node *ia32_new_NoReg_xmm(ia32_code_gen_t *cg); -ir_node *ia32_new_NoReg_vfp(ia32_code_gen_t *cg); - -/** - * Returns the unique per irg GP Unknown node. - * (warning: cse has to be activated) - */ -ir_node *ia32_new_Unknown_gp(ia32_code_gen_t *cg); -ir_node *ia32_new_Unknown_xmm(ia32_code_gen_t *cg); -ir_node *ia32_new_Unknown_vfp(ia32_code_gen_t *cg); +ir_node *ia32_new_NoReg_gp(ir_graph *irg); +ir_node *ia32_new_NoReg_xmm(ir_graph *irg); +ir_node *ia32_new_NoReg_fp(ir_graph *irg); /** * Returns the unique per irg FPU truncation mode node. */ -ir_node *ia32_new_Fpu_truncate(ia32_code_gen_t *cg); +ir_node *ia32_new_Fpu_truncate(ir_graph *irg); /** * Split instruction with source AM into Load and separate instruction. * @return result of the Load */ -ir_node *turn_back_am(ir_node *node); +ir_node *ia32_turn_back_am(ir_node *node); /** * Maps all intrinsic calls that the backend support @@ -179,11 +138,11 @@ ir_entity *ia32_create_intrinsic_fkt(ir_type *method, const ir_op *op, /** * Return the stack entity that contains the return address. */ -ir_entity *ia32_get_return_address_entity(void); +ir_entity *ia32_get_return_address_entity(ir_graph *irg); /** * Return the stack entity that contains the frame address. */ -ir_entity *ia32_get_frame_address_entity(void); +ir_entity *ia32_get_frame_address_entity(ir_graph *irg); #endif