X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fia32%2Fbearch_ia32_t.h;h=8811416d996c1b725c8bff38b58ee3e64a6d72a3;hb=e9788b1182b08e303f11c0df45a8a2f72955e520;hp=2234f821adac2cf6b5e012fdf5406e369dd6fff1;hpb=5a840be89d3e0a2af317626671bf1c8974a40da7;p=libfirm diff --git a/ir/be/ia32/bearch_ia32_t.h b/ir/be/ia32/bearch_ia32_t.h index 2234f821a..8811416d9 100644 --- a/ir/be/ia32/bearch_ia32_t.h +++ b/ir/be/ia32/bearch_ia32_t.h @@ -1,166 +1,160 @@ -#ifndef _BEARCH_IA32_T_H_ -#define _BEARCH_IA32_T_H_ +/* + * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved. + * + * This file is part of libFirm. + * + * This file may be distributed and/or modified under the terms of the + * GNU General Public License version 2 as published by the Free Software + * Foundation and appearing in the file LICENSE.GPL included in the + * packaging of this file. + * + * Licensees holding valid libFirm Professional Edition licenses may use + * this file in accordance with the libFirm Commercial License. + * Agreement provided with the Software. + * + * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE + * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE. + */ -#include "firm_config.h" +/** + * @file + * @brief This is the main ia32 firm backend driver. + * @author Christian Wuerdig + * @version $Id$ + */ +#ifndef FIRM_BE_IA32_BEARCH_IA32_T_H +#define FIRM_BE_IA32_BEARCH_IA32_T_H +#include "config.h" #include "pmap.h" #include "debug.h" -#include "bearch_ia32.h" #include "ia32_nodes_attr.h" #include "set.h" -#include "../be.h" +#include "pdeq.h" + +#include "be.h" +#include "../bemachine.h" +#include "../beemitter.h" #ifdef NDEBUG #define SET_IA32_ORIG_NODE(n, o) -#else -#define SET_IA32_ORIG_NODE(n, o) set_ia32_orig_node(n, o); +#else /* ! NDEBUG */ +#define SET_IA32_ORIG_NODE(n, o) set_ia32_orig_node(n, o) #endif /* NDEBUG */ /* some typedefs */ +typedef enum ia32_optimize_t ia32_optimize_t; +typedef enum cpu_support cpu_support; +typedef enum fp_support fp_support; -/** - * Bitmask for the backend optimization settings. - */ -typedef enum _ia32_optimize_t { - IA32_OPT_INCDEC = 1, /**< optimize add/sub 1/-1 to inc/dec */ - IA32_OPT_DOAM = 2, /**< do address mode optimizations */ - IA32_OPT_LEA = 4, /**< optimize address calculations into LEAs */ - IA32_OPT_PLACECNST = 8, /**< place constants in the blocks where they are used */ - IA32_OPT_IMMOPS = 16, /**< create operations with immediate operands */ - IA32_OPT_EXTBB = 32, /**< do extended basic block scheduling */ -} ia32_optimize_t; - -/** - * Architectures. Clustered for easier macro implementation, - * do not change. - */ -typedef enum cpu_support { - arch_i386, /**< i386 */ - arch_i486, /**< i486 */ - arch_pentium, /**< Pentium */ - arch_pentium_pro, /**< Pentium Pro */ - arch_pentium_mmx, /**< Pentium MMX */ - arch_pentium_2, /**< Pentium II */ - arch_pentium_3, /**< Pentium III */ - arch_pentium_4, /**< Pentium IV */ - arch_pentium_m, /**< Pentium M */ - arch_core, /**< Core */ - arch_k6, /**< K6 */ - arch_athlon, /**< Athlon */ - arch_athlon_64, /**< Athlon64 */ - arch_opteron, /**< Opteron */ -} cpu_support; - -/** checks for l <= x <= h */ -#define _IN_RANGE(x, l, h) ((unsigned)((x) - (l)) <= (unsigned)((h) - (l))) - -/** returns true if it's Intel architecture */ -#define ARCH_INTEL(x) _IN_RANGE((x), arch_i386, arch_core) - -/** returns true if it's AMD architecture */ -#define ARCH_AMD(x) _IN_RANGE((x), arch_k6, arch_opteron) - -#define IS_P6_ARCH(x) (_IN_RANGE((x), arch_pentium_pro, arch_core) || \ - _IN_RANGE((x), arch_athlon, arch_opteron)) - -/** floating point support */ -typedef enum fp_support { - fp_none, /**< no floating point instructions are used */ - fp_x87, /**< use x87 instructions */ - fp_sse2 /**< use SSE2 instructions */ -} fp_support; - -/** Sets the used flag to the current floating point architecture. */ -#define FP_USED(cg) ((cg)->used_fp = (cg)->fp_kind) - -/** Returns non-zero if the current floating point architecture is SSE2. */ -#define USE_SSE2(cg) ((cg)->fp_kind == fp_sse2) - -/** Returns non-zero if the current floating point architecture is x87. */ -#define USE_x87(cg) ((cg)->fp_kind == fp_x87) - -/** Sets the flag to enforce x87 simulation. */ -#define FORCE_x87(cg) ((cg)->force_sim = 1) - -typedef struct _ia32_isa_t ia32_isa_t; +typedef struct ia32_isa_t ia32_isa_t; +typedef struct ia32_code_gen_t ia32_code_gen_t; +typedef struct ia32_irn_ops_t ia32_irn_ops_t; +typedef struct ia32_intrinsic_env_t ia32_intrinsic_env_t; /** * IA32 code generator */ -typedef struct _ia32_code_gen_t { +struct ia32_code_gen_t { const arch_code_generator_if_t *impl; /**< implementation */ ir_graph *irg; /**< current irg */ - const arch_env_t *arch_env; /**< the arch env */ set *reg_set; /**< set to memorize registers for non-ia32 nodes (e.g. phi nodes) */ ia32_isa_t *isa; /**< for fast access to the isa object */ - const be_irg_t *birg; /**< The be-irg (contains additional information about the irg) */ + be_irg_t *birg; /**< The be-irg (contains additional information about the irg) */ ir_node **blk_sched; /**< an array containing the scheduled blocks */ - ia32_optimize_t opt; /**< contains optimization information */ - entity *fp_to_gp; /**< allocated entity for fp to gp conversion */ - entity *gp_to_fp; /**< allocated entity for gp to fp conversion */ - int arch; /**< instruction architecture */ - int opt_arch; /**< optimize for architecture */ - char fp_kind; /**< floating point kind */ - char used_fp; /**< which floating point unit used in this graph */ - char force_sim; /**< set to 1 if x87 simulation should be enforced */ - char dump; /**< set to 1 if graphs should be dumped */ - DEBUG_ONLY(firm_dbg_module_t *mod;) /**< debugging module */ -} ia32_code_gen_t; + unsigned do_x87_sim:1; /**< set to 1 if x87 simulation should be enforced */ + unsigned dump:1; /**< set to 1 if graphs should be dumped */ + unsigned gprof:1; /**< set to 1 grof profiling is in use */ + ir_node *unknown_gp; /**< unique Unknown_GP node */ + ir_node *unknown_vfp; /**< unique Unknown_VFP node */ + ir_node *unknown_xmm; /**< unique Unknown_XMM node */ + ir_node *noreg_gp; /**< unique NoReg_GP node */ + ir_node *noreg_vfp; /**< unique NoReg_VFP node */ + ir_node *noreg_xmm; /**< unique NoReg_XMM node */ + + ir_node *fpu_trunc_mode; /**< truncate fpu mode */ + ir_node *get_eip; /**< get eip node */ + + struct obstack *obst; +}; /** * IA32 ISA object */ -struct _ia32_isa_t { - arch_isa_t arch_isa; /**< must be derived from arch_isa_t */ +struct ia32_isa_t { + arch_env_t arch_env; /**< must be derived from arch_env_t */ pmap *regs_16bit; /**< Contains the 16bits names of the gp registers */ pmap *regs_8bit; /**< Contains the 8bits names of the gp registers */ + pmap *regs_8bit_high; /**< contains the high part of the 8 bit names of the gp registers */ pmap *types; /**< A map of modes to primitive types */ pmap *tv_ent; /**< A map of entities that store const tarvals */ - ia32_optimize_t opt; /**< contains optimization information */ - int arch; /**< instruction architecture */ - int opt_arch; /**< optimize for architecture */ - int fp_kind; /**< floating point kind */ ia32_code_gen_t *cg; /**< the current code generator */ - FILE *out; /**< output file */ + const be_machine_t *cpu; /**< the abstract machine */ #ifndef NDEBUG struct obstack *name_obst; /**< holds the original node names (for debugging) */ - unsigned long name_obst_size; #endif /* NDEBUG */ }; -typedef struct _ia32_irn_ops_t { - const arch_irn_ops_if_t *impl; - ia32_code_gen_t *cg; -} ia32_irn_ops_t; - -/* this is a struct to minimize the number of parameters - for transformation walker */ -typedef struct _ia32_transform_env_t { - dbg_info *dbg; /**< The node debug info */ - ir_graph *irg; /**< The irg, the node should be created in */ - ir_node *block; /**< The block, the node should belong to */ - ir_node *irn; /**< The irn, to be transformed */ - ir_mode *mode; /**< The mode of the irn */ - ia32_code_gen_t *cg; /**< The code generator */ - DEBUG_ONLY(firm_dbg_module_t *mod;) /**< The firm debugger */ -} ia32_transform_env_t; - -typedef struct _ia32_intrinsic_env_t { - entity *ll_div_op1; /**< entity for first div operand (move into FPU) */ - entity *ll_div_op2; /**< entity for second div operand (move into FPU) */ - entity *ll_d_conv; /**< entity for converts ll -> d */ - entity *d_ll_conv; /**< entity for converts d -> ll */ -} ia32_intrinsic_env_t; +/** + * A helper type collecting needed info for IA32 intrinsic lowering. + */ +struct ia32_intrinsic_env_t { + ia32_isa_t *isa; /**< the isa object */ + ir_graph *irg; /**< the irg, these entities belong to */ + ir_entity *divdi3; /**< entity for __divdi3 library call */ + ir_entity *moddi3; /**< entity for __moddi3 library call */ + ir_entity *udivdi3; /**< entity for __udivdi3 library call */ + ir_entity *umoddi3; /**< entity for __umoddi3 library call */ +}; + +typedef enum transformer_t { + TRANSFORMER_DEFAULT, +#ifdef FIRM_GRGEN_BE + TRANSFORMER_PBQP, + TRANSFORMER_RAND +#endif +} transformer_t; + +#ifdef FIRM_GRGEN_BE +/** The selected transformer. */ +extern transformer_t be_transformer; + +#else +#define be_transformer TRANSFORMER_DEFAULT +#endif + +/** The mode for the floating point control word. */ +extern ir_mode *mode_fpcw; + +/** The current code generator. */ +extern ia32_code_gen_t *ia32_current_cg; /** * Returns the unique per irg GP NoReg node. */ ir_node *ia32_new_NoReg_gp(ia32_code_gen_t *cg); +ir_node *ia32_new_NoReg_xmm(ia32_code_gen_t *cg); +ir_node *ia32_new_NoReg_vfp(ia32_code_gen_t *cg); + +/** + * Returns the unique per irg GP Unknown node. + * (warning: cse has to be activated) + */ +ir_node *ia32_new_Unknown_gp(ia32_code_gen_t *cg); +ir_node *ia32_new_Unknown_xmm(ia32_code_gen_t *cg); +ir_node *ia32_new_Unknown_vfp(ia32_code_gen_t *cg); /** - * Returns the unique per irg FP NoReg node. + * Returns the unique per irg FPU truncation mode node. */ -ir_node *ia32_new_NoReg_fp(ia32_code_gen_t *cg); +ir_node *ia32_new_Fpu_truncate(ia32_code_gen_t *cg); + +/** + * Split instruction with source AM into Load and separate instruction. + * @return result of the Load + */ +ir_node *turn_back_am(ir_node *node); /** * Maps all intrinsic calls that the backend support @@ -178,8 +172,18 @@ void ia32_handle_intrinsics(void); * @param omode the output mode of the emulated opcode * @param context the context parameter */ -entity *ia32_create_intrinsic_fkt(ir_type *method, const ir_op *op, - const ir_mode *imode, const ir_mode *omode, - void *context); +ir_entity *ia32_create_intrinsic_fkt(ir_type *method, const ir_op *op, + const ir_mode *imode, const ir_mode *omode, + void *context); + +/** + * Return the stack entity that contains the return address. + */ +ir_entity *ia32_get_return_address_entity(void); + +/** + * Return the stack entity that contains the frame address. + */ +ir_entity *ia32_get_frame_address_entity(void); -#endif /* _BEARCH_IA32_T_H_ */ +#endif