X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fia32%2Fbearch_ia32.c;h=a2a226524de05e58b445945f0b5ec70604d0930f;hb=3ad2e44266561dbd0f519b4610e37adc53ce8714;hp=1aa1e7683b1954eb8e2f23d7ec4e4aac4e0c1357;hpb=505aacfd9e3efeca3c32114a98837a88a469e440;p=libfirm diff --git a/ir/be/ia32/bearch_ia32.c b/ir/be/ia32/bearch_ia32.c index 1aa1e7683..a2a226524 100644 --- a/ir/be/ia32/bearch_ia32.c +++ b/ir/be/ia32/bearch_ia32.c @@ -19,10 +19,11 @@ #include "bitset.h" #include "debug.h" -#include "../bearch.h" /* the general register allocator interface */ +#include "../beabi.h" /* the general register allocator interface */ #include "../benode_t.h" #include "../belower.h" #include "../besched_t.h" +#include "../be.h" #include "bearch_ia32_t.h" #include "ia32_new_nodes.h" /* ia32 nodes interface */ @@ -41,6 +42,14 @@ static set *cur_reg_set = NULL; #undef is_Start #define is_Start(irn) (get_irn_opcode(irn) == iro_Start) +ir_node *ia32_new_NoReg_gp(ia32_code_gen_t *cg) { + return be_abi_get_callee_save_irn(cg->birg->abi, &ia32_gp_regs[REG_XXX]); +} + +ir_node *ia32_new_NoReg_fp(ia32_code_gen_t *cg) { + return be_abi_get_callee_save_irn(cg->birg->abi, &ia32_fp_regs[REG_XXXX]); +} + /************************************************** * _ _ _ __ * | | | (_)/ _| @@ -58,45 +67,6 @@ static ir_node *my_skip_proj(const ir_node *n) { return (ir_node *)n; } -static int is_Call_Proj(const ir_node *n) { - if (is_Proj(n) && - is_Proj(get_Proj_pred(n)) && - get_irn_mode(get_Proj_pred(n)) == mode_T && - is_ia32_Call(get_Proj_pred(get_Proj_pred(n)))) - { - return 1; - } - - return 0; -} - -static int is_Start_Proj(const ir_node *n) { - if (is_Proj(n) && - is_Proj(get_Proj_pred(n)) && - get_irn_mode(get_Proj_pred(n)) == mode_T && - is_Start(get_Proj_pred(get_Proj_pred(n)))) - { - return 1; - } - - return 0; -} - -static int is_P_frame_base_Proj(const ir_node *n) { - if (is_Proj(n) && - is_Start(get_Proj_pred(n)) && - get_Proj_proj(n) == pn_Start_P_frame_base) - { - return 1; - } - - return 0; -} - -static int is_used_by_Keep(const ir_node *n) { - return be_is_Keep(get_edge_src_irn(get_irn_out_edge_first(n))); -} - /** * Return register requirements for an ia32 node. * If the node returns a tuple (mode_T) then the proj's @@ -117,24 +87,7 @@ static const arch_register_req_t *ia32_get_irn_reg_req(const void *self, arch_re DBG((mod, LEVEL_1, "get requirements at pos %d for %+F ... ", pos, irn)); - if (is_Call_Proj(irn) && is_used_by_Keep(irn)) { - if (pos >= 0) { - req = NULL; - } - else { - irn_req = ia32_projnum_reg_req_map[get_Proj_proj(irn)]; - memcpy(req, &(irn_req->req), sizeof(*req)); - } - - return req; - } - else if (is_Start_Proj(irn)) { - irn_req = ops->cg->reg_param_req[get_Proj_proj(irn)]; - assert(irn_req && "missing requirement for regparam"); - memcpy(req, &(irn_req->req), sizeof(*req)); - return req; - } - else if (is_Proj(irn)) { + if (is_Proj(irn)) { if (pos == -1) { node_pos = ia32_translate_proj_pos(irn); } @@ -159,10 +112,14 @@ static const arch_register_req_t *ia32_get_irn_reg_req(const void *self, arch_re memcpy(req, &(irn_req->req), sizeof(*req)); - if (arch_register_req_is(&(irn_req->req), should_be_same) || - arch_register_req_is(&(irn_req->req), should_be_different)) { - assert(irn_req->pos >= 0 && "should be same/different constraint for in -> out NYI"); - req->other = get_irn_n(irn, irn_req->pos); + if (arch_register_req_is(&(irn_req->req), should_be_same)) { + assert(irn_req->same_pos >= 0 && "should be same constraint for in -> out NYI"); + req->other_same = get_irn_n(irn, irn_req->same_pos); + } + + if (arch_register_req_is(&(irn_req->req), should_be_different)) { + assert(irn_req->different_pos >= 0 && "should be different constraint for in -> out NYI"); + req->other_different = get_irn_n(irn, irn_req->different_pos); } } else { @@ -170,9 +127,9 @@ static const arch_register_req_t *ia32_get_irn_reg_req(const void *self, arch_re if (is_Phi(irn)) { DB((mod, LEVEL_1, "returning standard reqs for %+F\n", irn)); if (mode_is_float(mode)) - memcpy(req, &(ia32_default_req_ia32_floating_point.req), sizeof(*req)); + memcpy(req, &(ia32_default_req_ia32_fp.req), sizeof(*req)); else if (mode_is_int(mode) || mode_is_reference(mode)) - memcpy(req, &(ia32_default_req_ia32_general_purpose.req), sizeof(*req)); + memcpy(req, &(ia32_default_req_ia32_gp.req), sizeof(*req)); else if (mode == mode_T || mode == mode_M) { DBG((mod, LEVEL_1, "ignoring Phi node %+F\n", irn)); return NULL; @@ -180,23 +137,6 @@ static const arch_register_req_t *ia32_get_irn_reg_req(const void *self, arch_re else assert(0 && "unsupported Phi-Mode"); } - else if (is_Start(irn)) { - DB((mod, LEVEL_1, "returning reqs none for ProjX -> Start (%+F )\n", irn)); - switch (node_pos) { - case pn_Start_X_initial_exec: - case pn_Start_P_value_arg_base: - case pn_Start_P_globals: - case pn_Start_P_frame_base: - memcpy(req, &(ia32_default_req_none.req), sizeof(*req)); - break; - case pn_Start_T_args: - assert(0 && "ProjT(pn_Start_T_args) should not be asked"); - } - } - else if (get_irn_op(irn) == op_Return && pos > 0) { - DB((mod, LEVEL_1, "returning reqs EAX for %+F\n", irn)); - memcpy(req, &(ia32_default_req_ia32_general_purpose_eax.req), sizeof(*req)); - } else { DB((mod, LEVEL_1, "returning NULL for %+F (not ia32)\n", irn)); req = NULL; @@ -209,13 +149,7 @@ static const arch_register_req_t *ia32_get_irn_reg_req(const void *self, arch_re static void ia32_set_irn_reg(const void *self, ir_node *irn, const arch_register_t *reg) { int pos = 0; - if ((is_Call_Proj(irn) && is_used_by_Keep(irn)) || - is_P_frame_base_Proj(irn) || - is_Start_Proj(irn)) - { - /* don't skip the proj, we want to take the else below */ - } - else if (is_Proj(irn)) { + if (is_Proj(irn)) { pos = ia32_translate_proj_pos(irn); irn = my_skip_proj(irn); } @@ -235,13 +169,7 @@ static const arch_register_t *ia32_get_irn_reg(const void *self, const ir_node * int pos = 0; const arch_register_t *reg = NULL; - if ((is_Call_Proj(irn) && is_used_by_Keep(irn)) || - is_P_frame_base_Proj(irn) || - is_Start_Proj(irn)) - { - /* don't skip the proj, we want to take the else below */ - } - else if (is_Proj(irn)) { + if (is_Proj(irn)) { pos = ia32_translate_proj_pos(irn); irn = my_skip_proj(irn); } @@ -262,8 +190,6 @@ static arch_irn_class_t ia32_classify(const void *self, const ir_node *irn) { irn = my_skip_proj(irn); if (is_cfop(irn)) return arch_irn_class_branch; - else if (is_ia32_Call(irn)) - return arch_irn_class_call; else if (is_ia32_irn(irn)) return arch_irn_class_normal; else @@ -275,13 +201,22 @@ static arch_irn_flags_t ia32_get_flags(const void *self, const ir_node *irn) { if (is_ia32_irn(irn)) return get_ia32_flags(irn); else { - if (is_Start_Proj(irn)) - return arch_irn_flags_ignore; - return 0; } } +static entity *ia32_get_frame_entity(const void *self, const ir_node *irn) +{ + /* TODO: Implement */ + return NULL; +} + +static void ia32_set_stack_bias(const void *self, ir_node *irn, int bias) { + if (is_ia32_use_frame(irn)) { + /* TODO: correct offset */ + } +} + /* fill register allocator interface */ static const arch_irn_ops_if_t ia32_irn_ops_if = { @@ -289,7 +224,9 @@ static const arch_irn_ops_if_t ia32_irn_ops_if = { ia32_set_irn_reg, ia32_get_irn_reg, ia32_classify, - ia32_get_flags + ia32_get_flags, + ia32_get_frame_entity, + ia32_set_stack_bias }; ia32_irn_ops_t ia32_irn_ops = { @@ -310,16 +247,6 @@ ia32_irn_ops_t ia32_irn_ops = { * |___/ **************************************************/ -static void check_for_alloca(ir_node *irn, void *env) { - int *has_alloca = env; - - if (get_irn_op(irn) == op_Alloc) { - if (get_Alloc_where(irn) == stack_alloc) { - *has_alloca = 1; - } - } -} - /** * Transforms the standard firm graph into * an ia32 firm graph @@ -327,21 +254,12 @@ static void check_for_alloca(ir_node *irn, void *env) { static void ia32_prepare_graph(void *self) { ia32_code_gen_t *cg = self; - if (! is_pseudo_ir_graph(cg->irg)) { - /* If there is a alloca in the irg, we use %ebp for stack addressing */ - /* instead of %esp, as alloca destroys %esp. */ - - cg->has_alloca = 0; - - /* check for alloca node */ - irg_walk_blkwise_graph(cg->irg, check_for_alloca, NULL, &(cg->has_alloca)); - - if (cg->has_alloca) { - ia32_general_purpose_regs[REG_EBP].type = arch_register_type_ignore; - } - - irg_walk_blkwise_graph(cg->irg, ia32_place_consts, ia32_transform_node, cg); - } + irg_walk_blkwise_graph(cg->irg, ia32_place_consts, ia32_transform_node, cg); + dump_ir_block_graph_sched(cg->irg, "-transformed"); + edges_deactivate(cg->irg); + edges_activate(cg->irg); + irg_walk_blkwise_graph(cg->irg, NULL, ia32_optimize_am, cg); + dump_ir_block_graph_sched(cg->irg, "-am"); } @@ -350,104 +268,7 @@ static void ia32_prepare_graph(void *self) { * Stack reservation and StackParam lowering. */ static void ia32_finish_irg(ir_graph *irg, ia32_code_gen_t *cg) { - firm_dbg_module_t *mod = cg->mod; - ir_node *frame = get_irg_frame(irg); - ir_node *end_block = get_irg_end_block(irg); - ir_node **returns, **in, **new_in; - ir_node *stack_reserve, *sched_point; - ir_node *stack_free, *new_ret, *return_block; - int stack_size = 0, i, n_arg; - arch_register_t *stack_reg; - tarval *stack_size_tv; - dbg_info *frame_dbg; - - /* Determine stack register */ - if (cg->has_alloca) { - stack_reg = &ia32_general_purpose_regs[REG_EBP]; - } - else { - stack_reg = &ia32_general_purpose_regs[REG_ESP]; - } - - /* If frame is used, then we need to reserve some stackspace. */ - if (get_irn_n_edges(frame) > 0) { - /* The initial stack reservation. */ - stack_size = get_type_size_bytes(get_irg_frame_type(irg)); - frame_dbg = get_irn_dbg_info(frame); - stack_reserve = new_rd_ia32_Sub_i(frame_dbg, irg, get_nodes_block(frame), new_NoMem(), mode_Is); - stack_size_tv = new_tarval_from_long(stack_size, mode_Is); - set_ia32_Immop_tarval(stack_reserve, stack_size_tv); - - assert(stack_size && "bOrken stack layout"); - - /* reroute all edges from frame pointer to corrected frame pointer */ - edges_reroute(frame, stack_reserve, irg); - set_irn_n(stack_reserve, 0, frame); - - /* schedule frame pointer */ - if (! sched_is_scheduled(frame)) { - sched_add_after(get_irg_start(irg), frame); - } - - /* set register */ - arch_set_irn_register(cg->arch_env, frame, stack_reg); - arch_set_irn_register(cg->arch_env, stack_reserve, stack_reg); - /* insert into schedule */ - sched_add_after(frame, stack_reserve); - - /* Free stack for each Return node */ - returns = get_Block_cfgpred_arr(end_block); - for (i = 0; i < get_Block_n_cfgpreds(end_block); i++) { - assert(get_irn_opcode(returns[i]) == iro_Return && "cfgpred of endblock is not a return"); - - return_block = get_nodes_block(returns[i]); - - /* free the stack */ - stack_free = new_rd_ia32_Add_i(frame_dbg, irg, return_block, stack_reserve, mode_Is); - set_ia32_Immop_tarval(stack_free, stack_size_tv); - arch_set_irn_register(cg->arch_env, stack_free, stack_reg); - - DBG((mod, LEVEL_1, "examining %+F, %+F created, block %+F", returns[i], stack_free, return_block)); - - /* get the old Return arguments */ - n_arg = get_Return_n_ress(returns[i]); - in = get_Return_res_arr(returns[i]); - new_in = xmalloc((n_arg + 2) * sizeof(new_in[0])); - - if (!new_in) { - printf("\nMUAAAAHAHAHAHAHAHAHAH\n"); - exit(1); - } - - /* copy the old to the new in's */ - memcpy(new_in, in, n_arg * sizeof(in[0])); - new_in[n_arg++] = stack_free; - new_in[n_arg++] = get_Return_mem(returns[i]); - - /* create the new return node */ - new_ret = new_rd_ia32_Return(get_irn_dbg_info(returns[i]), irg, return_block, n_arg, new_in); - - /* In case the return node is the only node in the block, */ - /* it is not scheduled, so we need this work-around. */ - if (! sched_is_scheduled(returns[i])) { - sched_point = return_block; - } - else { - sched_point = sched_prev(returns[i]); - sched_remove(returns[i]); - } - - /* exchange the old return with the new one */ - exchange(returns[i], new_ret); - - DB((mod, LEVEL_1, " ... replaced with %+F\n", new_ret)); - - /* remove the old one from schedule and add the new nodes properly */ - sched_add_after(sched_point, new_ret); - sched_add_after(sched_point, stack_free); - } - } } @@ -456,82 +277,12 @@ static void ia32_finish_irg(ir_graph *irg, ia32_code_gen_t *cg) { * Dummy functions for hooks we don't need but which must be filled. */ static void ia32_before_sched(void *self) { - ia32_code_gen_t *cg = self; - - lower_nodes_before_sched(cg->irg, cg->arch_env); } static void ia32_before_ra(void *self) { } -/** - * Creates a Store for a Spill - */ -static ir_node *ia32_lower_spill(void *self, ir_node *spill) { - ia32_code_gen_t *cg = self; - dbg_info *dbg = get_irn_dbg_info(spill); - ir_node *block = get_nodes_block(spill); - ir_node *ptr = get_irg_frame(cg->irg); - ir_node *val = be_get_Spill_context(spill); - ir_node *mem = new_rd_NoMem(cg->irg); - ir_mode *mode = get_irn_mode(spill); - ir_node *res; - entity *ent = be_get_spill_entity(spill); - unsigned offs = get_entity_offset_bytes(ent); - - DB((cg->mod, LEVEL_1, "lower_spill: got offset %d for %+F\n", offs, ent)); - - res = new_rd_ia32_Store(dbg, cg->irg, block, ptr, val, mem, mode); - set_ia32_am_offs(res, new_tarval_from_long(offs, mode_Iu)); - - return res; -} - -/** - * Create a Load for a Spill - */ -static ir_node *ia32_lower_reload(void *self, ir_node *reload) { - ia32_code_gen_t *cg = self; - dbg_info *dbg = get_irn_dbg_info(reload); - ir_node *block = get_nodes_block(reload); - ir_node *ptr = get_irg_frame(cg->irg); - ir_mode *mode = get_irn_mode(reload); - ir_node *pred = get_irn_n(reload, 0); - tarval *tv; - ir_node *res; - - if (be_is_Spill(pred)) { - entity *ent = be_get_spill_entity(pred); - unsigned offs = get_entity_offset_bytes(ent); - DB((cg->mod, LEVEL_1, "lower_reload: got offset %d for %+F\n", offs, ent)); - tv = new_tarval_from_long(offs, mode_Iu); - } - else if (is_ia32_Store(pred)) { - tv = get_ia32_am_offs(pred); - } - else { - assert(0 && "unsupported Reload predecessor"); - } - - res = new_rd_ia32_Load(dbg, cg->irg, block, ptr, pred, mode); - set_ia32_am_offs(res, tv); - - return res; -} - -/** - * Return the stack register for this irg. - */ -static const arch_register_t *ia32_get_stack_register(void *self) { - ia32_code_gen_t *cg = self; - - if (cg->has_alloca) { - return &ia32_general_purpose_regs[REG_EBP]; - } - - return &ia32_general_purpose_regs[REG_ESP]; -} /** * Emits the code, closes the output file and frees @@ -539,8 +290,10 @@ static const arch_register_t *ia32_get_stack_register(void *self) { */ static void ia32_codegen(void *self) { ia32_code_gen_t *cg = self; - ir_graph *irg = cg->irg; - FILE *out = cg->out; + ir_graph *irg = cg->irg; + FILE *out = cg->out; + + ia32_register_emitters(); if (cg->emit_decls) { ia32_gen_decls(cg->out); @@ -548,42 +301,45 @@ static void ia32_codegen(void *self) { } ia32_finish_irg(irg, cg); - dump_ir_block_graph_sched(irg, "-finished"); + //dump_ir_block_graph_sched(irg, "-finished"); ia32_gen_routine(out, irg, cg); cur_reg_set = NULL; + pmap_destroy(cg->tv_ent); + pmap_destroy(cg->types); + /* de-allocate code generator */ del_set(cg->reg_set); free(self); } -static void *ia32_cg_init(FILE *F, ir_graph *irg, const arch_env_t *arch_env); +static void *ia32_cg_init(FILE *F, const be_irg_t *birg); static const arch_code_generator_if_t ia32_code_gen_if = { ia32_cg_init, ia32_prepare_graph, ia32_before_sched, /* before scheduling hook */ ia32_before_ra, /* before register allocation hook */ - ia32_lower_spill, - ia32_lower_reload, - ia32_get_stack_register, ia32_codegen /* emit && done */ }; /** * Initializes the code generator. */ -static void *ia32_cg_init(FILE *F, ir_graph *irg, const arch_env_t *arch_env) { - ia32_isa_t *isa = (ia32_isa_t *)arch_env->isa; - ia32_code_gen_t *cg = xmalloc(sizeof(*cg)); - - cg->impl = &ia32_code_gen_if; - cg->irg = irg; - cg->reg_set = new_set(ia32_cmp_irn_reg_assoc, 1024); - cg->mod = firm_dbg_register("firm.be.ia32.cg"); - cg->out = F; - cg->arch_env = arch_env; +static void *ia32_cg_init(FILE *F, const be_irg_t *birg) { + ia32_isa_t *isa = (ia32_isa_t *)birg->main_env->arch_env->isa; + ia32_code_gen_t *cg = xcalloc(1, sizeof(*cg)); + + cg->impl = &ia32_code_gen_if; + cg->irg = birg->irg; + cg->reg_set = new_set(ia32_cmp_irn_reg_assoc, 1024); + cg->mod = firm_dbg_register("firm.be.ia32.cg"); + cg->out = F; + cg->arch_env = birg->main_env->arch_env; + cg->types = pmap_create(); + cg->tv_ent = pmap_create(); + cg->birg = birg; isa->num_codegens++; @@ -611,26 +367,32 @@ static void *ia32_cg_init(FILE *F, ir_graph *irg, const arch_env_t *arch_env) { * *****************************************************************/ +static ia32_isa_t ia32_isa_template = { + &ia32_isa_if, + &ia32_gp_regs[REG_ESP], + &ia32_gp_regs[REG_EBP], + -1, + 0 +}; + /** - * Initializes the backend ISA and opens the output file. + * Initializes the backend ISA. */ static void *ia32_init(void) { static int inited = 0; - ia32_isa_t *isa = xmalloc(sizeof(*isa)); - - isa->impl = &ia32_isa_if; + ia32_isa_t *isa; if(inited) return NULL; - inited = 1; - - isa->num_codegens = 0; - isa->reg_projnum_map = new_set(ia32_cmp_reg_projnum_assoc, 1024); + isa = xcalloc(1, sizeof(*isa)); + memcpy(isa, &ia32_isa_template, sizeof(*isa)); ia32_register_init(isa); ia32_create_opcodes(); + inited = 1; + return isa; } @@ -654,60 +416,141 @@ static const arch_register_class_t *ia32_get_reg_class(const void *self, int i) return &ia32_reg_classes[i]; } -static const void *ia32_get_irn_ops(const arch_irn_handler_t *self, const ir_node *irn) { - return &ia32_irn_ops; +/** + * Get the register class which shall be used to store a value of a given mode. + * @param self The this pointer. + * @param mode The mode in question. + * @return A register class which can hold values of the given mode. + */ +const arch_register_class_t *ia32_get_reg_class_for_mode(const void *self, const ir_mode *mode) { + if (mode_is_float(mode)) + return &ia32_reg_classes[CLASS_ia32_fp]; + else + return &ia32_reg_classes[CLASS_ia32_gp]; } -const arch_irn_handler_t ia32_irn_handler = { - ia32_get_irn_ops -}; +/** + * Produces the type which sits between the stack args and the locals on the stack. + * it will contain the return address and space to store the old base pointer. + * @return The Firm type modelling the ABI between type. + */ +static ir_type *get_between_type(void) +{ + static ir_type *between_type = NULL; + static entity *old_bp_ent = NULL; -const arch_irn_handler_t *ia32_get_irn_handler(const void *self) { - return &ia32_irn_handler; + if(!between_type) { + entity *ret_addr_ent; + ir_type *ret_addr_type = new_type_primitive(new_id_from_str("return_addr"), mode_P); + ir_type *old_bp_type = new_type_primitive(new_id_from_str("bp"), mode_P); + + between_type = new_type_class(new_id_from_str("ia32_between_type")); + old_bp_ent = new_entity(between_type, new_id_from_str("old_bp"), old_bp_type); + ret_addr_ent = new_entity(between_type, new_id_from_str("ret_addr"), ret_addr_type); + + set_entity_offset_bytes(old_bp_ent, 0); + set_entity_offset_bytes(ret_addr_ent, get_type_size_bytes(old_bp_type)); + set_type_size_bytes(between_type, get_type_size_bytes(old_bp_type) + get_type_size_bytes(ret_addr_type)); + } + + return between_type; } -long ia32_handle_call_proj(const void *self, ir_node *proj, int is_keep) { - ia32_isa_t *isa = (ia32_isa_t *)self; - long pn = get_Proj_proj(proj); +/** + * Get the ABI restrictions for procedure calls. + * @param self The this pointer. + * @param method_type The type of the method (procedure) in question. + * @param abi The abi object to be modified + */ +void ia32_get_call_abi(const void *self, ir_type *method_type, be_abi_call_t *abi) { + ir_type *between_type; + ir_type *tp; + ir_mode *mode; + unsigned cc = get_method_calling_convention(method_type); + int n = get_method_n_params(method_type); + int biggest_n = -1; + int stack_idx = 0; + int i, ignore; + ir_mode **modes; + const arch_register_t *reg; + be_abi_call_flags_t call_flags = { 0, 0, 1, 0, 1 }; + + /* get the between type and the frame pointer save entity */ + between_type = get_between_type(); + + /* set stack parameter passing style */ + be_abi_call_set_flags(abi, call_flags, between_type); + + /* collect the mode for each type */ + modes = alloca(n * sizeof(modes[0])); + + for (i = 0; i < n; i++) { + tp = get_method_param_type(method_type, i); + modes[i] = get_type_mode(tp); + } - if (!is_keep) { - /* It's not a Keep proj, which means, that it is a result proj. */ - /* Possible result proj numbers are 0 and 1 */ - /* Set the correct register (depends on the mode) and the */ - /* corresponding proj number */ - if (mode_is_float(get_irn_mode(proj))) { - assert(pn == 0 && "only one floating point result supported"); + /* set register parameters */ + if (cc & cc_reg_param) { + /* determine the number of parameters passed via registers */ + biggest_n = ia32_get_n_regparam_class(n, modes, &ignore, &ignore); - /* Get the proj number for the floating point result */ - pn = ia32_get_reg_projnum(&ia32_floating_point_regs[REG_XMM0], isa->reg_projnum_map); - } - else { - /* In case of 64bit return value, the result is */ - /* in EDX:EAX and we have two result projs. */ - switch (pn) { - case 0: - pn = ia32_get_reg_projnum(&ia32_floating_point_regs[REG_EAX], isa->reg_projnum_map); - break; - case 1: - pn = ia32_get_reg_projnum(&ia32_floating_point_regs[REG_EDX], isa->reg_projnum_map); - break; - default: - assert(0 && "only two int results supported"); - } + /* loop over all parameters and set the register requirements */ + for (i = 0; i <= biggest_n; i++) { + reg = ia32_get_RegParam_reg(n, modes, i, cc); + assert(reg && "kaputt"); + be_abi_call_param_reg(abi, i, reg); } - /* Set the correct proj number */ - set_Proj_proj(proj, pn); + stack_idx = i; } - else { - /* Set mode to floating point if required */ - if (!strcmp(ia32_reg_classes[CLASS_ia32_floating_point].name, - ia32_projnum_reg_req_map[pn]->req.cls->name)) { - set_irn_mode(proj, mode_F); - } + + + /* set stack parameters */ + for (i = stack_idx; i < n; i++) { + be_abi_call_param_stack(abi, i); + } + + + /* set return registers */ + n = get_method_n_ress(method_type); + + assert(n <= 2 && "more than two results not supported"); + + /* In case of 64bit returns, we will have two 32bit values */ + if (n == 2) { + tp = get_method_res_type(method_type, 0); + mode = get_type_mode(tp); + + assert(!mode_is_float(mode) && "two FP results not supported"); + + tp = get_method_res_type(method_type, 1); + mode = get_type_mode(tp); + + assert(!mode_is_float(mode) && "two FP results not supported"); + + be_abi_call_res_reg(abi, 0, &ia32_gp_regs[REG_EAX]); + be_abi_call_res_reg(abi, 1, &ia32_gp_regs[REG_EDX]); + } + else if (n == 1) { + tp = get_method_res_type(method_type, 0); + assert(is_atomic_type(tp)); + mode = get_type_mode(tp); + + be_abi_call_res_reg(abi, 0, mode_is_float(mode) ? &ia32_fp_regs[REG_XMM0] : &ia32_gp_regs[REG_EAX]); } +} + - return pn; +static const void *ia32_get_irn_ops(const arch_irn_handler_t *self, const ir_node *irn) { + return &ia32_irn_ops; +} + +const arch_irn_handler_t ia32_irn_handler = { + ia32_get_irn_ops +}; + +const arch_irn_handler_t *ia32_get_irn_handler(const void *self) { + return &ia32_irn_handler; } int ia32_to_appear_in_schedule(void *block_env, const ir_node *irn) { @@ -727,7 +570,7 @@ list_sched_selector_t ia32_sched_selector; * Returns the reg_pressure scheduler with to_appear_in_schedule() overloaded */ static const list_sched_selector_t *ia32_get_list_sched_selector(const void *self) { - memcpy(&ia32_sched_selector, reg_pressure_selector, sizeof(list_sched_selector_t)); + memcpy(&ia32_sched_selector, trivial_selector, sizeof(list_sched_selector_t)); ia32_sched_selector.to_appear_in_schedule = ia32_to_appear_in_schedule; return &ia32_sched_selector; } @@ -746,8 +589,9 @@ const arch_isa_if_t ia32_isa_if = { ia32_done, ia32_get_n_reg_class, ia32_get_reg_class, + ia32_get_reg_class_for_mode, + ia32_get_call_abi, ia32_get_irn_handler, ia32_get_code_generator_if, - ia32_get_list_sched_selector, - ia32_handle_call_proj + ia32_get_list_sched_selector };