X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fia32%2Fbearch_ia32.c;h=765cfdb42bdd58c6f3bb052065be2d8d1642a6d5;hb=8057f671ea7f286a27e40bfe1aa45d85e0990cbe;hp=8e1649426e69c7e3bd577adb8c9519a96e4445eb;hpb=5609f2c7223b8482d8c2d9d79163608e6eec7cc0;p=libfirm diff --git a/ir/be/ia32/bearch_ia32.c b/ir/be/ia32/bearch_ia32.c index 8e1649426..765cfdb42 100644 --- a/ir/be/ia32/bearch_ia32.c +++ b/ir/be/ia32/bearch_ia32.c @@ -38,7 +38,6 @@ #include "irflag.h" #include "irgmod.h" #include "irgopt.h" -#include "irbitset.h" #include "irgopt.h" #include "irdump.h" #include "pdeq.h" @@ -63,7 +62,6 @@ #include "be.h" #include "be_t.h" #include "beirgmod.h" -#include "be_dbgout.h" #include "beblocksched.h" #include "bespillutil.h" #include "bespillslots.h" @@ -191,14 +189,6 @@ static ir_node *ia32_get_admissible_noreg(ir_node *irn, int pos) } } -/** - * The IA32 ABI callback object. - */ -typedef struct { - be_abi_call_flags_bits_t flags; /**< The call flags. */ - ir_graph *irg; /**< The associated graph. */ -} ia32_abi_env_t; - static ir_entity *ia32_get_frame_entity(const ir_node *irn) { return is_ia32_irn(irn) ? get_ia32_frame_ent(irn) : NULL; @@ -254,7 +244,7 @@ static int ia32_get_sp_bias(const ir_node *node) static void ia32_build_between_type(void) { #define IDENT(s) new_id_from_chars(s, sizeof(s)-1) - if (! between_type) { + if (between_type == NULL) { ir_type *old_bp_type = new_type_primitive(mode_Iu); ir_type *ret_addr_type = new_type_primitive(mode_Iu); @@ -673,7 +663,7 @@ static void ia32_prepare_graph(ir_graph *irg) /* do local optimizations (mainly CSE) */ optimize_graph_df(irg); /* backend code expects that outedges are always enabled */ - edges_assure(irg); + assure_edges(irg); if (irg_data->dump) dump_ir_graph(irg, "transformed"); @@ -684,7 +674,7 @@ static void ia32_prepare_graph(ir_graph *irg) /* do code placement, to optimize the position of constants */ place_code(irg); /* backend code expects that outedges are always enabled */ - edges_assure(irg); + assure_edges(irg); if (irg_data->dump) dump_ir_graph(irg, "place"); @@ -734,7 +724,6 @@ ir_node *ia32_turn_back_am(ir_node *node) /* rewire mem-proj */ if (get_irn_mode(node) == mode_T) { - const ir_edge_t *edge; foreach_out_edge(node, edge) { ir_node *out = get_edge_src_irn(edge); if (get_irn_mode(out) == mode_M) { @@ -981,16 +970,14 @@ static ir_node* create_spproj(ir_node *node, ir_node *pred, int pos) */ static void transform_MemPerm(ir_node *node) { - ir_node *block = get_nodes_block(node); - ir_graph *irg = get_irn_irg(node); - ir_node *sp = be_get_initial_reg_value(irg, &ia32_registers[REG_ESP]); - int arity = be_get_MemPerm_entity_arity(node); - ir_node **pops = ALLOCAN(ir_node*, arity); - ir_node *in[1]; - ir_node *keep; - int i; - const ir_edge_t *edge; - const ir_edge_t *next; + ir_node *block = get_nodes_block(node); + ir_graph *irg = get_irn_irg(node); + ir_node *sp = be_get_initial_reg_value(irg, &ia32_registers[REG_ESP]); + int arity = be_get_MemPerm_entity_arity(node); + ir_node **pops = ALLOCAN(ir_node*, arity); + ir_node *in[1]; + ir_node *keep; + int i; /* create Pushs */ for (i = 0; i < arity; ++i) { @@ -1051,7 +1038,7 @@ static void transform_MemPerm(ir_node *node) sched_add_before(node, keep); /* exchange memprojs */ - foreach_out_edge_safe(node, edge, next) { + foreach_out_edge_safe(node, edge) { ir_node *proj = get_edge_src_irn(edge); int p = get_Proj_proj(proj); @@ -1187,7 +1174,7 @@ static void introduce_epilog(ir_node *ret) ir_node *block = get_nodes_block(ret); ir_node *first_sp = get_irn_n(ret, n_be_Return_sp); ir_node *curr_sp = first_sp; - ir_mode *mode_gp = mode_Iu; + ir_mode *mode_gp = ia32_reg_classes[CLASS_ia32_gp].mode; if (!layout->sp_relative) { int n_ebp = determine_ebp_input(ret); @@ -1258,7 +1245,6 @@ static void introduce_prolog_epilog(ir_graph *irg) ir_node *incsp; curr_sp = new_r_Proj(push, mode_gp, pn_ia32_Push_stack); - mem = new_r_Proj(push, mode_M, pn_ia32_Push_M); arch_set_irn_register(curr_sp, sp); sched_add_after(start, push); @@ -1311,7 +1297,7 @@ static void introduce_prolog_epilog(ir_graph *irg) * virtual with real x87 instructions, creating a block schedule and peephole * optimisations. */ -static void ia32_finish(ir_graph *irg) +static void ia32_finish_graph(ir_graph *irg) { ia32_irg_data_t *irg_data = ia32_get_irg_data(irg); be_stack_layout_t *stack_layout = be_get_irg_stack_layout(irg); @@ -1388,11 +1374,11 @@ static void ia32_init_graph(ir_graph *irg) struct obstack *obst = be_get_be_obst(irg); ia32_irg_data_t *irg_data = OALLOCZ(obst, ia32_irg_data_t); - irg_data->dump = (be_get_irg_options(irg)->dump_flags & DUMP_BE) ? 1 : 0; + irg_data->dump = (be_options.dump_flags & DUMP_BE) ? 1 : 0; if (gprof) { /* Linux gprof implementation needs base pointer */ - be_get_irg_options(irg)->omit_fp = 0; + be_options.omit_fp = 0; } be_birg_from_irg(irg)->isa_link = irg_data; @@ -1411,8 +1397,8 @@ static void set_tarval_output_modes(void) { size_t i; - for (i = get_irp_n_modes(); i > 0;) { - ir_mode *mode = get_irp_mode(--i); + for (i = ir_get_n_modes(); i > 0;) { + ir_mode *mode = ir_get_mode(--i); if (mode_is_int(mode)) set_tarval_mode_output_option(mode, &mo_integer); @@ -1689,7 +1675,6 @@ static ir_node *ia32_create_trampoline_fkt(ir_node *block, ir_node *mem, ir_node p = new_r_Add(block, p, one, mode); st = new_r_Store(block, mem, p, callee, cons_none); mem = new_r_Proj(st, mode_M, pn_Store_M); - p = new_r_Add(block, p, four, mode); return mem; } @@ -1728,19 +1713,15 @@ static backend_params ia32_backend_params = { */ static void ia32_init(void) { - ir_mode *mode_long_long; - ir_mode *mode_unsigned_long_long; - ir_type *type_long_long; - ir_type *type_unsigned_long_long; + ir_mode *mode_long_long; + ir_mode *mode_unsigned_long_long; + ir_type *type_long_long; + ir_type *type_unsigned_long_long; ia32_setup_cg_config(); init_asm_constraints(); - set_tarval_output_modes(); - ia32_register_init(); - ia32_create_opcodes(&ia32_irn_ops); - ia32_mode_fpcw = new_int_mode("Fpcw", irma_twos_complement, 16, 0, 0); /* note mantissa is 64bit but with explicitely encoded 1 so the really @@ -1748,7 +1729,7 @@ static void ia32_init(void) ia32_mode_E = new_float_mode("E", irma_x86_extended_float, 15, 63); ia32_type_E = new_type_primitive(ia32_mode_E); set_type_size_bytes(ia32_type_E, 12); - set_type_alignment_bytes(ia32_type_E, 16); + set_type_alignment_bytes(ia32_type_E, 4); mode_long_long = new_int_mode("long long", irma_twos_complement, 64, 1, 64); type_long_long = new_type_primitive(mode_long_long); @@ -1766,6 +1747,20 @@ static void ia32_init(void) ia32_backend_params.mode_float_arithmetic = ia32_mode_E; ia32_backend_params.type_long_double = ia32_type_E; } + + ia32_register_init(); + obstack_init(&opcodes_obst); + ia32_create_opcodes(&ia32_irn_ops); +} + +static void ia32_finish(void) +{ + if (between_type != NULL) { + free_type(between_type); + between_type = NULL; + } + ia32_free_opcodes(); + obstack_free(&opcodes_obst, NULL); } /** @@ -1797,6 +1792,8 @@ static arch_env_t *ia32_begin_codegeneration(const be_main_env_t *env) { ia32_isa_t *isa = XMALLOC(ia32_isa_t); + set_tarval_output_modes(); + *isa = ia32_isa_template; isa->tv_ent = pmap_create(); @@ -1918,10 +1915,8 @@ static void ia32_get_call_abi(ir_type *method_type, be_abi_call_t *abi) be_abi_call_flags_t call_flags = be_abi_call_get_flags(abi); /* set abi flags for calls */ - call_flags.bits.store_args_sequential = 0; /* call_flags.bits.try_omit_fp not changed: can handle both settings */ - call_flags.bits.fp_free = 0; /* the frame pointer is fixed in IA32 */ - call_flags.bits.call_has_imm = 0; /* No call immediate, we handle this by ourselves */ + call_flags.bits.call_has_imm = false; /* No call immediate, we handle this by ourselves */ /* set parameter passing style */ be_abi_call_set_flags(abi, call_flags, &ia32_abi_callbacks); @@ -2032,6 +2027,7 @@ static int ia32_is_valid_clobber(const char *clobber) static void ia32_lower_for_target(void) { + ir_mode *mode_gp = ia32_reg_classes[CLASS_ia32_gp].mode; size_t i, n_irgs = get_irp_n_irgs(); /* perform doubleword lowering */ @@ -2042,8 +2038,6 @@ static void ia32_lower_for_target(void) &intrinsic_env, }; - ia32_create_opcodes(&ia32_irn_ops); - /* lower compound param handling * Note: we lower compound arguments ourself, since on ia32 we don't * have hidden parameters but know where to find the structs on the stack. @@ -2058,6 +2052,12 @@ static void ia32_lower_for_target(void) lower_floating_point(); } + for (i = 0; i < n_irgs; ++i) { + ir_graph *irg = get_irp_irg(i); + /* break up switches with wide ranges */ + lower_switch(irg, 4, 256, mode_gp); + } + ir_prepare_dw_lowering(&lower_dw_params); ir_lower_dw_ops(); @@ -2065,8 +2065,6 @@ static void ia32_lower_for_target(void) ir_graph *irg = get_irp_irg(i); /* lower for mode_b stuff */ ir_lower_mode_b(irg, mode_Iu); - /* break up switches with wide ranges */ - lower_switch(irg, 4, 256, false); } for (i = 0; i < n_irgs; ++i) { @@ -2163,6 +2161,7 @@ static const lc_opt_table_entry_t ia32_options[] = { const arch_isa_if_t ia32_isa_if = { ia32_init, + ia32_finish, ia32_get_libfirm_params, ia32_lower_for_target, ia32_parse_asm_constraint, @@ -2182,7 +2181,7 @@ const arch_isa_if_t ia32_isa_if = { ia32_before_abi, /* before abi introduce hook */ ia32_prepare_graph, ia32_before_ra, /* before register allocation hook */ - ia32_finish, /* called before codegen */ + ia32_finish_graph, /* called before codegen */ ia32_emit, /* emit && done */ };