X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fia32%2Fbearch_ia32.c;h=3b9c06f61a8ed14007f315bfa4a5dba6ff8cd304;hb=07f42691eb2d024ccd3fdf83864ac869401e5111;hp=9d132c1448bc4fbf84071f9d221d3af732fbe3e9;hpb=2fa18a497e12453d13e50b640156c453c05ad9e7;p=libfirm diff --git a/ir/be/ia32/bearch_ia32.c b/ir/be/ia32/bearch_ia32.c index 9d132c144..3b9c06f61 100644 --- a/ir/be/ia32/bearch_ia32.c +++ b/ir/be/ia32/bearch_ia32.c @@ -39,11 +39,11 @@ #include "irprintf.h" #include "iredges_t.h" #include "ircons.h" +#include "irflag.h" #include "irgmod.h" #include "irgopt.h" #include "irbitset.h" #include "irgopt.h" -#include "irdump_grgen.h" #include "pdeq.h" #include "pset.h" #include "debug.h" @@ -933,7 +933,7 @@ static void ia32_before_abi(void *self) { static void ia32_prepare_graph(void *self) { ia32_code_gen_t *cg = self; - /* do local optimisations */ + /* do local optimizations */ optimize_graph_df(cg->irg); /* TODO: we often have dead code reachable through out-edges here. So for @@ -948,17 +948,22 @@ static void ia32_prepare_graph(void *self) { be_dump(cg->irg, "-pre_transform", dump_ir_block_graph_sched); #ifdef FIRM_GRGEN_BE + // disable CSE, because of two-step node-construction + set_opt_cse(0); + /* transform nodes into assembler instructions by PBQP magic */ ia32_transform_graph_by_pbqp(cg); -#endif if (cg->dump) be_dump(cg->irg, "-after_pbqp_transform", dump_ir_block_graph_sched); + set_opt_cse(1); +#else /* transform remaining nodes into assembler instructions */ ia32_transform_graph(cg); +#endif - /* do local optimisations (mainly CSE) */ + /* do local optimizations (mainly CSE) */ optimize_graph_df(cg->irg); if (cg->dump) @@ -1629,7 +1634,7 @@ static ia32_isa_t ia32_isa_template = { &ia32_gp_regs[REG_ESP], /* stack pointer register */ &ia32_gp_regs[REG_EBP], /* base pointer register */ -1, /* stack direction */ - 16, /* stack alignment */ + 4, /* power of two stack alignment, 2^4 == 16 */ NULL, /* main environment */ 7, /* costs for a spill instruction */ 5, /* costs for a reload instruction */ @@ -2047,7 +2052,7 @@ static int ia32_is_psi_allowed(ir_node *sel, ir_node *phi_list, int i, int j) ir_node *cr = get_Cmp_right(cmp); /* check the Phi nodes: no 64bit and no floating point cmov */ - for (phi = phi_list; phi; phi = get_irn_link(phi)) { + for (phi = phi_list; phi; phi = get_Phi_next(phi)) { ir_mode *mode = get_irn_mode(phi); if (mode_is_float(mode)) { @@ -2074,7 +2079,7 @@ static int ia32_is_psi_allowed(ir_node *sel, ir_node *phi_list, int i, int j) } } else { /* check the Phi nodes: no 64bit and no floating point cmov */ - for (phi = phi_list; phi; phi = get_irn_link(phi)) { + for (phi = phi_list; phi; phi = get_Phi_next(phi)) { ir_mode *mode = get_irn_mode(phi); if (mode_is_float(mode) || get_mode_size_bits(mode) > 32) @@ -2096,7 +2101,7 @@ static int ia32_is_psi_allowed(ir_node *sel, ir_node *phi_list, int i, int j) cl = get_Cmp_left(cmp); cr = get_Cmp_right(cmp); - for (phi = phi_list; phi; phi = get_irn_link(phi)) { + for (phi = phi_list; phi; phi = get_Phi_next(phi)) { ir_mode *mode = get_irn_mode(phi); int res = 0; ir_node *t, *f; @@ -2173,11 +2178,13 @@ static const backend_params *ia32_get_libfirm_params(void) { static backend_params p = { 1, /* need dword lowering */ 1, /* support inline assembly */ + 0, /* no immediate floating point mode. */ NULL, /* no additional opcodes */ NULL, /* will be set later */ ia32_create_intrinsic_fkt, &intrinsic_env, /* context for ia32_create_intrinsic_fkt */ NULL, /* will be set below */ + NULL /* will be set below */ }; ia32_setup_cg_config(); @@ -2201,7 +2208,7 @@ static lc_opt_enum_int_var_t gas_var = { static const lc_opt_table_entry_t ia32_options[] = { LC_OPT_ENT_ENUM_INT("gasmode", "set the GAS compatibility mode", &gas_var), - LC_OPT_ENT_INT("stackalign", "set stack alignment for calls", + LC_OPT_ENT_INT("stackalign", "set power of two stack alignment for calls", &ia32_isa_template.arch_env.stack_alignment), LC_OPT_LAST };