X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fia32%2Fbearch_ia32.c;h=22ef49febb05b183dd2a15b4dc4db994786ec166;hb=a572558d607409b14973f6756caec1e73e71a7da;hp=7ebba06d4166d5644a0ba7456d71afb05f5a0580;hpb=d55ba6b00d7848a06ecfeceefe071b17bf0e5e98;p=libfirm diff --git a/ir/be/ia32/bearch_ia32.c b/ir/be/ia32/bearch_ia32.c index 7ebba06d4..22ef49feb 100644 --- a/ir/be/ia32/bearch_ia32.c +++ b/ir/be/ia32/bearch_ia32.c @@ -256,14 +256,63 @@ static void ia32_abi_dont_save_regs(void *self, pset *s) pset_insert_ptr(s, env->isa->bp); } -static const arch_register_t *ia32_abi_prologue(void *self, pmap *reg_map) +static const arch_register_t *ia32_abi_prologue(void *self, ir_node **mem, pmap *reg_map) { - ia32_abi_env_t *env = self; - return env->isa->bp; + ia32_abi_env_t *env = self; + const arch_register_t *frame_reg = env->isa->sp; + + if(!env->flags.try_omit_fp) { + int reg_size = get_mode_size_bytes(env->isa->bp->reg_class->mode); + ir_node *bl = get_irg_start_block(env->irg); + ir_node *curr_sp = be_abi_reg_map_get(reg_map, env->isa->sp); + ir_node *curr_bp = be_abi_reg_map_get(reg_map, env->isa->bp); + ir_node *curr_no_reg = be_abi_reg_map_get(reg_map, &ia32_gp_regs[REG_XXX]); + ir_node *store_bp; + + curr_sp = be_new_IncSP(env->isa->sp, env->irg, bl, curr_sp, *mem, reg_size, be_stack_dir_along); + store_bp = new_rd_ia32_Store(NULL, env->irg, bl, curr_sp, curr_no_reg, curr_bp, *mem, mode_T); + set_ia32_am_support(store_bp, ia32_am_Dest); + set_ia32_am_flavour(store_bp, ia32_B); + set_ia32_op_type(store_bp, ia32_AddrModeD); + *mem = new_r_Proj(env->irg, bl, store_bp, mode_M, 0); + curr_bp = be_new_Copy(env->isa->bp->reg_class, env->irg, bl, curr_sp); + be_set_constr_single_reg(curr_bp, BE_OUT_POS(0), env->isa->bp); + be_node_set_flags(curr_bp, BE_OUT_POS(0), arch_irn_flags_ignore); + + be_abi_reg_map_set(reg_map, env->isa->sp, curr_sp); + be_abi_reg_map_set(reg_map, env->isa->bp, curr_bp); + } + + return frame_reg; } static void ia32_abi_epilogue(void *self, ir_node *bl, ir_node **mem, pmap *reg_map) { + ia32_abi_env_t *env = self; + ir_node *curr_sp = be_abi_reg_map_get(reg_map, env->isa->sp); + ir_node *curr_bp = be_abi_reg_map_get(reg_map, env->isa->bp); + ir_node *curr_no_reg = be_abi_reg_map_get(reg_map, &ia32_gp_regs[REG_XXX]); + + if(env->flags.try_omit_fp) { + curr_sp = be_new_IncSP(env->isa->sp, env->irg, bl, curr_sp, *mem, BE_STACK_FRAME_SIZE, be_stack_dir_against); + } + + else { + ir_node *load_bp; + ir_mode *mode_bp = env->isa->bp->reg_class->mode; + + curr_sp = be_new_SetSP(env->isa->sp, env->irg, bl, curr_sp, curr_bp, *mem); + load_bp = new_rd_ia32_Load(NULL, env->irg, bl, curr_sp, curr_no_reg, *mem, mode_T); + set_ia32_am_support(load_bp, ia32_am_Source); + set_ia32_am_flavour(load_bp, ia32_B); + set_ia32_op_type(load_bp, ia32_AddrModeS); + set_ia32_ls_mode(load_bp, mode_bp); + curr_bp = new_r_Proj(env->irg, bl, load_bp, mode_bp, 0); + *mem = new_r_Proj(env->irg, bl, load_bp, mode_M, 1); + } + + be_abi_reg_map_set(reg_map, env->isa->sp, curr_sp); + be_abi_reg_map_set(reg_map, env->isa->bp, curr_bp); } /** @@ -513,6 +562,9 @@ static void transform_to_Store(ia32_transform_env_t *env) { if (mode_is_float(mode)) { new_op = new_rd_ia32_fStore(env->dbg, env->irg, env->block, ptr, noreg, val, nomem, mode_T); } + else if (get_mode_size_bits(mode) == 8) { + new_op = new_rd_ia32_Store8Bit(env->dbg, env->irg, env->block, ptr, noreg, val, nomem, mode_T); + } else { new_op = new_rd_ia32_Store(env->dbg, env->irg, env->block, ptr, noreg, val, nomem, mode_T); } @@ -775,7 +827,7 @@ void ia32_get_call_abi(const void *self, ir_type *method_type, be_abi_call_t *ab int n = get_method_n_params(method_type); int biggest_n = -1; int stack_idx = 0; - int i, ignore; + int i, ignore_1, ignore_2; ir_mode **modes; const arch_register_t *reg; be_abi_call_flags_t call_flags; @@ -801,7 +853,7 @@ void ia32_get_call_abi(const void *self, ir_type *method_type, be_abi_call_t *ab /* set register parameters */ if (cc & cc_reg_param) { /* determine the number of parameters passed via registers */ - biggest_n = ia32_get_n_regparam_class(n, modes, &ignore, &ignore); + biggest_n = ia32_get_n_regparam_class(n, modes, &ignore_1, &ignore_2); /* loop over all parameters and set the register requirements */ for (i = 0; i <= biggest_n; i++) { @@ -879,7 +931,7 @@ list_sched_selector_t ia32_sched_selector; * Returns the reg_pressure scheduler with to_appear_in_schedule() overloaded */ static const list_sched_selector_t *ia32_get_list_sched_selector(const void *self) { - memcpy(&ia32_sched_selector, trivial_selector, sizeof(list_sched_selector_t)); + memcpy(&ia32_sched_selector, reg_pressure_selector, sizeof(list_sched_selector_t)); ia32_sched_selector.to_appear_in_schedule = ia32_to_appear_in_schedule; return &ia32_sched_selector; }