X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fbeverify.h;h=adcbe7e835b3678486f32b98fb8296d7c5e9db7b;hb=79268f7122ba8f5820658967157b3a9c78ea492a;hp=b1668c2a8b8b80b91423357966f2b87615415268;hpb=09af833b4aa9efe8de16ed08d0005b01cd0ed69c;p=libfirm diff --git a/ir/be/beverify.h b/ir/be/beverify.h index b1668c2a8..adcbe7e83 100644 --- a/ir/be/beverify.h +++ b/ir/be/beverify.h @@ -1,5 +1,5 @@ /* - * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved. + * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved. * * This file is part of libFirm. * @@ -22,34 +22,34 @@ * @brief Various verify routines that check a scheduled graph for correctness. * @author Matthias Braun * @date 05.05.2006 - * @version $Id$ */ #ifndef FIRM_BE_BEVERIFY_H #define FIRM_BE_BEVERIFY_H +#include #include "irgraph.h" #include "beirg.h" #include "bearch.h" /** - * Verifies, that the register pressure for a given register class doesn't exceed the limit - * of available registers. + * Verifies, that the register pressure for a given register class doesn't + * exceed the limit of available registers. * - * @param birg The backend IRG. - * @param cls The register class to check. * @param irg The irg to check. - * @return 1 if the pressure is valid, 0 otherwise. + * @param cls The register class to check. + * @return 1 if the pressure is valid, 0 otherwise. */ -int be_verify_register_pressure(const be_irg_t *birg, const arch_register_class_t* cls, ir_graph *irg); +int be_verify_register_pressure(ir_graph *irg, + const arch_register_class_t* cls); /** * Does some sanity checks on the schedule. * - * @param irg The irg to check - * @return 1 if the schedule is valid, 0 otherwise + * @param irg The irg to check + * @return 1 if the schedule is valid, 0 otherwise */ -int be_verify_schedule(const be_irg_t *birg); +int be_verify_schedule(ir_graph *irg); /** * Verify spillslots @@ -57,24 +57,28 @@ int be_verify_schedule(const be_irg_t *birg); * @param irg The irg to check * @return 1 if spillslots are valid, 0 otherwise */ -int be_verify_spillslots(const arch_env_t *arch_env, ir_graph *irg); +int be_verify_spillslots(ir_graph *irg); /** * Verify register allocation: Checks that no 2 live nodes have the same * register assigned, also checks that each scheduled node has a register * assigned. * - * @param birg The birg to check - * @return 1 if verify succeeded, 0 otherwise + * @param irg The graph to check + * @return true if verify succeeded, false otherwise */ -int be_verify_register_allocation(const be_irg_t *birg); +bool be_verify_register_allocation(ir_graph *irg); /** - * Verify that out edges are valid - * - * @param irg The irg to check - * @param 1 if verify succeeded, 0 otherwise + * Check, if the SSA dominance property is fulfilled. + * @param irg The graph. + * @return true if dominance property is fulfilled, false otherwise + */ +bool be_check_dominance(ir_graph *irg); + +/** + * Check the given liveness information against a freshly computed one. */ -int be_verify_out_edges(ir_graph *irg); +void be_liveness_check(be_lv_t *lv); -#endif /* FIRM_BE_BEVERIFY_H */ +#endif