X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fbeverify.c;h=a55114ade2ad7351803b17efdfa07f09390574a6;hb=dbff21416969526aed95b103d3652cca3dcec08c;hp=f01d9aeae5d6f5915dbf254d1048a9123a088072;hpb=ce6161a7e42a48f7422b7babcc64d8ace18e2687;p=libfirm

diff --git a/ir/be/beverify.c b/ir/be/beverify.c
index f01d9aeae..a55114ade 100644
--- a/ir/be/beverify.c
+++ b/ir/be/beverify.c
@@ -45,6 +45,7 @@
 #include "benode.h"
 #include "beirg.h"
 #include "beintlive_t.h"
+#include "belistsched.h"
 
 static int my_values_interfere(const ir_node *a, const ir_node *b);
 
@@ -155,18 +156,16 @@ static void verify_schedule_walker(ir_node *block, void *data)
 {
 	be_verify_schedule_env_t *env = (be_verify_schedule_env_t*) data;
 	ir_node *node;
-	ir_node *non_phi_found = NULL;
-	int cfchange_found = 0;
-	/* TODO ask arch about delay branches */
-	int delay_branches = 0;
+	ir_node *non_phi_found  = NULL;
+	ir_node *cfchange_found = NULL;
 	int last_timestep = INT_MIN;
 
 	/*
 	 * Tests for the following things:
-	 *   1. Make sure that all phi nodes are scheduled at the beginning of the block
-	 *   2. There is 1 or no control flow changing node scheduled and exactly delay_branches operations after it.
-	 *   3. No value is defined after it has been used
-	 *   4. mode_T nodes have all projs scheduled behind them followed by Keeps
+	 *   1. Make sure that all phi nodes are scheduled at the beginning of the
+	 *      block
+	 *   2. No value is defined after it has been used
+	 *   3. mode_T nodes have all projs scheduled behind them followed by Keeps
 	 *       (except mode_X projs)
 	 */
 	sched_foreach(block, node) {
@@ -207,31 +206,27 @@ static void verify_schedule_walker(ir_node *block, void *data)
 		}
 
 		/* Check for control flow changing nodes */
-		if (is_cfop(node) && get_irn_opcode(node) != iro_Start) {
+		if (is_cfop(node)) {
 			/* check, that only one CF operation is scheduled */
-			if (cfchange_found == 1) {
-				ir_fprintf(stderr, "Verify Warning: More than 1 control flow changing node (%+F) scheduled in block %+F (%s)\n",
-					node, block, get_irg_dump_name(env->irg));
+			if (cfchange_found != NULL) {
+				ir_fprintf(stderr, "Verify Warning: Additional control flow changing node %+F scheduled after %+F in block %+F (%s)\n",
+					node, block, cfchange_found, get_irg_dump_name(env->irg));
 				env->problem_found = 1;
+			} else {
+				cfchange_found = node;
 			}
-			cfchange_found = 1;
-		} else if (cfchange_found) {
+		} else if (cfchange_found != NULL) {
 			/* proj and keepany aren't real instructions... */
 			if (!is_Proj(node) && !be_is_Keep(node)) {
-				/* check for delay branches */
-				if (delay_branches == 0) {
-					ir_fprintf(stderr, "Verify Warning: Node %+F scheduled after control flow changing node (+delay branches) in block %+F (%s)\n",
-						node, block, get_irg_dump_name(env->irg));
-					env->problem_found = 1;
-				} else {
-					delay_branches--;
-				}
+				ir_fprintf(stderr, "Verify Warning: Node %+F scheduled after control flow changing node in block %+F (%s)\n",
+				           node, block, get_irg_dump_name(env->irg));
+				env->problem_found = 1;
 			}
 		}
 
 		/* Check that all uses come before their definitions */
 		if (!is_Phi(node)) {
-			int nodetime = sched_get_time_step(node);
+			sched_timestep_t nodetime = sched_get_time_step(node);
 			for (i = 0, arity = get_irn_arity(node); i < arity; ++i) {
 				ir_node *arg = get_irn_n(node, i);
 				if (get_nodes_block(arg) != block
@@ -254,40 +249,40 @@ static void verify_schedule_walker(ir_node *block, void *data)
 		}
 
 		if (be_is_Keep(node) || be_is_CopyKeep(node)) {
-			/* at least 1 of the keep arguments has to be it schedule
+			/* at least 1 of the keep arguments has to be its schedule
 			 * predecessor */
 			int      arity   = get_irn_arity(node);
-			int      problem = 1;
+			bool     found   = false;
 			ir_node *prev    = sched_prev(node);
 			while (be_is_Keep(prev) || be_is_CopyKeep(prev))
 				prev = sched_prev(prev);
 
-			for (i = 0; i < arity; ++i) {
-				ir_node *in = get_irn_n(node, i);
-				in = skip_Proj(in);
-				if (in == prev)
-					problem = 0;
+			while (true) {
+				for (i = 0; i < arity; ++i) {
+					ir_node *in = get_irn_n(node, i);
+					in = skip_Proj(in);
+					if (in == prev)
+						found = true;
+				}
+				if (found)
+					break;
+				prev = sched_prev(prev);
+				if (!is_Phi(prev))
+					break;
 			}
-			if (problem) {
+			if (!found) {
 				ir_fprintf(stderr, "%+F not scheduled after its pred node in block %+F (%s)\n",
 				           node, block, get_irg_dump_name(env->irg));
 				env->problem_found = 1;
 			}
 		}
 	}
-
-	/* check that all delay branches are filled (at least with NOPs) */
-	if (cfchange_found && delay_branches != 0) {
-		ir_fprintf(stderr, "Verify warning: Not all delay slots filled after jump (%d/%d) in block %+F (%s)\n",
-			block, get_irg_dump_name(env->irg));
-		env->problem_found = 1;
-	}
 }
 
 static void check_schedule(ir_node *node, void *data)
 {
 	be_verify_schedule_env_t *env = (be_verify_schedule_env_t*)data;
-	bool should_be = to_appear_in_schedule(node);
+	bool should_be = !is_Proj(node) && !(arch_irn_get_flags(node) & arch_irn_flags_not_scheduled);
 	bool scheduled = bitset_is_set(env->scheduled, get_irn_idx(node));
 
 	if (should_be != scheduled) {
@@ -673,7 +668,7 @@ static void check_output_constraints(ir_node *node)
 			ir_fprintf(stderr, "Verify warning: Node %+F in block %+F(%s) should have a register assigned\n",
 					node, get_nodes_block(node), get_irg_dump_name(irg));
 			problem_found = 1;
-		} else if (!arch_register_type_is(reg, joker) && !arch_reg_out_is_allocatable(node, reg)) {
+		} else if (!(reg->type & arch_register_type_joker) && !arch_reg_out_is_allocatable(node, reg)) {
 			ir_fprintf(stderr, "Verify warning: Register %s assigned as output of %+F not allowed (register constraint) in block %+F(%s)\n",
 					reg->name, node, get_nodes_block(node), get_irg_dump_name(irg));
 			problem_found = 1;
@@ -722,7 +717,7 @@ static void check_input_constraints(ir_node *node)
 			           pred, get_nodes_block(pred), get_irg_dump_name(irg), node);
 			problem_found = 1;
 			continue;
-		} else if (!arch_register_type_is(reg, joker) && ! arch_reg_is_allocatable(node, i, reg)) {
+		} else if (!(reg->type & arch_register_type_joker) && ! arch_reg_is_allocatable(node, i, reg)) {
 			ir_fprintf(stderr, "Verify warning: Register %s as input %d of %+F not allowed (register constraint) in block %+F(%s)\n",
 			           reg->name, i, node, get_nodes_block(node), get_irg_dump_name(irg));
 			problem_found = 1;
@@ -741,7 +736,7 @@ static void check_input_constraints(ir_node *node)
 			ir_node               *pred     = get_Phi_pred(node, i);
 			const arch_register_t *pred_reg = arch_get_irn_register(pred);
 
-			if (reg != pred_reg && !arch_register_type_is(pred_reg, joker)) {
+			if (reg != pred_reg && !(pred_reg->type & arch_register_type_joker)) {
 				const char *pred_name = pred_reg != NULL ? pred_reg->name : "(null)";
 				const char *reg_name  = reg != NULL ? reg->name : "(null)";
 				ir_fprintf(stderr, "Verify warning: Input %d of %+F in block %+F(%s) uses register %s instead of %s\n",