X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fbelower.c;h=43099660fcb57de7a05ff099e0c6b549dfe5e045;hb=4a4a64bc6a7bec26b2870746a2873a16579bf413;hp=872bd37d0f4f2137c1f6b981744a2cfec9ce1e32;hpb=78680bc76e5e6d7c8a63390fefdf085b342d1b6d;p=libfirm

diff --git a/ir/be/belower.c b/ir/be/belower.c
index 872bd37d0..43099660f 100644
--- a/ir/be/belower.c
+++ b/ir/be/belower.c
@@ -620,7 +620,8 @@ static void gen_assure_different_pattern(ir_node *irn, ir_node *other_different,
  */
 static void assure_different_constraints(ir_node *irn, constraint_env_t *env) {
 	const arch_register_req_t *req;
-	const arch_env_t          *arch_env = be_get_birg_arch_env(env->birg);
+	const arch_env_t          *arch_env    = be_get_birg_arch_env(env->birg);
+	ir_node                   *skipped_irn = belower_skip_proj(irn);
 
 	req = arch_get_register_req(arch_env, irn, -1);
 
@@ -639,14 +640,14 @@ static void assure_different_constraints(ir_node *irn, constraint_env_t *env) {
 				 * We can safely ignore a should_be_same x must_be_different y
 				 * IFF both inputs are equal!
 				 */
-				if (get_irn_n(irn, idx_other) == get_irn_n(irn, idx_same)) {
+				if (get_irn_n(skipped_irn, idx_other) == get_irn_n(skipped_irn, idx_same)) {
 					return;
 				}
 			}
 		}
 		for (i = 0; 1U << i <= other; ++i) {
 			if (other & (1U << i)) {
-				ir_node *different_from = get_irn_n(belower_skip_proj(irn), i);
+				ir_node *different_from = get_irn_n(skipped_irn, i);
 				gen_assure_different_pattern(irn, different_from, env);
 			}
 		}
@@ -800,8 +801,6 @@ void assure_constraints(be_irg_t *birg) {
 	ir_node          **nodes;
 	FIRM_DBG_REGISTER(firm_dbg_module_t *mod, "firm.be.lower.constr");
 
-	be_assure_dom_front(birg);
-
 	DEBUG_ONLY(cenv.dbg = mod;)
 	cenv.birg   = birg;
 	cenv.op_set = new_pset(cmp_op_copy_assoc, 16);
@@ -894,35 +893,36 @@ static int push_through_perm(ir_node *perm, void *data)
 	bitset_t *moved   = bitset_alloca(arity);
 	int n_moved;
 	int new_size;
-	ir_node *frontier = sched_first(bl);
+	ir_node *frontier = bl;
 	FIRM_DBG_REGISTER(firm_dbg_module_t *mod, "firm.be.lower.permmove");
 
 	int i, n;
 	const ir_edge_t *edge;
-	ir_node *last_proj = NULL, *irn;
+	ir_node *one_proj = NULL, *irn;
 	const arch_register_class_t *cls = NULL;
 
 	DBG((mod, LEVEL_1, "perm move %+F irg %+F\n", perm, irg));
 
-	/* get some proj and find out the register class of the proj. */
-	foreach_out_edge (perm, edge) {
-		last_proj  = get_edge_src_irn(edge);
-		cls = arch_get_irn_reg_class(aenv, last_proj, -1);
-		assert(is_Proj(last_proj));
-		break;
-	}
+	/* get some Proj and find out the register class of that Proj. */
+	edge     = get_irn_out_edge_first_kind(perm, EDGE_KIND_NORMAL);
+	one_proj = get_edge_src_irn(edge);
+	assert(is_Proj(one_proj));
+	cls      = arch_get_irn_reg_class(aenv, one_proj, -1);
 
-	/* find the point in the schedule after which the
+	/* Find the point in the schedule after which the
 	 * potentially movable nodes must be defined.
-	 * A perm will only be pushed up to first instruction
-	 * which lets an operand of itself die.  */
-
+	 * A Perm will only be pushed up to first instruction
+	 * which lets an operand of itself die.
+	 * If we would allow to move the Perm above this instruction,
+	 * the former dead operand would be live now at the point of
+	 * the Perm, increasing the register pressure by one.
+	 */
 	sched_foreach_reverse_from (sched_prev(perm), irn) {
-		for(i = get_irn_arity(irn) - 1; i >= 0; --i) {
+		for (i = get_irn_arity(irn) - 1; i >= 0; --i) {
 			ir_node *op = get_irn_n(irn, i);
-			if(arch_irn_consider_in_reg_alloc(aenv, cls, op)
-				&& !values_interfere(env->birg, op, last_proj)) {
-				frontier = sched_next(irn);
+			if (arch_irn_consider_in_reg_alloc(aenv, cls, op) &&
+			    !values_interfere(env->birg, op, one_proj)) {
+				frontier = irn;
 				goto found_front;
 			}
 		}
@@ -938,11 +938,12 @@ found_front:
 		int                        input = -1;
 		ir_node                   *proj;
 
+		/* search if node is a INPUT of Perm */
 		foreach_out_edge(perm, edge) {
 			ir_node *out = get_edge_src_irn(edge);
 			int      pn  = get_Proj_proj(out);
 			ir_node *in  = get_irn_n(perm, pn);
-			if(node == in) {
+			if (node == in) {
 				proj  = out;
 				input = pn;
 				break;