X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fbeinsn.c;h=ed44d42d32de3f00c0fb1935a62efb4a254d0f4a;hb=24d4d90a8a18fd1e2157787efc06fb3c9c7f2380;hp=ac534b9c6c8861bccff94a28a30cd123b4f09a1e;hpb=5057c4b3b6c48dc75dee684cd172ce4cfed00da7;p=libfirm diff --git a/ir/be/beinsn.c b/ir/be/beinsn.c index ac534b9c6..ed44d42d3 100644 --- a/ir/be/beinsn.c +++ b/ir/be/beinsn.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved. + * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved. * * This file is part of libFirm. * @@ -21,57 +21,20 @@ * @file * @brief A data structure to treat nodes and node-proj collections uniformly. * @author Sebastian Hack - * @version $Id$ */ -#ifdef HAVE_CONFIG_H #include "config.h" -#endif #include "irgraph_t.h" #include "irmode_t.h" #include "irnode_t.h" #include "iredges.h" -#include "besched_t.h" +#include "besched.h" #include "beinsn_t.h" -#include "beirg_t.h" +#include "beirg.h" #include "beabi.h" #include "raw_bitset.h" -/** - * Add machine operands to the instruction uses. - * - * @param env the insn construction environment - * @param insn the be_insn that is build - * @param mach_op the machine operand for which uses are added - */ -static void add_machine_operands(const be_insn_env_t *env, be_insn_t *insn, ir_node *mach_op) { - const arch_env_t *arch_env = env->aenv; - struct obstack *obst = env->obst; - int i, n; - - for (i = 0, n = get_irn_arity(mach_op); i < n; ++i) { - ir_node *op = get_irn_n(mach_op, i); - - if (is_irn_machine_operand(op)) { - add_machine_operands(env, insn, op); - } else if (arch_irn_consider_in_reg_alloc(arch_env, env->cls, op)) { - be_operand_t o; - - /* found a register use, create an operand */ - o.req = arch_get_register_req(arch_env, mach_op, i); - o.carrier = op; - o.irn = insn->irn; - o.pos = i; - o.partner = NULL; - o.has_constraints = arch_register_req_is(o.req, limited); - obstack_grow(obst, &o, sizeof(o)); - insn->n_ops++; - insn->in_constraints |= o.has_constraints; - } - } -} - /** * Create a be_insn_t for an IR node. * @@ -82,15 +45,13 @@ static void add_machine_operands(const be_insn_env_t *env, be_insn_t *insn, ir_n */ be_insn_t *be_scan_insn(const be_insn_env_t *env, ir_node *irn) { - const arch_env_t *arch_env = env->aenv; - struct obstack *obst = env->obst; + struct obstack *obst = env->obst; be_operand_t o; be_insn_t *insn; int i, n; int pre_colored = 0; - insn = obstack_alloc(obst, sizeof(insn[0])); - memset(insn, 0, sizeof(insn[0])); + insn = OALLOCZ(obst, be_insn_t); insn->irn = irn; insn->next_insn = sched_next(irn); @@ -107,32 +68,32 @@ be_insn_t *be_scan_insn(const be_insn_env_t *env, ir_node *irn) in the backend, but check it for now. */ assert(get_irn_mode(p) != mode_T); - if (arch_irn_consider_in_reg_alloc(arch_env, env->cls, p)) { + if (arch_irn_consider_in_reg_alloc(env->cls, p)) { /* found a def: create a new operand */ - o.req = arch_get_register_req(arch_env, p, -1); + o.req = arch_get_irn_register_req(p); o.carrier = p; o.irn = irn; o.pos = -(get_Proj_proj(p) + 1); o.partner = NULL; - o.has_constraints = arch_register_req_is(o.req, limited); + o.has_constraints = arch_register_req_is(o.req, limited) | (o.req->width > 1); obstack_grow(obst, &o, sizeof(o)); insn->n_ops++; insn->out_constraints |= o.has_constraints; - pre_colored += arch_get_irn_register(arch_env, p) != NULL; + pre_colored += arch_get_irn_register(p) != NULL; } } - } else if (arch_irn_consider_in_reg_alloc(arch_env, env->cls, irn)) { + } else if (arch_irn_consider_in_reg_alloc(env->cls, irn)) { /* only one def, create one operand */ - o.req = arch_get_register_req(arch_env, irn, -1); + o.req = arch_get_irn_register_req(irn); o.carrier = irn; o.irn = irn; o.pos = -1; o.partner = NULL; - o.has_constraints = arch_register_req_is(o.req, limited); + o.has_constraints = arch_register_req_is(o.req, limited) | (o.req->width > 1); obstack_grow(obst, &o, sizeof(o)); insn->n_ops++; insn->out_constraints |= o.has_constraints; - pre_colored += arch_get_irn_register(arch_env, irn) != NULL; + pre_colored += arch_get_irn_register(irn) != NULL; } if (pre_colored > 0) { @@ -145,11 +106,9 @@ be_insn_t *be_scan_insn(const be_insn_env_t *env, ir_node *irn) for (i = 0, n = get_irn_arity(irn); i < n; ++i) { ir_node *op = get_irn_n(irn, i); - if (is_irn_machine_operand(op)) { - add_machine_operands(env, insn, op); - } else if (arch_irn_consider_in_reg_alloc(arch_env, env->cls, op)) { + if (arch_irn_consider_in_reg_alloc(env->cls, op)) { /* found a register use, create an operand */ - o.req = arch_get_register_req(arch_env, irn, i); + o.req = arch_get_irn_register_req_in(irn, i); o.carrier = op; o.irn = irn; o.pos = i; @@ -162,7 +121,7 @@ be_insn_t *be_scan_insn(const be_insn_env_t *env, ir_node *irn) } insn->has_constraints = insn->in_constraints | insn->out_constraints; - insn->ops = obstack_finish(obst); + insn->ops = (be_operand_t*)obstack_finish(obst); /* Compute the admissible registers bitsets. */ for (i = 0; i < insn->n_ops; ++i) { @@ -179,29 +138,14 @@ be_insn_t *be_scan_insn(const be_insn_env_t *env, ir_node *irn) assert(cls == env->cls); - op->regs = bitset_obstack_alloc(obst, env->cls->n_regs); - if (type & arch_register_req_type_limited) { - rbitset_copy_to_bitset(req->limited, op->regs); + bitset_t *regs = bitset_obstack_alloc(obst, env->cls->n_regs); + rbitset_copy_to_bitset(req->limited, regs); + op->regs = regs; } else { - arch_put_non_ignore_regs(arch_env, env->cls, op->regs); - if (env->ignore_colors) - bitset_andnot(op->regs, env->ignore_colors); + op->regs = env->allocatable_regs; } } return insn; } - -be_insn_env_t *be_insn_env_init(be_insn_env_t *ie, const be_irg_t *birg, - const arch_register_class_t *cls, - struct obstack *obst) -{ - ie->aenv = be_get_birg_arch_env(birg); - ie->cls = cls; - ie->obst = obst; - ie->ignore_colors = bitset_obstack_alloc(obst, cls->n_regs); - be_abi_put_ignore_regs(birg->abi, cls, ie->ignore_colors); - - return ie; -}