X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fbeinsn.c;h=2f7a290098439a7d04aebbde3906346d27359cff;hb=5474a1c188c9d59eea2c915515980cd9cbab58d8;hp=167a2b2fafb8f9d8e5181cea556b94dccd2a0116;hpb=32ea6ea0320f551448bb66e534e3351977464d42;p=libfirm diff --git a/ir/be/beinsn.c b/ir/be/beinsn.c index 167a2b2fa..2f7a29009 100644 --- a/ir/be/beinsn.c +++ b/ir/be/beinsn.c @@ -21,7 +21,6 @@ * @file * @brief A data structure to treat nodes and node-proj collections uniformly. * @author Sebastian Hack - * @version $Id$ */ #include "config.h" @@ -36,40 +35,6 @@ #include "beabi.h" #include "raw_bitset.h" -/** - * Add machine operands to the instruction uses. - * - * @param env the insn construction environment - * @param insn the be_insn that is build - * @param mach_op the machine operand for which uses are added - */ -static void add_machine_operands(const be_insn_env_t *env, be_insn_t *insn, ir_node *mach_op) -{ - struct obstack *obst = env->obst; - int i, n; - - for (i = 0, n = get_irn_arity(mach_op); i < n; ++i) { - ir_node *op = get_irn_n(mach_op, i); - - if (is_irn_machine_operand(op)) { - add_machine_operands(env, insn, op); - } else if (arch_irn_consider_in_reg_alloc(env->cls, op)) { - be_operand_t o; - - /* found a register use, create an operand */ - o.req = arch_get_register_req(mach_op, i); - o.carrier = op; - o.irn = insn->irn; - o.pos = i; - o.partner = NULL; - o.has_constraints = arch_register_req_is(o.req, limited); - obstack_grow(obst, &o, sizeof(o)); - insn->n_ops++; - insn->in_constraints |= o.has_constraints; - } - } -} - /** * Create a be_insn_t for an IR node. * @@ -105,7 +70,7 @@ be_insn_t *be_scan_insn(const be_insn_env_t *env, ir_node *irn) if (arch_irn_consider_in_reg_alloc(env->cls, p)) { /* found a def: create a new operand */ - o.req = arch_get_register_req_out(p); + o.req = arch_get_irn_register_req(p); o.carrier = p; o.irn = irn; o.pos = -(get_Proj_proj(p) + 1); @@ -119,7 +84,7 @@ be_insn_t *be_scan_insn(const be_insn_env_t *env, ir_node *irn) } } else if (arch_irn_consider_in_reg_alloc(env->cls, irn)) { /* only one def, create one operand */ - o.req = arch_get_register_req_out(irn); + o.req = arch_get_irn_register_req(irn); o.carrier = irn; o.irn = irn; o.pos = -1; @@ -141,11 +106,9 @@ be_insn_t *be_scan_insn(const be_insn_env_t *env, ir_node *irn) for (i = 0, n = get_irn_arity(irn); i < n; ++i) { ir_node *op = get_irn_n(irn, i); - if (is_irn_machine_operand(op)) { - add_machine_operands(env, insn, op); - } else if (arch_irn_consider_in_reg_alloc(env->cls, op)) { + if (arch_irn_consider_in_reg_alloc(env->cls, op)) { /* found a register use, create an operand */ - o.req = arch_get_register_req(irn, i); + o.req = arch_get_irn_register_req_in(irn, i); o.carrier = op; o.irn = irn; o.pos = i; @@ -158,7 +121,7 @@ be_insn_t *be_scan_insn(const be_insn_env_t *env, ir_node *irn) } insn->has_constraints = insn->in_constraints | insn->out_constraints; - insn->ops = obstack_finish(obst); + insn->ops = (be_operand_t*)obstack_finish(obst); /* Compute the admissible registers bitsets. */ for (i = 0; i < insn->n_ops; ++i) { @@ -175,28 +138,14 @@ be_insn_t *be_scan_insn(const be_insn_env_t *env, ir_node *irn) assert(cls == env->cls); - op->regs = bitset_obstack_alloc(obst, env->cls->n_regs); - if (type & arch_register_req_type_limited) { - rbitset_copy_to_bitset(req->limited, op->regs); + bitset_t *regs = bitset_obstack_alloc(obst, env->cls->n_regs); + rbitset_copy_to_bitset(req->limited, regs); + op->regs = regs; } else { - arch_put_non_ignore_regs(env->cls, op->regs); - if (env->ignore_colors) - bitset_andnot(op->regs, env->ignore_colors); + op->regs = env->allocatable_regs; } } return insn; } - -be_insn_env_t *be_insn_env_init(be_insn_env_t *ie, const be_irg_t *birg, - const arch_register_class_t *cls, - struct obstack *obst) -{ - ie->cls = cls; - ie->obst = obst; - ie->ignore_colors = bitset_obstack_alloc(obst, cls->n_regs); - be_abi_put_ignore_regs(birg->abi, cls, ie->ignore_colors); - - return ie; -}