X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fbechordal.c;h=f0731d6a7495f5cf867693b1e3f62f53963b3668;hb=93da909d12b7bec51aa36ee5f05966c331f90fb9;hp=61fb891b13ee0cff8e1040e83e5994435419feee;hpb=9934a429113c6888036607f6dc69713702277256;p=libfirm

diff --git a/ir/be/bechordal.c b/ir/be/bechordal.c
index 61fb891b1..f0731d6a7 100644
--- a/ir/be/bechordal.c
+++ b/ir/be/bechordal.c
@@ -1,32 +1,43 @@
-/**
- * Chordal register allocation.
- * @author Sebastian Hack
- * @date 8.12.2004
+/*
+ * Copyright (C) 1995-2008 University of Karlsruhe.  All right reserved.
+ *
+ * This file is part of libFirm.
+ *
+ * This file may be distributed and/or modified under the terms of the
+ * GNU General Public License version 2 as published by the Free Software
+ * Foundation and appearing in the file LICENSE.GPL included in the
+ * packaging of this file.
+ *
+ * Licensees holding valid libFirm Professional Edition licenses may use
+ * this file in accordance with the libFirm Commercial License.
+ * Agreement provided with the Software.
  *
- * Copyright (C) Universitaet Karlsruhe
- * Released under the GPL
+ * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
+ * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE.
  */
 
+/**
+ * @file
+ * @brief       Chordal register allocation.
+ * @author      Sebastian Hack
+ * @date        08.12.2004
+ * @version     $Id$
+ */
 #ifdef HAVE_CONFIG_H
 #include "config.h"
 #endif
 
-#ifdef HAVE_MALLOC_H
-#include <malloc.h>
-#endif
-
-#ifdef HAVE_ALLOCA_H
-#include <alloca.h>
-#endif
-
 #include <ctype.h>
 
 #include "obst.h"
 #include "pset.h"
 #include "list.h"
 #include "bitset.h"
+#include "raw_bitset.h"
 #include "iterator.h"
 #include "bipartite.h"
+#include "hungarian.h"
 
 #include "irmode_t.h"
 #include "irgraph_t.h"
@@ -34,43 +45,44 @@
 #include "irgwalk.h"
 #include "irdump.h"
 #include "irdom.h"
+#include "irtools.h"
+#include "irbitset.h"
 #include "debug.h"
 #include "xmalloc.h"
+#include "iredges.h"
 
 #include "beutil.h"
 #include "besched.h"
-#include "benumb_t.h"
 #include "besched_t.h"
 #include "belive_t.h"
 #include "benode_t.h"
-#include "bearch.h"
+#include "bearch_t.h"
 #include "beirgmod.h"
 #include "beifg.h"
-
+#include "beinsn_t.h"
+#include "bestatevent.h"
+#include "beirg_t.h"
+#include "beintlive_t.h"
+#include "bera.h"
 #include "bechordal_t.h"
 #include "bechordal_draw.h"
+#include "bemodule.h"
 
-#define DBG_LEVEL SET_LEVEL_0
-#define DBG_LEVEL_CHECK SET_LEVEL_0
+DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
 
 #define NO_COLOR (-1)
 
-#define MAX(x, y) ((x) > (y) ? (x) : (y))
-#define MIN(x, y) ((x) < (y) ? (x) : (y))
-
 #define DUMP_INTERVALS
 
 typedef struct _be_chordal_alloc_env_t {
 	be_chordal_env_t *chordal_env;
 
-	firm_dbg_module_t *constr_dbg;  /**< Debug output for the constraint handler. */
-	pset *pre_colored;              /**< Set of precolored nodes. */
-	bitset_t *live;				    /**< A liveness bitset. */
-	bitset_t *tmp_colors;           /**< An auxiliary bitset which is as long as the number of colors in the class. */
-	bitset_t *colors;			    /**< The color mask. */
-	bitset_t *in_colors;            /**< Colors used by live in values. */
-	bitset_t *ignore_regs;          /**< A bitset of all ignore registers in the current class. */
-	int colors_n;                   /**< The number of colors. */
+	pset *pre_colored;     /**< Set of precolored nodes. */
+	bitset_t *live;		   /**< A liveness bitset. */
+	bitset_t *tmp_colors;  /**< An auxiliary bitset which is as long as the number of colors in the class. */
+	bitset_t *colors;	   /**< The color mask. */
+	bitset_t *in_colors;   /**< Colors used by live in values. */
+	int colors_n;          /**< The number of colors. */
 } be_chordal_alloc_env_t;
 
 #include "fourcc.h"
@@ -78,6 +90,7 @@ typedef struct _be_chordal_alloc_env_t {
 /* Make a fourcc for border checking. */
 #define BORDER_FOURCC				FOURCC('B', 'O', 'R', 'D')
 
+#if 0
 static void check_border_list(struct list_head *head)
 {
   border_t *x;
@@ -94,7 +107,7 @@ static void check_heads(be_chordal_env_t *env)
     check_border_list(ent->value);
   }
 }
-
+#endif
 
 /**
  * Add an interval border to the list of a block's list
@@ -117,10 +130,10 @@ static INLINE border_t *border_add(be_chordal_env_t *env, struct list_head *head
 	if(!is_def) {
 		border_t *def;
 
-		b = obstack_alloc(&env->obst, sizeof(*b));
+		b = obstack_alloc(env->obst, sizeof(*b));
 
 		/* also allocate the def and tie it to the use. */
-		def = obstack_alloc(&env->obst, sizeof(*def));
+		def = obstack_alloc(env->obst, sizeof(*def));
 		memset(def, 0, sizeof(*def));
 		b->other_end = def;
 		def->other_end = b;
@@ -132,8 +145,8 @@ static INLINE border_t *border_add(be_chordal_env_t *env, struct list_head *head
 		 */
 		set_irn_link(irn, def);
 
-		b->magic = BORDER_FOURCC;
-		def->magic = BORDER_FOURCC;
+		DEBUG_ONLY(b->magic = BORDER_FOURCC);
+		DEBUG_ONLY(def->magic = BORDER_FOURCC);
 	}
 
 	/*
@@ -144,7 +157,7 @@ static INLINE border_t *border_add(be_chordal_env_t *env, struct list_head *head
 	else {
 		b = get_irn_link(irn);
 
-		assert(b && b->magic == BORDER_FOURCC && "Illegal border encountered");
+		DEBUG_ONLY(assert(b && b->magic == BORDER_FOURCC && "Illegal border encountered"));
 	}
 
 	b->pressure = pressure;
@@ -153,7 +166,7 @@ static INLINE border_t *border_add(be_chordal_env_t *env, struct list_head *head
 	b->irn = irn;
 	b->step = step;
 	list_add_tail(&b->list, head);
-	DBG((env->dbg, LEVEL_5, "\t\t%s adding %+F, step: %d\n", is_def ? "def" : "use", irn, step));
+	DBG((dbg, LEVEL_5, "\t\t%s adding %+F, step: %d\n", is_def ? "def" : "use", irn, step));
 
 
 	return b;
@@ -167,7 +180,6 @@ static INLINE border_t *border_add(be_chordal_env_t *env, struct list_head *head
  */
 static INLINE int has_reg_class(const be_chordal_env_t *env, const ir_node *irn)
 {
-	// return arch_irn_has_reg_class(env->main_env->arch_env, irn, -1, env->cls);
 	return arch_irn_consider_in_reg_alloc(env->birg->main_env->arch_env, env->cls, irn);
 }
 
@@ -178,160 +190,198 @@ static int get_next_free_reg(const be_chordal_alloc_env_t *alloc_env, bitset_t *
 {
 	bitset_t *tmp = alloc_env->tmp_colors;
 	bitset_copy(tmp, colors);
-	bitset_or(tmp, alloc_env->ignore_regs);
+	bitset_or(tmp, alloc_env->chordal_env->ignore_colors);
 	return bitset_next_clear(tmp, 0);
 }
 
-typedef struct _operand_t operand_t;
-
-struct _operand_t {
-	ir_node *irn;
-	ir_node *carrier;
-	operand_t *partner;
-	bitset_t *regs;
-	int pos;
-	arch_register_req_t req;
-	unsigned has_constraints : 1;
-};
-
-typedef struct {
-	operand_t *ops;
-	int n_ops;
-	int use_start;
-	ir_node *next_insn;
-	ir_node *irn;
-	unsigned in_constraints  : 1;
-	unsigned out_constraints : 1;
-	unsigned has_constraints : 1;
-	unsigned pre_colored     : 1;
-} insn_t;
-
-#define insn_n_defs(insn) ((insn)->use_start)
-#define insn_n_uses(insn) ((insn)->n_ops - (insn)->use_start)
-
-static insn_t *scan_insn(be_chordal_env_t *env, ir_node *irn, struct obstack *obst)
+static bitset_t *get_decisive_partner_regs(bitset_t *bs, const be_operand_t *o1, const be_operand_t *o2)
 {
-	const arch_env_t *arch_env = env->birg->main_env->arch_env;
-	operand_t o;
-	insn_t *insn;
-	int i, n;
-	int pre_colored = 0;
-
-	insn = obstack_alloc(obst, sizeof(insn[0]));
-	memset(insn, 0, sizeof(insn[0]));
-
-	insn->irn       = irn;
-	insn->next_insn = sched_next(irn);
-	if(get_irn_mode(irn) == mode_T) {
-		ir_node *p;
-
-		for(p = sched_next(irn); is_Proj(p); p = sched_next(p)) {
-			if(arch_irn_consider_in_reg_alloc(arch_env, env->cls, p)) {
-				arch_get_register_req(arch_env, &o.req, p, -1);
-				o.carrier         = p;
-				o.irn             = irn;
-				o.pos             = -(get_Proj_proj(p) + 1);
-				o.partner         = NULL;
-				o.has_constraints = arch_register_req_is(&o.req, limited);
-				obstack_grow(obst, &o, sizeof(o));
-				insn->n_ops++;
-				insn->out_constraints |= o.has_constraints;
-				pre_colored += arch_get_irn_register(arch_env, p) != NULL;
-			}
-		}
+	bitset_t *res = bs;
 
-		insn->next_insn = p;
+	if(!o1) {
+		bitset_copy(bs, o2->regs);
+		return bs;
 	}
 
-	else if(arch_irn_consider_in_reg_alloc(arch_env, env->cls, irn)) {
-		arch_get_register_req(arch_env, &o.req, irn, -1);
-		o.carrier = irn;
-		o.irn     = irn;
-		o.pos     = -1;
-		o.partner = NULL;
-		o.has_constraints = arch_register_req_is(&o.req, limited);
-		obstack_grow(obst, &o, sizeof(o));
-		insn->n_ops++;
-		insn->out_constraints |= o.has_constraints;
-		pre_colored += arch_get_irn_register(arch_env, irn) != NULL;
+	if(!o2) {
+		bitset_copy(bs, o1->regs);
+		return bs;
 	}
 
-	insn->pre_colored = pre_colored == insn->n_ops && insn->n_ops > 0;
-	insn->use_start   = insn->n_ops;
+	assert(o1->req->cls == o2->req->cls || ! o1->req->cls || ! o2->req->cls);
+
+	if(bitset_contains(o1->regs, o2->regs))
+		bitset_copy(bs, o1->regs);
+	else if(bitset_contains(o2->regs, o1->regs))
+		bitset_copy(bs, o2->regs);
+	else
+		res = NULL;
+
+	return res;
+}
+
+static be_insn_t *chordal_scan_insn(be_chordal_env_t *env, ir_node *irn)
+{
+	be_insn_env_t ie;
+
+	ie.ignore_colors = env->ignore_colors;
+	ie.aenv          = env->birg->main_env->arch_env;
+	ie.obst          = env->obst;
+	ie.cls           = env->cls;
+	return be_scan_insn(&ie, irn);
+}
+
+static ir_node *prepare_constr_insn(be_chordal_env_t *env, ir_node *irn)
+{
+	const be_irg_t *birg   = env->birg;
+	const arch_env_t *aenv = birg->main_env->arch_env;
+	bitset_t *tmp          = bitset_alloca(env->cls->n_regs);
+	bitset_t *def_constr   = bitset_alloca(env->cls->n_regs);
+	ir_node *bl            = get_nodes_block(irn);
+	be_lv_t *lv            = env->birg->lv;
+
+	be_insn_t *insn;
+	int i, j;
 
-	for(i = 0, n = get_irn_arity(irn); i < n; ++i) {
+	for (i = get_irn_arity(irn) - 1; i >= 0; --i) {
 		ir_node *op = get_irn_n(irn, i);
+		ir_node *copy;
+		const arch_register_t *reg;
+		const arch_register_req_t *req;
 
-		if(arch_irn_consider_in_reg_alloc(arch_env, env->cls, op)) {
-			arch_get_register_req(arch_env, &o.req, irn, i);
-			o.carrier = op;
-			o.irn     = irn;
-			o.pos     = i;
-			o.partner = NULL;
-			o.has_constraints = arch_register_req_is(&o.req, limited);
-			obstack_grow(obst, &o, sizeof(o));
-			insn->n_ops++;
-			insn->in_constraints |= o.has_constraints;
-		}
-	}
+		if (arch_get_irn_reg_class(aenv, irn, i) != env->cls)
+			continue;
+
+		reg = arch_get_irn_register(aenv, op);
 
-	insn->has_constraints = insn->in_constraints | insn->out_constraints;
-	insn->ops = obstack_finish(obst);
+		if (reg == NULL || !arch_register_type_is(reg, ignore))
+			continue;
+		if(arch_register_type_is(reg, joker))
+			continue;
 
-	/* Compute the admissible registers bitsets. */
-	for(i = 0; i < insn->n_ops; ++i) {
-		operand_t *op = &insn->ops[i];
+		req = arch_get_register_req(aenv, irn, i);
+		if (!arch_register_req_is(req, limited))
+			continue;
 
-		assert(op->req.cls == env->cls);
-		op->regs   = bitset_obstack_alloc(obst, env->cls->n_regs);
+		if (rbitset_is_set(req->limited, reg->index))
+			continue;
 
-		if(arch_register_req_is(&op->req, limited))
-			op->req.limited(op->req.limited_env, op->regs);
-		else
-			arch_put_non_ignore_regs(env->birg->main_env->arch_env, env->cls, op->regs);
+		copy = be_new_Copy(env->cls, env->irg, bl, op);
+		be_stat_ev("constr_copy", 1);
+
+		sched_add_before(irn, copy);
+		set_irn_n(irn, i, copy);
+		DBG((dbg, LEVEL_3, "inserting ignore arg copy %+F for %+F pos %d\n", copy, irn, i));
 	}
 
-	return insn;
-}
+    insn = chordal_scan_insn(env, irn);
 
-static bitset_t *get_decisive_partner_regs(bitset_t *bs, const operand_t *o1, const operand_t *o2)
-{
-	bitset_t *res = bs;
+	if(!insn->has_constraints)
+		goto end;
 
-	if(!o1) {
-		bitset_copy(bs, o2->regs);
-		return bs;
+	/* insert copies for nodes that occur constrained more than once. */
+	for(i = insn->use_start; i < insn->n_ops; ++i) {
+		be_operand_t *op = &insn->ops[i];
+
+		if(!op->has_constraints)
+			continue;
+
+		for(j = i + 1; j < insn->n_ops; ++j) {
+			ir_node *copy;
+			be_operand_t *a_op = &insn->ops[j];
+
+			if(a_op->carrier != op->carrier || !a_op->has_constraints)
+				continue;
+
+			/* if the constraint is the same, no copy is necessary
+			 * TODO generalise unequal but overlapping constraints */
+			if (a_op->req == op->req)
+				continue;
+
+			if (be_is_Copy(get_irn_n(insn->irn, a_op->pos)))
+				continue;
+
+			copy = be_new_Copy(env->cls, env->irg, bl, op->carrier);
+			be_stat_ev("constr_copy", 1);
+
+			sched_add_before(insn->irn, copy);
+			set_irn_n(insn->irn, a_op->pos, copy);
+			DBG((dbg, LEVEL_3, "inserting multiple constr copy %+F for %+F pos %d\n", copy, insn->irn, a_op->pos));
+		}
 	}
 
-	if(!o2) {
-		bitset_copy(bs, o1->regs);
-		return bs;
+	/* collect all registers occurring in out constraints. */
+	for(i = 0; i < insn->use_start; ++i) {
+		be_operand_t *op = &insn->ops[i];
+		if(op->has_constraints)
+			bitset_or(def_constr, op->regs);
 	}
 
-	assert(o1->req.cls == o2->req.cls);
+	/*
+		insert copies for all constrained arguments living through the node
+		and being constrained to a register which also occurs in out constraints.
+	*/
+	for(i = insn->use_start; i < insn->n_ops; ++i) {
+		ir_node *copy;
+		be_operand_t *op = &insn->ops[i];
 
-	if(bitset_contains(o1->regs, o2->regs))
-		bitset_copy(bs, o1->regs);
-	else if(bitset_contains(o2->regs, o1->regs))
-		bitset_copy(bs, o2->regs);
-	else
-		res = NULL;
+		bitset_copy(tmp, op->regs);
+		bitset_and(tmp, def_constr);
 
-	return res;
+		/*
+			Check, if
+			1) the operand is constrained.
+			2) lives through the node.
+			3) is constrained to a register occurring in out constraints.
+		*/
+		if(!op->has_constraints ||
+		   !values_interfere(birg, insn->irn, op->carrier) ||
+		   bitset_popcnt(tmp) == 0)
+			continue;
+
+		/*
+		   only create the copy if the operand is no copy.
+		   this is necessary since the assure constraints phase inserts
+		   Copies and Keeps for operands which must be different from the
+		   results. Additional copies here would destroy this.
+		 */
+		if (be_is_Copy(get_irn_n(insn->irn, op->pos)))
+			continue;
+
+		copy = be_new_Copy(env->cls, env->irg, bl, op->carrier);
+
+		sched_add_before(insn->irn, copy);
+		set_irn_n(insn->irn, op->pos, copy);
+		DBG((dbg, LEVEL_3, "inserting constr copy %+F for %+F pos %d\n", copy, insn->irn, op->pos));
+		be_liveness_update(lv, op->carrier);
+	}
+
+end:
+	obstack_free(env->obst, insn);
+	return insn->next_insn;
+}
+
+static void pre_spill_prepare_constr_walker(ir_node *bl, void *data)
+{
+	be_chordal_env_t *env = data;
+	ir_node *irn;
+	for(irn = sched_first(bl); !sched_is_end(irn);) {
+		irn = prepare_constr_insn(env, irn);
+	}
+}
+
+void be_pre_spill_prepare_constr(be_chordal_env_t *cenv) {
+	irg_block_walk_graph(cenv->irg, pre_spill_prepare_constr_walker, NULL, (void *) cenv);
 }
 
-static void pair_up_operands(const be_chordal_alloc_env_t *alloc_env, insn_t *insn)
+static void pair_up_operands(const be_chordal_alloc_env_t *alloc_env, be_insn_t *insn)
 {
 	const be_chordal_env_t *env = alloc_env->chordal_env;
-	const arch_env_t *aenv      = env->birg->main_env->arch_env;
-	firm_dbg_module_t *dbg      = alloc_env->constr_dbg;
 
-	int n_uses         = insn_n_uses(insn);
-	int n_defs         = insn_n_defs(insn);
-	int max_pairs      = MIN(n_uses, n_defs);
-	bitset_t *bs       = bitset_alloca(env->cls->n_regs);
-	bipartite_t *bp    = bipartite_new(n_defs, n_uses);
-	int *pairing       = alloca(MAX(n_defs, n_uses) * sizeof(pairing[0]));
+	int n_uses   = be_insn_n_uses(insn);
+	int n_defs   = be_insn_n_defs(insn);
+	bitset_t *bs = bitset_alloca(env->cls->n_regs);
+	int *pairing = alloca(MAX(n_defs, n_uses) * sizeof(pairing[0]));
 
 	int i, j;
 
@@ -339,57 +389,55 @@ static void pair_up_operands(const be_chordal_alloc_env_t *alloc_env, insn_t *in
 		For each out operand, try to find an in operand which can be assigned the
 		same register as the out operand.
 	*/
-	for(j = 0; j < insn->use_start; ++j) {
-		operand_t *out_op = &insn->ops[j];
+	for (j = 0; j < insn->use_start; ++j) {
+		int smallest         = -1;
+		int smallest_n_regs  = 2 * env->cls->n_regs + 1;
+		be_operand_t *out_op = &insn->ops[j];
 
 		/* Try to find an in operand which has ... */
 		for(i = insn->use_start; i < insn->n_ops; ++i) {
-			const operand_t *op = &insn->ops[i];
-
-			/*
-			The in operand can only be paired with a def, if the node defining the
-			operand's value does not interfere with the instruction itself. That
-			would mean, that it is live at the instruction, so no result of the instruction
-			can have the same register as the operand.
-
-			Furthermore, tow operands can be paired, if the admissible registers
-			of one are a subset of the other's. We record the operand whose constraints
-			count in the decisive array.
-			*/
-			if(!values_interfere(op->irn, op->carrier)) {
-				if(get_decisive_partner_regs(bs, out_op, op))
-					bipartite_add(bp, j, i - insn->use_start);
+			int n_total;
+			const be_operand_t *op = &insn->ops[i];
+
+			if (op->partner != NULL)
+				continue;
+			if (values_interfere(env->birg, op->irn, op->carrier))
+				continue;
+
+			bitset_clear_all(bs);
+			bitset_copy(bs, op->regs);
+			bitset_and(bs, out_op->regs);
+			n_total = bitset_popcnt(op->regs) + bitset_popcnt(out_op->regs);
+
+			if (bitset_popcnt(bs) > 0 && n_total < smallest_n_regs) {
+				smallest = i;
+				smallest_n_regs = n_total;
 			}
 		}
-	}
 
-	/* Compute the pairing. */
-	bipartite_matching(bp, pairing);
-	for(i = 0; i < insn->use_start; ++i) {
-		int p = pairing[i] + insn->use_start;
+		if (smallest >= 0) {
+			be_operand_t *partner = &insn->ops[smallest];
+			for(i = insn->use_start; i < insn->n_ops; ++i) {
+				if(insn->ops[i].carrier == partner->carrier)
+					insn->ops[i].partner = out_op;
+			}
 
-		if(p >= insn->use_start) {
-			insn->ops[i].partner = &insn->ops[p];
-			insn->ops[p].partner = &insn->ops[i];
+			out_op->partner  = partner;
+			partner->partner = out_op;
 		}
 	}
-
-	bipartite_free(bp);
 }
 
 
-static ir_node *pre_process_constraints(be_chordal_alloc_env_t *alloc_env, insn_t **the_insn)
+static ir_node *pre_process_constraints(be_chordal_alloc_env_t *alloc_env,
+                                        be_insn_t **the_insn)
 {
 	be_chordal_env_t *env       = alloc_env->chordal_env;
 	const arch_env_t *aenv      = env->birg->main_env->arch_env;
-	firm_dbg_module_t *dbg      = alloc_env->constr_dbg;
-	insn_t *insn                = *the_insn;
-	ir_node *bl                 = get_nodes_block(insn->irn);
-	ir_node *copy               = NULL;
+	be_insn_t *insn             = *the_insn;
 	ir_node *perm               = NULL;
 	bitset_t *out_constr        = bitset_alloca(env->cls->n_regs);
-	bitset_t *bs                = bitset_alloca(env->cls->n_regs);
-
+	const ir_edge_t *edge;
 	int i;
 
 	assert(insn->has_constraints && "only do this for constrained nodes");
@@ -401,85 +449,76 @@ static ir_node *pre_process_constraints(be_chordal_alloc_env_t *alloc_env, insn_
 		be copied.
 	*/
 	for(i = 0; i < insn->use_start; ++i) {
-		operand_t *op = &insn->ops[i];
+		be_operand_t *op = &insn->ops[i];
 		if(op->has_constraints)
 			bitset_or(out_constr, op->regs);
 	}
 
-	/*
-		Now, figure out which input operand must be copied since it has input
-		constraints which are also output constraints.
-	*/
-	for(i = insn->use_start; i < insn->n_ops; ++i) {
-		operand_t *op = &insn->ops[i];
-		if(op->has_constraints && (values_interfere(op->carrier, insn->irn) || arch_irn_is(aenv, op->carrier, ignore))) {
-			bitset_copy(bs, op->regs);
-			bitset_and(bs, out_constr);
-
-			/*
-				The operand (interfering with the node) has input constraints
-				which also occur as output constraints, so insert a copy.
-			*/
-			if(bitset_popcnt(bs) > 0) {
-				copy                 = be_new_Copy(op->req.cls, env->irg, bl, op->carrier);
-				insn->ops[i].carrier = copy;
-				sched_add_before(insn->irn, copy);
-
-				DBG((dbg, LEVEL_2, "adding copy for interfering and constrained op %+F\n", op->carrier));
-			}
-		}
-	}
-
 	/*
 		Make the Perm, recompute liveness and re-scan the insn since the
 		in operands are now the Projs of the Perm.
 	*/
-	perm = insert_Perm_after(aenv, env->cls, env->dom_front, sched_prev(insn->irn));
+	perm = insert_Perm_after(env->birg, env->cls, sched_prev(insn->irn));
 
 	/* Registers are propagated by insert_Perm_after(). Clean them here! */
-	if(perm) {
-		const ir_edge_t *edge;
+	if(perm == NULL)
+		return NULL;
 
-		foreach_out_edge(perm, edge) {
-			ir_node *proj = get_edge_src_irn(edge);
-			arch_set_irn_register(aenv, proj, NULL);
-		}
+	be_stat_ev("constr_perm", get_irn_arity(perm));
+	foreach_out_edge(perm, edge) {
+		ir_node *proj = get_edge_src_irn(edge);
+		arch_set_irn_register(aenv, proj, NULL);
+	}
 
-		/*
-			We also have to re-build the insn since the input operands are now the Projs of
-			the Perm. Recomputing liveness is also a good idea if a Perm is inserted, since
-			the live sets may change.
-		*/
-		be_liveness(env->irg);
-		obstack_free(&env->obst, insn);
-		*the_insn = insn = scan_insn(env, insn->irn, &env->obst);
+	/*
+		We also have to re-build the insn since the input operands are now the Projs of
+		the Perm. Recomputing liveness is also a good idea if a Perm is inserted, since
+		the live sets may change.
+	*/
+	obstack_free(env->obst, insn);
+	*the_insn = insn = chordal_scan_insn(env, insn->irn);
 
+	/*
+		Copy the input constraints of the insn to the Perm as output
+		constraints. Succeeding phases (coalescing) will need that.
+	*/
+	for(i = insn->use_start; i < insn->n_ops; ++i) {
+		be_operand_t *op = &insn->ops[i];
+		ir_node *proj = op->carrier;
 		/*
-			Copy the input constraints of the insn to the Perm as output
-			constraints. Succeeding phases (coalescing will need that).
+			Note that the predecessor must not be a Proj of the Perm,
+			since ignore-nodes are not Perm'ed.
 		*/
-		for(i = insn->use_start; i < insn->n_ops; ++i) {
-			operand_t *op = &insn->ops[i];
-			ir_node *proj = op->carrier;
-			/*
-				Note that the predecessor must not be a Proj of the Perm,
-				since ignore-nodes are not Perm'ed.
-			*/
-			if(op->has_constraints &&  is_Proj(proj) && get_Proj_pred(proj) == perm) {
-				be_set_constr_limited(perm, BE_OUT_POS(get_Proj_proj(proj)), &op->req);
-			}
+		if(op->has_constraints &&  is_Proj(proj) && get_Proj_pred(proj) == perm) {
+			be_set_constr_limited(perm, BE_OUT_POS(get_Proj_proj(proj)), op->req);
 		}
 	}
 
 	return perm;
 }
 
-static ir_node *handle_constraints(be_chordal_alloc_env_t *alloc_env, ir_node *irn)
+static ir_node *handle_constraints(be_chordal_alloc_env_t *alloc_env,
+                                   ir_node *irn, int *silent)
 {
+	const arch_env_t *aenv;
+	int n_regs;
+	bitset_t *bs;
+	ir_node **alloc_nodes;
+	//hungarian_problem_t *bp;
+	int *assignment;
+	pmap *partners;
+	int i, n_alloc;
+	bitset_pos_t col;
+	const ir_edge_t *edge;
+	ir_node *perm = NULL;
+	//int match_res, cost;
 	be_chordal_env_t *env  = alloc_env->chordal_env;
-	void *base             = obstack_base(&env->obst);
-	insn_t *insn           = scan_insn(env, irn, &env->obst);
+	void *base             = obstack_base(env->obst);
+	be_insn_t *insn        = chordal_scan_insn(env, irn);
 	ir_node *res           = insn->next_insn;
+	int be_silent          = *silent;
+	be_irg_t *birg         = env->birg;
+	bipartite_t *bp;
 
 	if(insn->pre_colored) {
 		int i;
@@ -487,178 +526,235 @@ static ir_node *handle_constraints(be_chordal_alloc_env_t *alloc_env, ir_node *i
 			pset_insert_ptr(alloc_env->pre_colored, insn->ops[i].carrier);
 	}
 
-	if(be_is_Perm(irn) || be_is_RegParams(irn) || (be_is_Barrier(irn) && !insn->in_constraints))
+	/*
+		If the current node is a barrier toggle the silent flag.
+		If we are in the start block, we are ought to be silent at the beginning,
+		so the toggling activates the constraint handling but skips the barrier.
+		If we are in the end block we handle the in requirements of the barrier
+		and set the rest to silent.
+	*/
+	if(be_is_Barrier(irn))
+		*silent = !*silent;
+
+	if(be_silent)
 		goto end;
 
 	/*
 		Perms inserted before the constraint handling phase are considered to be
 		correctly precolored. These Perms arise during the ABI handling phase.
 	*/
-	if(insn->has_constraints) {
-		firm_dbg_module_t *dbg = alloc_env->constr_dbg;
-		const arch_env_t *aenv = env->birg->main_env->arch_env;
-		int n_regs             = env->cls->n_regs;
-		bitset_t *bs           = bitset_alloca(n_regs);
-		bitset_t *non_ignore   = bitset_alloca(n_regs);
-		ir_node **alloc_nodes  = alloca(n_regs * sizeof(alloc_nodes[0]));
-		bipartite_t *bp        = bipartite_new(n_regs, n_regs);
-		int *assignment        = alloca(n_regs * sizeof(assignment[0]));
-		pmap *partners         = pmap_create();
-
-		int i, n_alloc;
-		long col;
-		const ir_edge_t *edge;
-		ir_node *perm = NULL;
+	if(!insn->has_constraints)
+		goto end;
 
-		/*
-			prepare the constraint handling of this node.
-			Perms are constructed and Copies are created for constrained values
-			interfering with the instruction.
-		*/
-		perm = pre_process_constraints(alloc_env, &insn);
+	aenv        = env->birg->main_env->arch_env;
+	n_regs      = env->cls->n_regs;
+	bs          = bitset_alloca(n_regs);
+	alloc_nodes = alloca(n_regs * sizeof(alloc_nodes[0]));
+	//bp          = hungarian_new(n_regs, n_regs, 2, HUNGARIAN_MATCH_PERFECT);
+	bp          = bipartite_new(n_regs, n_regs);
+	assignment  = alloca(n_regs * sizeof(assignment[0]));
+	partners    = pmap_create();
+
+	/*
+		prepare the constraint handling of this node.
+		Perms are constructed and Copies are created for constrained values
+		interfering with the instruction.
+	*/
+	perm = pre_process_constraints(alloc_env, &insn);
+
+	/* find suitable in operands to the out operands of the node. */
+	pair_up_operands(alloc_env, insn);
 
-		/* find suitable in operands to the out operands of the node. */
-		pair_up_operands(alloc_env, insn);
+	/*
+		look at the in/out operands and add each operand (and its possible partner)
+		to a bipartite graph (left: nodes with partners, right: admissible colors).
+	*/
+	for(i = 0, n_alloc = 0; i < insn->n_ops; ++i) {
+		be_operand_t *op = &insn->ops[i];
 
 		/*
-			look at the in/out operands and add each operand (and its possible partner)
-			to a bipartite graph (left: nodes with partners, right: admissible colors).
+			If the operand has no partner or the partner has not been marked
+			for allocation, determine the admissible registers and mark it
+			for allocation by associating the node and its partner with the
+			set of admissible registers via a bipartite graph.
 		*/
-		for(i = 0, n_alloc = 0; i < insn->n_ops; ++i) {
-			operand_t *op = &insn->ops[i];
-
-			/*
-				If the operand has no partner or the partner has not been marked
-				for allocation, determine the admissible registers and mark it
-				for allocation by associating the node and its partner with the
-				set of admissible registers via a bipartite graph.
-			*/
-			if(!op->partner || !pmap_contains(partners, op->partner->carrier)) {
-
-				pmap_insert(partners, op->carrier, op->partner ? op->partner->carrier : NULL);
-				alloc_nodes[n_alloc] = op->carrier;
+		if(!op->partner || !pmap_contains(partners, op->partner->carrier)) {
+			ir_node *partner = op->partner ? op->partner->carrier : NULL;
+			int i;
+
+			pmap_insert(partners, op->carrier, partner);
+			if(partner != NULL)
+				pmap_insert(partners, partner, op->carrier);
+
+			/* don't insert a node twice */
+			for(i = 0; i < n_alloc; ++i) {
+				if(alloc_nodes[i] == op->carrier) {
+					break;
+				}
+			}
+			if(i < n_alloc)
+				continue;
 
-				DBG((dbg, LEVEL_2, "\tassociating %+F and %+F\n", op->carrier, op->partner ? op->partner->carrier : NULL));
+			alloc_nodes[n_alloc] = op->carrier;
 
- 				bitset_clear_all(bs);
-				get_decisive_partner_regs(bs, op, op->partner);
+			DBG((dbg, LEVEL_2, "\tassociating %+F and %+F\n", op->carrier,
+			     partner));
 
-				DBG((dbg, LEVEL_2, "\tallowed registers for %+F: %B\n", op->carrier, bs));
+			bitset_clear_all(bs);
+			get_decisive_partner_regs(bs, op, op->partner);
 
-				bitset_foreach(bs, col)
-					bipartite_add(bp, n_alloc, col);
+			DBG((dbg, LEVEL_2, "\tallowed registers for %+F: %B\n", op->carrier,
+			     bs));
 
-				n_alloc++;
+			bitset_foreach(bs, col) {
+				//hungarian_add(bp, n_alloc, col, 1);
+				bipartite_add(bp, n_alloc, col);
 			}
-		}
 
-		/*
-			Put all nodes which live by the constrained instruction also to the
-			allocation bipartite graph. They are considered unconstrained.
-		*/
-		if(perm) {
-			foreach_out_edge(perm, edge) {
-				ir_node *proj = get_edge_src_irn(edge);
+			n_alloc++;
+		}
+	}
 
-				assert(is_Proj(proj));
+	/*
+		Put all nodes which live through the constrained instruction also to the
+		allocation bipartite graph. They are considered unconstrained.
+	*/
+	if(perm != NULL) {
+		foreach_out_edge(perm, edge) {
+			int i;
+			ir_node *proj = get_edge_src_irn(edge);
 
-				if(values_interfere(proj, irn)) {
-					assert(n_alloc < n_regs);
-					alloc_nodes[n_alloc] = proj;
-					pmap_insert(partners, proj, NULL);
+			assert(is_Proj(proj));
 
-					bitset_clear_all(bs);
-					arch_put_non_ignore_regs(aenv, env->cls, bs);
-					bitset_foreach(bs, col)
-						bipartite_add(bp, n_alloc, col);
+			if(!values_interfere(birg, proj, irn) || pmap_contains(partners, proj))
+				continue;
 
-					n_alloc++;
+			/* don't insert a node twice */
+			for(i = 0; i < n_alloc; ++i) {
+				if(alloc_nodes[i] == proj) {
+					break;
 				}
 			}
-		}
-
-		/* Compute a valid register allocation. */
-		bipartite_matching(bp, assignment);
+			if(i < n_alloc)
+				continue;
 
-		/* Assign colors obtained from the matching. */
-		for(i = 0; i < n_alloc; ++i) {
-			const arch_register_t *reg;
-			ir_node *nodes[2];
-			int j;
-
-			assert(assignment[i] >= 0 && "there must have been a register assigned");
-			reg = arch_register_for_index(env->cls, assignment[i]);
 
-			nodes[0] = alloc_nodes[i];
-			nodes[1] = pmap_get(partners, alloc_nodes[i]);
+			assert(n_alloc < n_regs);
 
-			for(j = 0; j < 2; ++j) {
-				if(!nodes[j])
-					continue;
+			alloc_nodes[n_alloc] = proj;
+			pmap_insert(partners, proj, NULL);
 
-				arch_set_irn_register(aenv, nodes[j], reg);
-				pset_hinsert_ptr(alloc_env->pre_colored, nodes[j]);
-				DBG((dbg, LEVEL_2, "\tsetting %+F to register %s\n", nodes[j], reg->name));
+			bitset_clear_all(bs);
+			arch_put_non_ignore_regs(aenv, env->cls, bs);
+			bitset_andnot(bs, env->ignore_colors);
+			bitset_foreach(bs, col) {
+				//hungarian_add(bp, n_alloc, col, 1);
+				bipartite_add(bp, n_alloc, col);
 			}
+
+			n_alloc++;
 		}
+	}
 
+	/* Compute a valid register allocation. */
+#if 0
+	hungarian_prepare_cost_matrix(bp, HUNGARIAN_MODE_MAXIMIZE_UTIL);
+	match_res = hungarian_solve(bp, assignment, &cost, 1);
+	assert(match_res == 0 && "matching failed");
+#else
+	bipartite_matching(bp, assignment);
+#endif
 
-		/* Allocate the non-constrained Projs of the Perm. */
-		if(perm) {
+	/* Assign colors obtained from the matching. */
+	for(i = 0; i < n_alloc; ++i) {
+		const arch_register_t *reg;
+		ir_node *irn;
 
-			bitset_clear_all(bs);
+		assert(assignment[i] >= 0 && "there must have been a register assigned");
+		reg = arch_register_for_index(env->cls, assignment[i]);
+		assert(! (reg->type & arch_register_type_ignore));
 
-			/* Put the colors of all Projs in a bitset. */
-			foreach_out_edge(perm, edge) {
-				ir_node *proj              = get_edge_src_irn(edge);
-				const arch_register_t *reg = arch_get_irn_register(aenv, proj);
+		irn = alloc_nodes[i];
+		if (irn != NULL) {
+			arch_set_irn_register(aenv, irn, reg);
+			(void) pset_hinsert_ptr(alloc_env->pre_colored, irn);
+			DBG((dbg, LEVEL_2, "\tsetting %+F to register %s\n", irn, reg->name));
+		}
 
-				if(reg != NULL)
-					bitset_set(bs, reg->index);
-			}
+		irn = pmap_get(partners, alloc_nodes[i]);
+		if (irn != NULL) {
+			arch_set_irn_register(aenv, irn, reg);
+			(void) pset_hinsert_ptr(alloc_env->pre_colored, irn);
+			DBG((dbg, LEVEL_2, "\tsetting %+F to register %s\n", irn, reg->name));
+		}
+	}
 
-			/* Assign the not yet assigned Projs of the Perm a suitable color. */
-			foreach_out_edge(perm, edge) {
-				ir_node *proj              = get_edge_src_irn(edge);
-				const arch_register_t *reg = arch_get_irn_register(aenv, proj);
+	/* Allocate the non-constrained Projs of the Perm. */
+	if(perm != NULL) {
+		bitset_clear_all(bs);
 
-				DBG((dbg, LEVEL_2, "\tchecking reg of %+F: %s\n", proj, reg ? reg->name : "<none>"));
+		/* Put the colors of all Projs in a bitset. */
+		foreach_out_edge(perm, edge) {
+			ir_node *proj              = get_edge_src_irn(edge);
+			const arch_register_t *reg = arch_get_irn_register(aenv, proj);
 
-				if(reg == NULL) {
-					col = get_next_free_reg(alloc_env, bs);
-					reg = arch_register_for_index(env->cls, col);
-					bitset_set(bs, reg->index);
-					arch_set_irn_register(aenv, proj, reg);
-					pset_insert_ptr(alloc_env->pre_colored, proj);
-					DBG((dbg, LEVEL_2, "\tsetting %+F to register %s\n", proj, reg->name));
-				}
-			}
+			if(reg != NULL)
+				bitset_set(bs, reg->index);
 		}
 
-		pmap_destroy(partners);
+		/* Assign the not yet assigned Projs of the Perm a suitable color. */
+		foreach_out_edge(perm, edge) {
+			ir_node *proj              = get_edge_src_irn(edge);
+			const arch_register_t *reg = arch_get_irn_register(aenv, proj);
+
+			DBG((dbg, LEVEL_2, "\tchecking reg of %+F: %s\n", proj, reg ? reg->name : "<none>"));
+
+			if(reg == NULL) {
+				col = get_next_free_reg(alloc_env, bs);
+				reg = arch_register_for_index(env->cls, col);
+				bitset_set(bs, reg->index);
+				arch_set_irn_register(aenv, proj, reg);
+				pset_insert_ptr(alloc_env->pre_colored, proj);
+				DBG((dbg, LEVEL_2, "\tsetting %+F to register %s\n", proj, reg->name));
+			}
+		}
 	}
 
+	bipartite_free(bp);
+	//hungarian_free(bp);
+	pmap_destroy(partners);
+
 end:
-	obstack_free(&env->obst, base);
+	obstack_free(env->obst, base);
 	return res;
 }
 
 /**
  * Handle constraint nodes in each basic block.
- * be_insert_constr_perms() inserts Perm nodes which perm
+ * handle_constraints() inserts Perm nodes which perm
  * over all values live at the constrained node right in front
  * of the constrained node. These Perms signal a constrained node.
- * For further comments, refer to handle_constraints_at_perm().
+ * For further comments, refer to handle_constraints().
  */
 static void constraints(ir_node *bl, void *data)
 {
-	firm_dbg_module_t *dbg      = firm_dbg_register("firm.be.chordal.constr");
 	be_chordal_alloc_env_t *env = data;
-	arch_env_t *arch_env        = env->chordal_env->birg->main_env->arch_env;
+
+	/*
+		Start silent in the start block.
+		The silence remains until the first barrier is seen.
+		Each other block is begun loud.
+	*/
+	int silent                  = bl == get_irg_start_block(get_irn_irg(bl));
 	ir_node *irn;
 
+	/*
+		If the block is the start block search the barrier and
+		start handling constraints from there.
+	*/
+
 	for(irn = sched_first(bl); !sched_is_end(irn);) {
-		irn = handle_constraints(env, irn);
+		irn = handle_constraints(env, irn, &silent);
 	}
 }
 
@@ -680,23 +776,21 @@ static void pressure(ir_node *block, void *env_ptr)
 
 	be_chordal_alloc_env_t *alloc_env = env_ptr;
 	be_chordal_env_t *env             = alloc_env->chordal_env;
-	const arch_env_t *arch_env        = env->birg->main_env->arch_env;
 	bitset_t *live                    = alloc_env->live;
-	firm_dbg_module_t *dbg            = env->dbg;
 	ir_node *irn;
+	be_lv_t *lv                       = env->birg->lv;
 
 	int i, n;
+	bitset_pos_t elm;
 	unsigned step = 0;
 	unsigned pressure = 0;
 	struct list_head *head;
-	pset *live_in = put_live_in(block, pset_new_ptr_default());
-	pset *live_end = put_live_end(block, pset_new_ptr_default());
 
 	DBG((dbg, LEVEL_1, "Computing pressure in block %+F\n", block));
 	bitset_clear_all(live);
 
 	/* Set up the border list in the block info */
-	head = obstack_alloc(&env->obst, sizeof(*head));
+	head = obstack_alloc(env->obst, sizeof(*head));
 	INIT_LIST_HEAD(head);
 	assert(pmap_get(env->border_heads, block) == NULL);
 	pmap_insert(env->border_heads, block, head);
@@ -705,10 +799,11 @@ static void pressure(ir_node *block, void *env_ptr)
 	 * Make final uses of all values live out of the block.
 	 * They are necessary to build up real intervals.
 	 */
-	for(irn = pset_first(live_end); irn; irn = pset_next(live_end)) {
+	be_lv_foreach(lv, block, be_lv_state_end, i) {
+		ir_node *irn = be_lv_get_irn(lv, block, i);
 		if(has_reg_class(env, irn)) {
-			DBG((dbg, LEVEL_3, "\tMaking live: %+F/%d\n", irn, get_irn_graph_nr(irn)));
-			bitset_set(live, get_irn_graph_nr(irn));
+			DBG((dbg, LEVEL_3, "\tMaking live: %+F/%d\n", irn, get_irn_idx(irn)));
+			bitset_set(live, get_irn_idx(irn));
 			border_use(irn, step, 0);
 		}
 	}
@@ -720,14 +815,33 @@ static void pressure(ir_node *block, void *env_ptr)
 	 */
 	sched_foreach_reverse(block, irn) {
 		DBG((dbg, LEVEL_1, "\tinsn: %+F, pressure: %d\n", irn, pressure));
-		DBG((dbg, LEVEL_2, "\tlive: %b\n", live));
+		DBG((dbg, LEVEL_2, "\tlive: %B\n", live));
+
+		if (get_irn_mode(irn) == mode_T) {
+			const ir_edge_t *edge;
+
+			foreach_out_edge(irn, edge) {
+				ir_node *proj = get_edge_src_irn(edge);
+
+				/*
+				 * If the node defines some value, which can put into a
+				 * register of the current class, make a border for it.
+				 */
+				if(has_reg_class(env, proj)) {
+					int nr = get_irn_idx(proj);
+
+					bitset_clear(live, nr);
+					border_def(proj, step, 1);
+				}
+			}
+		}
 
 		/*
 		 * If the node defines some value, which can put into a
 		 * register of the current class, make a border for it.
 		 */
 		if(has_reg_class(env, irn)) {
-			int nr = get_irn_graph_nr(irn);
+			int nr = get_irn_idx(irn);
 
 			bitset_clear(live, nr);
 			border_def(irn, step, 1);
@@ -741,53 +855,43 @@ static void pressure(ir_node *block, void *env_ptr)
 				ir_node *op = get_irn_n(irn, i);
 
 				if(has_reg_class(env, op)) {
-					int nr = get_irn_graph_nr(op);
-
-					DBG((dbg, LEVEL_4, "\t\tpos: %d, use: %+F\n", i, op));
+					int nr = get_irn_idx(op);
+					const char *msg = "-";
 
 					if(!bitset_is_set(live, nr)) {
 						border_use(op, step, 1);
 						bitset_set(live, nr);
+						msg = "X";
 					}
+
+					DBG((dbg, LEVEL_4, "\t\t%s pos: %d, use: %+F\n", msg, i, op));
 				}
 			}
 		}
 		++step;
 	}
 
-	/*
-	 * Add initial defs for all values live in.
-	 */
-	for(irn = pset_first(live_in); irn; irn = pset_next(live_in)) {
-		if(has_reg_class(env, irn)) {
-
-			/* Mark the value live in. */
-			bitset_set(live, get_irn_graph_nr(irn));
-
-			/* Add the def */
+	bitset_foreach(live, elm) {
+		ir_node *irn = get_idx_irn(env->irg, elm);
+		if (be_is_live_in(lv, block, irn))
 			border_def(irn, step, 0);
-		}
 	}
-
-
-  del_pset(live_in);
-  del_pset(live_end);
 }
 
 static void assign(ir_node *block, void *env_ptr)
 {
 	be_chordal_alloc_env_t *alloc_env = env_ptr;
 	be_chordal_env_t *env       = alloc_env->chordal_env;
-	firm_dbg_module_t *dbg      = env->dbg;
 	bitset_t *live              = alloc_env->live;
 	bitset_t *colors            = alloc_env->colors;
 	bitset_t *in_colors         = alloc_env->in_colors;
 	const arch_env_t *arch_env  = env->birg->main_env->arch_env;
+	struct list_head *head      = get_block_border_head(env, block);
+	be_lv_t *lv                 = env->birg->lv;
 
 	const ir_node *irn;
 	border_t *b;
-	struct list_head *head = get_block_border_head(env, block);
-	pset *live_in = put_live_in(block, pset_new_ptr_default());
+	int idx;
 
 	bitset_clear_all(colors);
 	bitset_clear_all(live);
@@ -797,7 +901,7 @@ static void assign(ir_node *block, void *env_ptr)
 	DBG((dbg, LEVEL_4, "\tusedef chain for block\n"));
 	list_for_each_entry(border_t, b, head, list) {
 		DBG((dbg, LEVEL_4, "\t%s %+F/%d\n", b->is_def ? "def" : "use",
-					b->irn, get_irn_graph_nr(b->irn)));
+					b->irn, get_irn_idx(b->irn)));
 	}
 
 	/*
@@ -805,7 +909,8 @@ static void assign(ir_node *block, void *env_ptr)
 	 * Since their colors have already been assigned (The dominators were
 	 * allocated before), we have to mark their colors as used also.
 	 */
-	for(irn = pset_first(live_in); irn; irn = pset_next(live_in)) {
+	be_lv_foreach(lv, block, be_lv_state_in, idx) {
+		irn = be_lv_get_irn(lv, block, idx);
 		if(has_reg_class(env, irn)) {
 			const arch_register_t *reg = arch_get_irn_register(arch_env, irn);
 			int col;
@@ -813,52 +918,50 @@ static void assign(ir_node *block, void *env_ptr)
 			assert(reg && "Node must have been assigned a register");
 			col = arch_register_get_index(reg);
 
+			DBG((dbg, LEVEL_4, "%+F has reg %s\n", irn, reg->name));
+
 			/* Mark the color of the live in value as used. */
 			bitset_set(colors, col);
 			bitset_set(in_colors, col);
 
 			/* Mark the value live in. */
-			bitset_set(live, get_irn_graph_nr(irn));
+			bitset_set(live, get_irn_idx(irn));
 		}
 	}
 
 	/*
-	 * Mind that the sequence
-	 * of defs from back to front defines a perfect
+	 * Mind that the sequence of defs from back to front defines a perfect
 	 * elimination order. So, coloring the definitions from first to last
 	 * will work.
 	 */
 	list_for_each_entry_reverse(border_t, b, head, list) {
 		ir_node *irn = b->irn;
-		int nr = get_irn_graph_nr(irn);
+		int nr       = get_irn_idx(irn);
+		int ignore   = arch_irn_is(arch_env, irn, ignore);
 
 		/*
 		 * Assign a color, if it is a local def. Global defs already have a
 		 * color.
 		 */
-		if(b->is_def && !is_live_in(block, irn)) {
+		if(b->is_def && !be_is_live_in(lv, block, irn)) {
 			const arch_register_t *reg;
 			int col = NO_COLOR;
 
-			if(pset_find_ptr(alloc_env->pre_colored, irn)) {
+			if(ignore || pset_find_ptr(alloc_env->pre_colored, irn)) {
 				reg = arch_get_irn_register(arch_env, irn);
 				col = reg->index;
 				assert(!bitset_is_set(colors, col) && "pre-colored register must be free");
-			}
-
-			else {
+			} else {
 				col = get_next_free_reg(alloc_env, colors);
 				reg = arch_register_for_index(env->cls, col);
 				assert(arch_get_irn_register(arch_env, irn) == NULL && "This node must not have been assigned a register yet");
+				assert(!arch_register_type_is(reg, ignore) && "Must not assign ignore register");
 			}
 
 			bitset_set(colors, col);
-
-			assert(!arch_register_type_is(reg, ignore) && "Must not assign ignore register");
 			arch_set_irn_register(arch_env, irn, reg);
 
-			DBG((dbg, LEVEL_1, "\tassigning register %s(%d) to %+F\n",
-            arch_register_get_name(reg), col, irn));
+			DBG((dbg, LEVEL_1, "\tassigning register %s(%d) to %+F\n", arch_register_get_name(reg), col, irn));
 
 			assert(!bitset_is_set(live, nr) && "Value's definition must not have been encountered");
 			bitset_set(live, nr);
@@ -872,41 +975,44 @@ static void assign(ir_node *block, void *env_ptr)
 			assert(reg && "Register must have been assigned");
 
 			col = arch_register_get_index(reg);
-			assert(bitset_is_set(live, nr) && "Cannot have a non live use");
+#ifndef NDEBUG
+			if(!arch_register_type_is(reg, ignore)) {
+				assert(bitset_is_set(live, nr) && "Cannot have a non live use");
+			}
+#endif
 
 			bitset_clear(colors, col);
 			bitset_clear(live, nr);
 		}
 	}
-
-	del_pset(live_in);
 }
 
 void be_ra_chordal_color(be_chordal_env_t *chordal_env)
 {
 	be_chordal_alloc_env_t env;
 	char buf[256];
-	int i;
+	be_lv_t *lv;
+	be_irg_t *birg = chordal_env->birg;
+	const arch_register_class_t *cls = chordal_env->cls;
 
-	int colors_n          = arch_register_class_n_regs(chordal_env->cls);
+	int colors_n          = arch_register_class_n_regs(cls);
 	ir_graph *irg         = chordal_env->irg;
 
+	be_assure_dom_front(birg);
+	lv = be_assure_liveness(birg);
+	be_liveness_assure_sets(lv);
+	be_liveness_assure_chk(lv);
 
-	if(get_irg_dom_state(irg) != dom_consistent)
-		compute_doms(irg);
+	assure_doms(irg);
 
 	env.chordal_env   = chordal_env;
 	env.colors_n      = colors_n;
 	env.colors        = bitset_alloca(colors_n);
 	env.tmp_colors    = bitset_alloca(colors_n);
 	env.in_colors     = bitset_alloca(colors_n);
-	env.ignore_regs   = bitset_alloca(colors_n);
 	env.pre_colored   = pset_new_ptr_default();
-	env.constr_dbg    = firm_dbg_register("firm.be.chordal.constr");
 
-	for(i = 0; i < colors_n; ++i)
-		if(arch_register_type_is(&chordal_env->cls->regs[i], ignore))
-			bitset_set(env.ignore_regs, i);
+	BE_TIMER_PUSH(t_constr);
 
 	/* Handle register targeting constraints */
 	dom_tree_walk_irg(irg, constraints, NULL, &env);
@@ -916,8 +1022,9 @@ void be_ra_chordal_color(be_chordal_env_t *chordal_env)
 		be_dump(chordal_env->irg, buf, dump_ir_block_graph_sched);
 	}
 
-	be_numbering(irg);
-	env.live = bitset_malloc(get_graph_node_count(chordal_env->irg));
+	BE_TIMER_POP(t_constr);
+
+	env.live = bitset_malloc(get_irg_last_idx(chordal_env->irg));
 
 	/* First, determine the pressure */
 	dom_tree_walk_irg(irg, pressure, NULL, &env);
@@ -925,15 +1032,21 @@ void be_ra_chordal_color(be_chordal_env_t *chordal_env)
 	/* Assign the colors */
 	dom_tree_walk_irg(irg, assign, NULL, &env);
 
-	be_numbering_done(irg);
-
 	if(chordal_env->opts->dump_flags & BE_CH_DUMP_TREE_INTV) {
-    	plotter_t *plotter;
+		plotter_t *plotter;
 		ir_snprintf(buf, sizeof(buf), "ifg_%s_%F.eps", chordal_env->cls->name, irg);
-    	plotter = new_plotter_ps(buf);
-    	draw_interval_tree(&draw_chordal_def_opts, chordal_env, plotter);
-    	plotter_free(plotter);
+		plotter = new_plotter_ps(buf);
+		draw_interval_tree(&draw_chordal_def_opts, chordal_env, plotter);
+		plotter_free(plotter);
 	}
 
+	bitset_free(env.live);
 	del_pset(env.pre_colored);
 }
+
+void be_init_chordal(void)
+{
+	FIRM_DBG_REGISTER(dbg, "firm.be.chordal");
+}
+
+BE_REGISTER_MODULE_CONSTRUCTOR(be_init_chordal);