X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fbechordal.c;h=f0731d6a7495f5cf867693b1e3f62f53963b3668;hb=5cb14f12bacb0c7d1c646112b4660d57e14236a2;hp=c3d34e1c68329aaf934c58dfe6ea6865452802f6;hpb=911aeb8c7d16bc3bdbd58ff47da1ff75cfd5865d;p=libfirm diff --git a/ir/be/bechordal.c b/ir/be/bechordal.c index c3d34e1c6..f0731d6a7 100644 --- a/ir/be/bechordal.c +++ b/ir/be/bechordal.c @@ -1,22 +1,31 @@ -/** - * Chordal register allocation. - * @author Sebastian Hack - * @date 8.12.2004 - * @cvs-id $Id$ +/* + * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved. + * + * This file is part of libFirm. + * + * This file may be distributed and/or modified under the terms of the + * GNU General Public License version 2 as published by the Free Software + * Foundation and appearing in the file LICENSE.GPL included in the + * packaging of this file. * - * Copyright (C) Universitaet Karlsruhe - * Released under the GPL + * Licensees holding valid libFirm Professional Edition licenses may use + * this file in accordance with the libFirm Commercial License. + * Agreement provided with the Software. + * + * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE + * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE. */ -#ifdef HAVE_CONFIG_H -#include -#endif - -#ifdef HAVE_MALLOC_H -#include -#endif -#ifdef HAVE_ALLOCA_H -#include +/** + * @file + * @brief Chordal register allocation. + * @author Sebastian Hack + * @date 08.12.2004 + * @version $Id$ + */ +#ifdef HAVE_CONFIG_H +#include "config.h" #endif #include @@ -25,6 +34,7 @@ #include "pset.h" #include "list.h" #include "bitset.h" +#include "raw_bitset.h" #include "iterator.h" #include "bipartite.h" #include "hungarian.h" @@ -36,26 +46,29 @@ #include "irdump.h" #include "irdom.h" #include "irtools.h" +#include "irbitset.h" #include "debug.h" #include "xmalloc.h" +#include "iredges.h" #include "beutil.h" #include "besched.h" #include "besched_t.h" #include "belive_t.h" #include "benode_t.h" -#include "bearch.h" +#include "bearch_t.h" #include "beirgmod.h" #include "beifg.h" #include "beinsn_t.h" #include "bestatevent.h" #include "beirg_t.h" - +#include "beintlive_t.h" +#include "bera.h" #include "bechordal_t.h" #include "bechordal_draw.h" +#include "bemodule.h" -#define DBG_LEVEL SET_LEVEL_0 -#define DBG_LEVEL_CHECK SET_LEVEL_0 +DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;) #define NO_COLOR (-1) @@ -64,13 +77,12 @@ typedef struct _be_chordal_alloc_env_t { be_chordal_env_t *chordal_env; - pset *pre_colored; /**< Set of precolored nodes. */ - bitset_t *live; /**< A liveness bitset. */ - bitset_t *tmp_colors; /**< An auxiliary bitset which is as long as the number of colors in the class. */ - bitset_t *colors; /**< The color mask. */ - bitset_t *in_colors; /**< Colors used by live in values. */ - int colors_n; /**< The number of colors. */ - DEBUG_ONLY(firm_dbg_module_t *constr_dbg;) /**< Debug output for the constraint handler. */ + pset *pre_colored; /**< Set of precolored nodes. */ + bitset_t *live; /**< A liveness bitset. */ + bitset_t *tmp_colors; /**< An auxiliary bitset which is as long as the number of colors in the class. */ + bitset_t *colors; /**< The color mask. */ + bitset_t *in_colors; /**< Colors used by live in values. */ + int colors_n; /**< The number of colors. */ } be_chordal_alloc_env_t; #include "fourcc.h" @@ -118,10 +130,10 @@ static INLINE border_t *border_add(be_chordal_env_t *env, struct list_head *head if(!is_def) { border_t *def; - b = obstack_alloc(&env->obst, sizeof(*b)); + b = obstack_alloc(env->obst, sizeof(*b)); /* also allocate the def and tie it to the use. */ - def = obstack_alloc(&env->obst, sizeof(*def)); + def = obstack_alloc(env->obst, sizeof(*def)); memset(def, 0, sizeof(*def)); b->other_end = def; def->other_end = b; @@ -145,7 +157,7 @@ static INLINE border_t *border_add(be_chordal_env_t *env, struct list_head *head else { b = get_irn_link(irn); - assert(b && b->magic == BORDER_FOURCC && "Illegal border encountered"); + DEBUG_ONLY(assert(b && b->magic == BORDER_FOURCC && "Illegal border encountered")); } b->pressure = pressure; @@ -154,7 +166,7 @@ static INLINE border_t *border_add(be_chordal_env_t *env, struct list_head *head b->irn = irn; b->step = step; list_add_tail(&b->list, head); - DBG((env->dbg, LEVEL_5, "\t\t%s adding %+F, step: %d\n", is_def ? "def" : "use", irn, step)); + DBG((dbg, LEVEL_5, "\t\t%s adding %+F, step: %d\n", is_def ? "def" : "use", irn, step)); return b; @@ -168,8 +180,7 @@ static INLINE border_t *border_add(be_chordal_env_t *env, struct list_head *head */ static INLINE int has_reg_class(const be_chordal_env_t *env, const ir_node *irn) { - return arch_irn_has_reg_class(env->birg->main_env->arch_env, irn, -1, env->cls); - // return arch_irn_consider_in_reg_alloc(env->birg->main_env->arch_env, env->cls, irn); + return arch_irn_consider_in_reg_alloc(env->birg->main_env->arch_env, env->cls, irn); } #define has_limited_constr(req, irn) \ @@ -197,7 +208,7 @@ static bitset_t *get_decisive_partner_regs(bitset_t *bs, const be_operand_t *o1, return bs; } - assert(o1->req.cls == o2->req.cls); + assert(o1->req->cls == o2->req->cls || ! o1->req->cls || ! o2->req->cls); if(bitset_contains(o1->regs, o2->regs)) bitset_copy(bs, o1->regs); @@ -215,16 +226,17 @@ static be_insn_t *chordal_scan_insn(be_chordal_env_t *env, ir_node *irn) ie.ignore_colors = env->ignore_colors; ie.aenv = env->birg->main_env->arch_env; - ie.obst = &env->obst; + ie.obst = env->obst; ie.cls = env->cls; return be_scan_insn(&ie, irn); } static ir_node *prepare_constr_insn(be_chordal_env_t *env, ir_node *irn) { - const arch_env_t *aenv = env->birg->main_env->arch_env; - bitset_t *def_constr = bitset_alloca(env->cls->n_regs); + const be_irg_t *birg = env->birg; + const arch_env_t *aenv = birg->main_env->arch_env; bitset_t *tmp = bitset_alloca(env->cls->n_regs); + bitset_t *def_constr = bitset_alloca(env->cls->n_regs); ir_node *bl = get_nodes_block(irn); be_lv_t *lv = env->birg->lv; @@ -233,9 +245,9 @@ static ir_node *prepare_constr_insn(be_chordal_env_t *env, ir_node *irn) for (i = get_irn_arity(irn) - 1; i >= 0; --i) { ir_node *op = get_irn_n(irn, i); - + ir_node *copy; const arch_register_t *reg; - arch_register_req_t req; + const arch_register_req_t *req; if (arch_get_irn_reg_class(aenv, irn, i) != env->cls) continue; @@ -247,23 +259,19 @@ static ir_node *prepare_constr_insn(be_chordal_env_t *env, ir_node *irn) if(arch_register_type_is(reg, joker)) continue; - arch_get_register_req(aenv, &req, irn, i); - - if (!arch_register_req_is(&req, limited)) + req = arch_get_register_req(aenv, irn, i); + if (!arch_register_req_is(req, limited)) continue; - bitset_clear_all(tmp); - req.limited(req.limited_env, tmp); - - if (bitset_is_set(tmp, reg->index)) + if (rbitset_is_set(req->limited, reg->index)) continue; - ir_node *copy = be_new_Copy(env->cls, env->irg, bl, op); + copy = be_new_Copy(env->cls, env->irg, bl, op); be_stat_ev("constr_copy", 1); sched_add_before(irn, copy); set_irn_n(irn, i, copy); - DBG((env->dbg, LEVEL_3, "inserting ignore arg copy %+F for %+F pos %d\n", copy, irn, i)); + DBG((dbg, LEVEL_3, "inserting ignore arg copy %+F for %+F pos %d\n", copy, irn, i)); } insn = chordal_scan_insn(env, irn); @@ -275,23 +283,34 @@ static ir_node *prepare_constr_insn(be_chordal_env_t *env, ir_node *irn) for(i = insn->use_start; i < insn->n_ops; ++i) { be_operand_t *op = &insn->ops[i]; - if(op->has_constraints) { - for(j = i + 1; j < insn->n_ops; ++j) { - be_operand_t *a_op = &insn->ops[j]; + if(!op->has_constraints) + continue; - if(a_op->carrier == op->carrier && a_op->has_constraints) { - ir_node *copy = be_new_Copy(env->cls, env->irg, bl, op->carrier); - be_stat_ev("constr_copy", 1); + for(j = i + 1; j < insn->n_ops; ++j) { + ir_node *copy; + be_operand_t *a_op = &insn->ops[j]; - sched_add_before(insn->irn, copy); - set_irn_n(insn->irn, a_op->pos, copy); - DBG((env->dbg, LEVEL_3, "inserting multiple constr copy %+F for %+F pos %d\n", copy, insn->irn, a_op->pos)); - } - } + if(a_op->carrier != op->carrier || !a_op->has_constraints) + continue; + + /* if the constraint is the same, no copy is necessary + * TODO generalise unequal but overlapping constraints */ + if (a_op->req == op->req) + continue; + + if (be_is_Copy(get_irn_n(insn->irn, a_op->pos))) + continue; + + copy = be_new_Copy(env->cls, env->irg, bl, op->carrier); + be_stat_ev("constr_copy", 1); + + sched_add_before(insn->irn, copy); + set_irn_n(insn->irn, a_op->pos, copy); + DBG((dbg, LEVEL_3, "inserting multiple constr copy %+F for %+F pos %d\n", copy, insn->irn, a_op->pos)); } } - /* collect all registers occuring in out constraints. */ + /* collect all registers occurring in out constraints. */ for(i = 0; i < insn->use_start; ++i) { be_operand_t *op = &insn->ops[i]; if(op->has_constraints) @@ -303,6 +322,7 @@ static ir_node *prepare_constr_insn(be_chordal_env_t *env, ir_node *irn) and being constrained to a register which also occurs in out constraints. */ for(i = insn->use_start; i < insn->n_ops; ++i) { + ir_node *copy; be_operand_t *op = &insn->ops[i]; bitset_copy(tmp, op->regs); @@ -312,31 +332,32 @@ static ir_node *prepare_constr_insn(be_chordal_env_t *env, ir_node *irn) Check, if 1) the operand is constrained. 2) lives through the node. - 3) is constrained to a register occuring in out constraints. + 3) is constrained to a register occurring in out constraints. */ if(!op->has_constraints || - !values_interfere(lv, insn->irn, op->carrier) || - bitset_popcnt(tmp) == 0) + !values_interfere(birg, insn->irn, op->carrier) || + bitset_popcnt(tmp) == 0) continue; /* only create the copy if the operand is no copy. this is necessary since the assure constraints phase inserts - Copies and Keeps for operands which must be different from the results. - Additional copies here would destroy this. + Copies and Keeps for operands which must be different from the + results. Additional copies here would destroy this. */ - if(!be_is_Copy(op->carrier)) { - ir_node *copy = be_new_Copy(env->cls, env->irg, bl, op->carrier); + if (be_is_Copy(get_irn_n(insn->irn, op->pos))) + continue; - sched_add_before(insn->irn, copy); - set_irn_n(insn->irn, op->pos, copy); - DBG((env->dbg, LEVEL_3, "inserting constr copy %+F for %+F pos %d\n", copy, insn->irn, op->pos)); - be_liveness_update(lv, op->carrier); - } + copy = be_new_Copy(env->cls, env->irg, bl, op->carrier); + + sched_add_before(insn->irn, copy); + set_irn_n(insn->irn, op->pos, copy); + DBG((dbg, LEVEL_3, "inserting constr copy %+F for %+F pos %d\n", copy, insn->irn, op->pos)); + be_liveness_update(lv, op->carrier); } end: - obstack_free(&env->obst, insn); + obstack_free(env->obst, insn); return insn->next_insn; } @@ -361,7 +382,6 @@ static void pair_up_operands(const be_chordal_alloc_env_t *alloc_env, be_insn_t int n_defs = be_insn_n_defs(insn); bitset_t *bs = bitset_alloca(env->cls->n_regs); int *pairing = alloca(MAX(n_defs, n_uses) * sizeof(pairing[0])); - be_lv_t *lv = env->birg->lv; int i, j; @@ -379,21 +399,29 @@ static void pair_up_operands(const be_chordal_alloc_env_t *alloc_env, be_insn_t int n_total; const be_operand_t *op = &insn->ops[i]; - if (! values_interfere(lv, op->irn, op->carrier) && ! op->partner) { - bitset_clear_all(bs); - bitset_copy(bs, op->regs); - bitset_and(bs, out_op->regs); - n_total = bitset_popcnt(op->regs) + bitset_popcnt(out_op->regs); + if (op->partner != NULL) + continue; + if (values_interfere(env->birg, op->irn, op->carrier)) + continue; - if (bitset_popcnt(bs) > 0 && n_total < smallest_n_regs) { - smallest = i; - smallest_n_regs = n_total; - } + bitset_clear_all(bs); + bitset_copy(bs, op->regs); + bitset_and(bs, out_op->regs); + n_total = bitset_popcnt(op->regs) + bitset_popcnt(out_op->regs); + + if (bitset_popcnt(bs) > 0 && n_total < smallest_n_regs) { + smallest = i; + smallest_n_regs = n_total; } } if (smallest >= 0) { be_operand_t *partner = &insn->ops[smallest]; + for(i = insn->use_start; i < insn->n_ops; ++i) { + if(insn->ops[i].carrier == partner->carrier) + insn->ops[i].partner = out_op; + } + out_op->partner = partner; partner->partner = out_op; } @@ -401,19 +429,15 @@ static void pair_up_operands(const be_chordal_alloc_env_t *alloc_env, be_insn_t } -static ir_node *pre_process_constraints(be_chordal_alloc_env_t *alloc_env, be_insn_t **the_insn) +static ir_node *pre_process_constraints(be_chordal_alloc_env_t *alloc_env, + be_insn_t **the_insn) { be_chordal_env_t *env = alloc_env->chordal_env; const arch_env_t *aenv = env->birg->main_env->arch_env; be_insn_t *insn = *the_insn; - ir_node *bl = get_nodes_block(insn->irn); - ir_node *copy = NULL; ir_node *perm = NULL; bitset_t *out_constr = bitset_alloca(env->cls->n_regs); - bitset_t *bs = bitset_alloca(env->cls->n_regs); - be_lv_t *lv = env->birg->lv; - DEBUG_ONLY(firm_dbg_module_t *dbg = alloc_env->constr_dbg;) - + const ir_edge_t *edge; int i; assert(insn->has_constraints && "only do this for constrained nodes"); @@ -430,64 +454,71 @@ static ir_node *pre_process_constraints(be_chordal_alloc_env_t *alloc_env, be_in bitset_or(out_constr, op->regs); } - (void) bl; - (void) copy; - (void) bs; - DEBUG_ONLY((void) dbg;) - /* Make the Perm, recompute liveness and re-scan the insn since the in operands are now the Projs of the Perm. */ - perm = insert_Perm_after(aenv, lv, env->cls, env->birg->dom_front, sched_prev(insn->irn)); + perm = insert_Perm_after(env->birg, env->cls, sched_prev(insn->irn)); /* Registers are propagated by insert_Perm_after(). Clean them here! */ - if(perm) { - const ir_edge_t *edge; + if(perm == NULL) + return NULL; - be_stat_ev("constr_perm", get_irn_arity(perm)); - foreach_out_edge(perm, edge) { - ir_node *proj = get_edge_src_irn(edge); - arch_set_irn_register(aenv, proj, NULL); - } + be_stat_ev("constr_perm", get_irn_arity(perm)); + foreach_out_edge(perm, edge) { + ir_node *proj = get_edge_src_irn(edge); + arch_set_irn_register(aenv, proj, NULL); + } - /* - We also have to re-build the insn since the input operands are now the Projs of - the Perm. Recomputing liveness is also a good idea if a Perm is inserted, since - the live sets may change. - */ - // be_liveness_recompute(lv); - obstack_free(&env->obst, insn); - *the_insn = insn = chordal_scan_insn(env, insn->irn); + /* + We also have to re-build the insn since the input operands are now the Projs of + the Perm. Recomputing liveness is also a good idea if a Perm is inserted, since + the live sets may change. + */ + obstack_free(env->obst, insn); + *the_insn = insn = chordal_scan_insn(env, insn->irn); + /* + Copy the input constraints of the insn to the Perm as output + constraints. Succeeding phases (coalescing) will need that. + */ + for(i = insn->use_start; i < insn->n_ops; ++i) { + be_operand_t *op = &insn->ops[i]; + ir_node *proj = op->carrier; /* - Copy the input constraints of the insn to the Perm as output - constraints. Succeeding phases (coalescing will need that). + Note that the predecessor must not be a Proj of the Perm, + since ignore-nodes are not Perm'ed. */ - for(i = insn->use_start; i < insn->n_ops; ++i) { - be_operand_t *op = &insn->ops[i]; - ir_node *proj = op->carrier; - /* - Note that the predecessor must not be a Proj of the Perm, - since ignore-nodes are not Perm'ed. - */ - if(op->has_constraints && is_Proj(proj) && get_Proj_pred(proj) == perm) { - be_set_constr_limited(perm, BE_OUT_POS(get_Proj_proj(proj)), &op->req); - } + if(op->has_constraints && is_Proj(proj) && get_Proj_pred(proj) == perm) { + be_set_constr_limited(perm, BE_OUT_POS(get_Proj_proj(proj)), op->req); } } return perm; } -static ir_node *handle_constraints(be_chordal_alloc_env_t *alloc_env, ir_node *irn, int *silent) +static ir_node *handle_constraints(be_chordal_alloc_env_t *alloc_env, + ir_node *irn, int *silent) { + const arch_env_t *aenv; + int n_regs; + bitset_t *bs; + ir_node **alloc_nodes; + //hungarian_problem_t *bp; + int *assignment; + pmap *partners; + int i, n_alloc; + bitset_pos_t col; + const ir_edge_t *edge; + ir_node *perm = NULL; + //int match_res, cost; be_chordal_env_t *env = alloc_env->chordal_env; - void *base = obstack_base(&env->obst); + void *base = obstack_base(env->obst); be_insn_t *insn = chordal_scan_insn(env, irn); ir_node *res = insn->next_insn; int be_silent = *silent; - be_lv_t *lv = env->birg->lv; + be_irg_t *birg = env->birg; + bipartite_t *bp; if(insn->pre_colored) { int i; @@ -512,161 +543,189 @@ static ir_node *handle_constraints(be_chordal_alloc_env_t *alloc_env, ir_node *i Perms inserted before the constraint handling phase are considered to be correctly precolored. These Perms arise during the ABI handling phase. */ - if(insn->has_constraints) { - const arch_env_t *aenv = env->birg->main_env->arch_env; - int n_regs = env->cls->n_regs; - bitset_t *bs = bitset_alloca(n_regs); - ir_node **alloc_nodes = alloca(n_regs * sizeof(alloc_nodes[0])); - hungarian_problem_t *bp= hungarian_new(n_regs, n_regs, 2, HUNGARIAN_MATCH_PERFECT); -// bipartite_t *bp = bipartite_new(n_regs, n_regs); - int *assignment = alloca(n_regs * sizeof(assignment[0])); - pmap *partners = pmap_create(); - DEBUG_ONLY(firm_dbg_module_t *dbg = alloc_env->constr_dbg;) - - int i, n_alloc; - long col; - const ir_edge_t *edge; - ir_node *perm = NULL; - int match_res, cost; + if(!insn->has_constraints) + goto end; - /* - prepare the constraint handling of this node. - Perms are constructed and Copies are created for constrained values - interfering with the instruction. - */ - perm = pre_process_constraints(alloc_env, &insn); + aenv = env->birg->main_env->arch_env; + n_regs = env->cls->n_regs; + bs = bitset_alloca(n_regs); + alloc_nodes = alloca(n_regs * sizeof(alloc_nodes[0])); + //bp = hungarian_new(n_regs, n_regs, 2, HUNGARIAN_MATCH_PERFECT); + bp = bipartite_new(n_regs, n_regs); + assignment = alloca(n_regs * sizeof(assignment[0])); + partners = pmap_create(); - /* find suitable in operands to the out operands of the node. */ - pair_up_operands(alloc_env, insn); + /* + prepare the constraint handling of this node. + Perms are constructed and Copies are created for constrained values + interfering with the instruction. + */ + perm = pre_process_constraints(alloc_env, &insn); - /* - look at the in/out operands and add each operand (and its possible partner) - to a bipartite graph (left: nodes with partners, right: admissible colors). - */ - for(i = 0, n_alloc = 0; i < insn->n_ops; ++i) { - be_operand_t *op = &insn->ops[i]; + /* find suitable in operands to the out operands of the node. */ + pair_up_operands(alloc_env, insn); - /* - If the operand has no partner or the partner has not been marked - for allocation, determine the admissible registers and mark it - for allocation by associating the node and its partner with the - set of admissible registers via a bipartite graph. - */ - if(!op->partner || !pmap_contains(partners, op->partner->carrier)) { + /* + look at the in/out operands and add each operand (and its possible partner) + to a bipartite graph (left: nodes with partners, right: admissible colors). + */ + for(i = 0, n_alloc = 0; i < insn->n_ops; ++i) { + be_operand_t *op = &insn->ops[i]; - pmap_insert(partners, op->carrier, op->partner ? op->partner->carrier : NULL); - alloc_nodes[n_alloc] = op->carrier; + /* + If the operand has no partner or the partner has not been marked + for allocation, determine the admissible registers and mark it + for allocation by associating the node and its partner with the + set of admissible registers via a bipartite graph. + */ + if(!op->partner || !pmap_contains(partners, op->partner->carrier)) { + ir_node *partner = op->partner ? op->partner->carrier : NULL; + int i; + + pmap_insert(partners, op->carrier, partner); + if(partner != NULL) + pmap_insert(partners, partner, op->carrier); + + /* don't insert a node twice */ + for(i = 0; i < n_alloc; ++i) { + if(alloc_nodes[i] == op->carrier) { + break; + } + } + if(i < n_alloc) + continue; - DBG((dbg, LEVEL_2, "\tassociating %+F and %+F\n", op->carrier, op->partner ? op->partner->carrier : NULL)); + alloc_nodes[n_alloc] = op->carrier; - bitset_clear_all(bs); - get_decisive_partner_regs(bs, op, op->partner); + DBG((dbg, LEVEL_2, "\tassociating %+F and %+F\n", op->carrier, + partner)); - DBG((dbg, LEVEL_2, "\tallowed registers for %+F: %B\n", op->carrier, bs)); + bitset_clear_all(bs); + get_decisive_partner_regs(bs, op, op->partner); - bitset_foreach(bs, col) - hungarian_add(bp, n_alloc, col, 1); -// bipartite_add(bp, n_alloc, col); + DBG((dbg, LEVEL_2, "\tallowed registers for %+F: %B\n", op->carrier, + bs)); - n_alloc++; + bitset_foreach(bs, col) { + //hungarian_add(bp, n_alloc, col, 1); + bipartite_add(bp, n_alloc, col); } - } - /* - Put all nodes which live through the constrained instruction also to the - allocation bipartite graph. They are considered unconstrained. - */ - if(perm) { - foreach_out_edge(perm, edge) { - ir_node *proj = get_edge_src_irn(edge); + n_alloc++; + } + } - assert(is_Proj(proj)); + /* + Put all nodes which live through the constrained instruction also to the + allocation bipartite graph. They are considered unconstrained. + */ + if(perm != NULL) { + foreach_out_edge(perm, edge) { + int i; + ir_node *proj = get_edge_src_irn(edge); - if(values_interfere(lv, proj, irn) && !pmap_contains(partners, proj)) { - assert(n_alloc < n_regs); - alloc_nodes[n_alloc] = proj; - pmap_insert(partners, proj, NULL); + assert(is_Proj(proj)); - bitset_clear_all(bs); - arch_put_non_ignore_regs(aenv, env->cls, bs); - bitset_andnot(bs, env->ignore_colors); - bitset_foreach(bs, col) - hungarian_add(bp, n_alloc, col, 1); -// bipartite_add(bp, n_alloc, col); + if(!values_interfere(birg, proj, irn) || pmap_contains(partners, proj)) + continue; - n_alloc++; + /* don't insert a node twice */ + for(i = 0; i < n_alloc; ++i) { + if(alloc_nodes[i] == proj) { + break; } } - } - - /* Compute a valid register allocation. */ - hungarian_prepare_cost_matrix(bp, HUNGARIAN_MODE_MAXIMIZE_UTIL); - match_res = hungarian_solve(bp, assignment, &cost, 1); - assert(match_res == 0 && "matching failed"); - //bipartite_matching(bp, assignment); + if(i < n_alloc) + continue; - /* Assign colors obtained from the matching. */ - for(i = 0; i < n_alloc; ++i) { - const arch_register_t *reg; - ir_node *nodes[2]; - int j; - - assert(assignment[i] >= 0 && "there must have been a register assigned"); - reg = arch_register_for_index(env->cls, assignment[i]); - nodes[0] = alloc_nodes[i]; - nodes[1] = pmap_get(partners, alloc_nodes[i]); + assert(n_alloc < n_regs); - for(j = 0; j < 2; ++j) { - if(!nodes[j]) - continue; + alloc_nodes[n_alloc] = proj; + pmap_insert(partners, proj, NULL); - arch_set_irn_register(aenv, nodes[j], reg); - (void) pset_hinsert_ptr(alloc_env->pre_colored, nodes[j]); - DBG((dbg, LEVEL_2, "\tsetting %+F to register %s\n", nodes[j], reg->name)); + bitset_clear_all(bs); + arch_put_non_ignore_regs(aenv, env->cls, bs); + bitset_andnot(bs, env->ignore_colors); + bitset_foreach(bs, col) { + //hungarian_add(bp, n_alloc, col, 1); + bipartite_add(bp, n_alloc, col); } + + n_alloc++; } + } + /* Compute a valid register allocation. */ +#if 0 + hungarian_prepare_cost_matrix(bp, HUNGARIAN_MODE_MAXIMIZE_UTIL); + match_res = hungarian_solve(bp, assignment, &cost, 1); + assert(match_res == 0 && "matching failed"); +#else + bipartite_matching(bp, assignment); +#endif - /* Allocate the non-constrained Projs of the Perm. */ - if(perm) { + /* Assign colors obtained from the matching. */ + for(i = 0; i < n_alloc; ++i) { + const arch_register_t *reg; + ir_node *irn; - bitset_clear_all(bs); + assert(assignment[i] >= 0 && "there must have been a register assigned"); + reg = arch_register_for_index(env->cls, assignment[i]); + assert(! (reg->type & arch_register_type_ignore)); - /* Put the colors of all Projs in a bitset. */ - foreach_out_edge(perm, edge) { - ir_node *proj = get_edge_src_irn(edge); - const arch_register_t *reg = arch_get_irn_register(aenv, proj); + irn = alloc_nodes[i]; + if (irn != NULL) { + arch_set_irn_register(aenv, irn, reg); + (void) pset_hinsert_ptr(alloc_env->pre_colored, irn); + DBG((dbg, LEVEL_2, "\tsetting %+F to register %s\n", irn, reg->name)); + } - if(reg != NULL) - bitset_set(bs, reg->index); - } + irn = pmap_get(partners, alloc_nodes[i]); + if (irn != NULL) { + arch_set_irn_register(aenv, irn, reg); + (void) pset_hinsert_ptr(alloc_env->pre_colored, irn); + DBG((dbg, LEVEL_2, "\tsetting %+F to register %s\n", irn, reg->name)); + } + } - /* Assign the not yet assigned Projs of the Perm a suitable color. */ - foreach_out_edge(perm, edge) { - ir_node *proj = get_edge_src_irn(edge); - const arch_register_t *reg = arch_get_irn_register(aenv, proj); + /* Allocate the non-constrained Projs of the Perm. */ + if(perm != NULL) { + bitset_clear_all(bs); - DBG((dbg, LEVEL_2, "\tchecking reg of %+F: %s\n", proj, reg ? reg->name : "")); + /* Put the colors of all Projs in a bitset. */ + foreach_out_edge(perm, edge) { + ir_node *proj = get_edge_src_irn(edge); + const arch_register_t *reg = arch_get_irn_register(aenv, proj); - if(reg == NULL) { - col = get_next_free_reg(alloc_env, bs); - reg = arch_register_for_index(env->cls, col); - bitset_set(bs, reg->index); - arch_set_irn_register(aenv, proj, reg); - pset_insert_ptr(alloc_env->pre_colored, proj); - DBG((dbg, LEVEL_2, "\tsetting %+F to register %s\n", proj, reg->name)); - } - } + if(reg != NULL) + bitset_set(bs, reg->index); } - //bipartite_free(bp); - hungarian_free(bp); - pmap_destroy(partners); + /* Assign the not yet assigned Projs of the Perm a suitable color. */ + foreach_out_edge(perm, edge) { + ir_node *proj = get_edge_src_irn(edge); + const arch_register_t *reg = arch_get_irn_register(aenv, proj); + + DBG((dbg, LEVEL_2, "\tchecking reg of %+F: %s\n", proj, reg ? reg->name : "")); + + if(reg == NULL) { + col = get_next_free_reg(alloc_env, bs); + reg = arch_register_for_index(env->cls, col); + bitset_set(bs, reg->index); + arch_set_irn_register(aenv, proj, reg); + pset_insert_ptr(alloc_env->pre_colored, proj); + DBG((dbg, LEVEL_2, "\tsetting %+F to register %s\n", proj, reg->name)); + } + } } + bipartite_free(bp); + //hungarian_free(bp); + pmap_destroy(partners); + end: - obstack_free(&env->obst, base); + obstack_free(env->obst, base); return res; } @@ -720,20 +779,18 @@ static void pressure(ir_node *block, void *env_ptr) bitset_t *live = alloc_env->live; ir_node *irn; be_lv_t *lv = env->birg->lv; - DEBUG_ONLY(firm_dbg_module_t *dbg = env->dbg;) int i, n; + bitset_pos_t elm; unsigned step = 0; unsigned pressure = 0; struct list_head *head; - pset *live_in = be_lv_pset_put_in(lv, block, pset_new_ptr_default()); - pset *live_end = be_lv_pset_put_end(lv, block, pset_new_ptr_default()); DBG((dbg, LEVEL_1, "Computing pressure in block %+F\n", block)); bitset_clear_all(live); /* Set up the border list in the block info */ - head = obstack_alloc(&env->obst, sizeof(*head)); + head = obstack_alloc(env->obst, sizeof(*head)); INIT_LIST_HEAD(head); assert(pmap_get(env->border_heads, block) == NULL); pmap_insert(env->border_heads, block, head); @@ -742,7 +799,8 @@ static void pressure(ir_node *block, void *env_ptr) * Make final uses of all values live out of the block. * They are necessary to build up real intervals. */ - foreach_pset(live_end, irn) { + be_lv_foreach(lv, block, be_lv_state_end, i) { + ir_node *irn = be_lv_get_irn(lv, block, i); if(has_reg_class(env, irn)) { DBG((dbg, LEVEL_3, "\tMaking live: %+F/%d\n", irn, get_irn_idx(irn))); bitset_set(live, get_irn_idx(irn)); @@ -759,6 +817,25 @@ static void pressure(ir_node *block, void *env_ptr) DBG((dbg, LEVEL_1, "\tinsn: %+F, pressure: %d\n", irn, pressure)); DBG((dbg, LEVEL_2, "\tlive: %B\n", live)); + if (get_irn_mode(irn) == mode_T) { + const ir_edge_t *edge; + + foreach_out_edge(irn, edge) { + ir_node *proj = get_edge_src_irn(edge); + + /* + * If the node defines some value, which can put into a + * register of the current class, make a border for it. + */ + if(has_reg_class(env, proj)) { + int nr = get_irn_idx(proj); + + bitset_clear(live, nr); + border_def(proj, step, 1); + } + } + } + /* * If the node defines some value, which can put into a * register of the current class, make a border for it. @@ -794,22 +871,11 @@ static void pressure(ir_node *block, void *env_ptr) ++step; } - /* - * Add initial defs for all values live in. - */ - foreach_pset(live_in, irn) { - if(has_reg_class(env, irn)) { - - /* Mark the value live in. */ - bitset_set(live, get_irn_idx(irn)); - - /* Add the def */ + bitset_foreach(live, elm) { + ir_node *irn = get_idx_irn(env->irg, elm); + if (be_is_live_in(lv, block, irn)) border_def(irn, step, 0); - } } - - del_pset(live_in); - del_pset(live_end); } static void assign(ir_node *block, void *env_ptr) @@ -822,11 +888,10 @@ static void assign(ir_node *block, void *env_ptr) const arch_env_t *arch_env = env->birg->main_env->arch_env; struct list_head *head = get_block_border_head(env, block); be_lv_t *lv = env->birg->lv; - pset *live_in = be_lv_pset_put_in(lv, block, pset_new_ptr_default()); const ir_node *irn; border_t *b; - DEBUG_ONLY(firm_dbg_module_t *dbg = env->dbg;) + int idx; bitset_clear_all(colors); bitset_clear_all(live); @@ -844,7 +909,8 @@ static void assign(ir_node *block, void *env_ptr) * Since their colors have already been assigned (The dominators were * allocated before), we have to mark their colors as used also. */ - foreach_pset(live_in, irn) { + be_lv_foreach(lv, block, be_lv_state_in, idx) { + irn = be_lv_get_irn(lv, block, idx); if(has_reg_class(env, irn)) { const arch_register_t *reg = arch_get_irn_register(arch_env, irn); int col; @@ -881,13 +947,11 @@ static void assign(ir_node *block, void *env_ptr) const arch_register_t *reg; int col = NO_COLOR; - if(pset_find_ptr(alloc_env->pre_colored, irn) || ignore) { + if(ignore || pset_find_ptr(alloc_env->pre_colored, irn)) { reg = arch_get_irn_register(arch_env, irn); col = reg->index; assert(!bitset_is_set(colors, col) && "pre-colored register must be free"); - } - - else { + } else { col = get_next_free_reg(alloc_env, colors); reg = arch_register_for_index(env->cls, col); assert(arch_get_irn_register(arch_env, irn) == NULL && "This node must not have been assigned a register yet"); @@ -911,28 +975,34 @@ static void assign(ir_node *block, void *env_ptr) assert(reg && "Register must have been assigned"); col = arch_register_get_index(reg); - assert(bitset_is_set(live, nr) && "Cannot have a non live use"); +#ifndef NDEBUG + if(!arch_register_type_is(reg, ignore)) { + assert(bitset_is_set(live, nr) && "Cannot have a non live use"); + } +#endif bitset_clear(colors, col); bitset_clear(live, nr); } } - - del_pset(live_in); } void be_ra_chordal_color(be_chordal_env_t *chordal_env) { be_chordal_alloc_env_t env; char buf[256]; + be_lv_t *lv; be_irg_t *birg = chordal_env->birg; + const arch_register_class_t *cls = chordal_env->cls; - int colors_n = arch_register_class_n_regs(chordal_env->cls); + int colors_n = arch_register_class_n_regs(cls); ir_graph *irg = chordal_env->irg; - be_assure_dom_front(birg); - be_assure_liveness(birg); + lv = be_assure_liveness(birg); + be_liveness_assure_sets(lv); + be_liveness_assure_chk(lv); + assure_doms(irg); env.chordal_env = chordal_env; @@ -941,8 +1011,8 @@ void be_ra_chordal_color(be_chordal_env_t *chordal_env) env.tmp_colors = bitset_alloca(colors_n); env.in_colors = bitset_alloca(colors_n); env.pre_colored = pset_new_ptr_default(); - FIRM_DBG_REGISTER(env.constr_dbg, "firm.be.chordal.constr"); + BE_TIMER_PUSH(t_constr); /* Handle register targeting constraints */ dom_tree_walk_irg(irg, constraints, NULL, &env); @@ -952,6 +1022,8 @@ void be_ra_chordal_color(be_chordal_env_t *chordal_env) be_dump(chordal_env->irg, buf, dump_ir_block_graph_sched); } + BE_TIMER_POP(t_constr); + env.live = bitset_malloc(get_irg_last_idx(chordal_env->irg)); /* First, determine the pressure */ @@ -971,3 +1043,10 @@ void be_ra_chordal_color(be_chordal_env_t *chordal_env) bitset_free(env.live); del_pset(env.pre_colored); } + +void be_init_chordal(void) +{ + FIRM_DBG_REGISTER(dbg, "firm.be.chordal"); +} + +BE_REGISTER_MODULE_CONSTRUCTOR(be_init_chordal);