X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fbechordal.c;h=d80281475501315092f1633d099a245bba72556f;hb=ff9b23893ba556b55fb18b0203a804179a4ea5d4;hp=cc9036d8868b92a003f97fe5507d02b316d53aa6;hpb=e91c1db21d945d622be14e27bd4c6c405c042723;p=libfirm

diff --git a/ir/be/bechordal.c b/ir/be/bechordal.c
index cc9036d88..d80281475 100644
--- a/ir/be/bechordal.c
+++ b/ir/be/bechordal.c
@@ -1,7 +1,8 @@
 /**
  * Chordal register allocation.
  * @author Sebastian Hack
- * @date 8.12.2004
+ * @date   8.12.2004
+ * @cvs-id $Id$
  *
  * Copyright (C) Universitaet Karlsruhe
  * Released under the GPL
@@ -11,6 +12,14 @@
 #include "config.h"
 #endif
 
+#ifdef HAVE_MALLOC_H
+#include <malloc.h>
+#endif
+
+#ifdef HAVE_ALLOCA_H
+#include <alloca.h>
+#endif
+
 #include <ctype.h>
 
 #include "obst.h"
@@ -18,6 +27,7 @@
 #include "list.h"
 #include "bitset.h"
 #include "iterator.h"
+#include "bipartite.h"
 
 #include "irmode_t.h"
 #include "irgraph_t.h"
@@ -25,6 +35,7 @@
 #include "irgwalk.h"
 #include "irdump.h"
 #include "irdom.h"
+#include "irtools.h"
 #include "debug.h"
 #include "xmalloc.h"
 
@@ -33,148 +44,40 @@
 #include "benumb_t.h"
 #include "besched_t.h"
 #include "belive_t.h"
+#include "benode_t.h"
 #include "bearch.h"
+#include "beirgmod.h"
+#include "beifg.h"
+#include "beinsn_t.h"
 
 #include "bechordal_t.h"
 #include "bechordal_draw.h"
 
 #define DBG_LEVEL SET_LEVEL_0
+#define DBG_LEVEL_CHECK SET_LEVEL_0
+
 #define NO_COLOR (-1)
 
-#undef DUMP_INTERVALS
-#undef DUMP_PRESSURE
-#undef DUMP_IFG
+#define DUMP_INTERVALS
 
-#if defined(DUMP_IFG) && !defined(BUILD_GRAPH)
-#error Must define BUILD_GRAPH to be able to dump it.
-#endif
+typedef struct _be_chordal_alloc_env_t {
+	be_chordal_env_t *chordal_env;
 
+	pset *pre_colored;              /**< Set of precolored nodes. */
+	bitset_t *live;				    /**< A liveness bitset. */
+	bitset_t *tmp_colors;           /**< An auxiliary bitset which is as long as the number of colors in the class. */
+	bitset_t *colors;			    /**< The color mask. */
+	bitset_t *in_colors;            /**< Colors used by live in values. */
+	int colors_n;                   /**< The number of colors. */
+	DEBUG_ONLY(firm_dbg_module_t *constr_dbg;)  /**< Debug output for the constraint handler. */
+} be_chordal_alloc_env_t;
 
 #include "fourcc.h"
 
 /* Make a fourcc for border checking. */
 #define BORDER_FOURCC				FOURCC('B', 'O', 'R', 'D')
 
-static firm_dbg_module_t *dbg;
-
-#ifdef BUILD_GRAPH
-
-#define IF_EDGE_HASH(e) ((e)->src ^ (e)->tgt)
-#define IF_NODE_HASH(n) ((n)->nnr)
-
-static int if_edge_cmp(const void *p1, const void *p2, size_t size)
-{
-	const if_edge_t *e1 = p1;
-	const if_edge_t *e2 = p2;
-
-	return !(e1->src == e2->src && e1->tgt == e2->tgt);
-}
-
-static int if_node_cmp(const void *p1, const void *p2, size_t size)
-{
-	const if_node_t *n1 = p1;
-	const if_node_t *n2 = p2;
-
-	return n1->nnr != n2->nnr;
-}
-
-static INLINE if_edge_t *edge_init(if_edge_t *edge, int src, int tgt)
-{
-	/* Bring the smaller entry to src. */
-	if(src > tgt) {
-		edge->src = tgt;
-		edge->tgt = src;
-	} else {
-		edge->src = src;
-		edge->tgt = tgt;
-	}
-
-	return edge;
-}
-
-static INLINE void add_if(const be_chordal_env_t *env, int src, int tgt)
-{
-	if_edge_t edge;
-	if_node_t node, *src_node, *tgt_node;
-	/* insert edge */
-	edge_init(&edge, src, tgt);
-	set_insert(env->edges, &edge, sizeof(edge), IF_EDGE_HASH(&edge));
-
-	/* insert nodes */
-	node.nnr = src;
-	node.neighb = pset_new_ptr(8);
-	src_node = set_insert(env->nodes, &node, sizeof(node), IF_NODE_HASH(&node));
-	node.nnr = tgt;
-	node.neighb = pset_new_ptr(8);
-	tgt_node = set_insert(env->nodes, &node, sizeof(node), IF_NODE_HASH(&node));
-
-	/* insert neighbors into nodes */
-	pset_insert_ptr(src_node->neighb, tgt_node);
-	pset_insert_ptr(tgt_node->neighb, src_node);
-}
-
-static INLINE int are_connected(const be_chordal_env_t *env, int src, int tgt)
-{
-	if_edge_t edge;
-	edge_init(&edge, src, tgt);
-	return set_find(env->edges, &edge, sizeof(edge), IF_EDGE_HASH(&edge)) != NULL;
-}
-
-int ifg_has_edge(const be_chordal_env_t *env, const if_node_t *n1, const if_node_t* n2) {
-	return are_connected(env, n1->nnr, n2->nnr);
-}
-
-#ifdef DUMP_IFG
-
-static void dump_ifg(const be_chordal_env_t *env)
-{
-	FILE *f;
-	set *edges = env->edges;
-	ir_graph *irg = env->irg;
-	char filename[128];
-
-	ir_snprintf(filename, sizeof(filename), "ifg_%s_%F.dot", env->cls->name, irg);
-
-	if((f = fopen(filename, "wt")) != NULL) {
-		bitset_pos_t pos;
-		int n_edges = 0;
-		if_edge_t *edge;
-		bitset_t *bs = bitset_malloc(get_graph_node_count(irg));
-
-		ir_fprintf(f, "graph \"%F\" {\n", irg);
-		fprintf(f, "\tnode [shape=box,style=filled]\n");
-
-		for(edge = set_first(edges); edge; edge = set_next(edges)) {
-			bitset_set(bs, edge->src);
-			bitset_set(bs, edge->tgt);
-			n_edges++;
-		}
-
-		fprintf(f, "\tx [label=\"nodes: %u, edges: %d\"]\n", bitset_popcnt(bs), n_edges);
-
-		bitset_foreach(bs, pos) {
-			int nr = (int) pos;
-			ir_node *irn = get_irn_for_graph_nr(irg, nr);
-
-			ir_fprintf(f, "\tn%d [label=\"%+F\"]\n", nr, irn);
-		}
-
-		for(edge = set_first(edges); edge; edge = set_next(edges)) {
-			fprintf(f, "\tn%d -- n%d [len=5]\n", edge->src, edge->tgt);
-		}
-
-		fprintf(f, "}\n");
-		fclose(f);
-
-		bitset_free(bs);
-	}
-
-}
-
-#endif /* DUMP_IFG */
-
-#endif /* BUILD_GRAPH */
-
+#if 0
 static void check_border_list(struct list_head *head)
 {
   border_t *x;
@@ -191,7 +94,7 @@ static void check_heads(be_chordal_env_t *env)
     check_border_list(ent->value);
   }
 }
-
+#endif
 
 /**
  * Add an interval border to the list of a block's list
@@ -218,7 +121,7 @@ static INLINE border_t *border_add(be_chordal_env_t *env, struct list_head *head
 
 		/* also allocate the def and tie it to the use. */
 		def = obstack_alloc(&env->obst, sizeof(*def));
-    memset(def, 0, sizeof(*def));
+		memset(def, 0, sizeof(*def));
 		b->other_end = def;
 		def->other_end = b;
 
@@ -250,17 +153,468 @@ static INLINE border_t *border_add(be_chordal_env_t *env, struct list_head *head
 	b->irn = irn;
 	b->step = step;
 	list_add_tail(&b->list, head);
-	DBG((dbg, LEVEL_5, "\t\t%s adding %+F, step: %d\n",
-				is_def ? "def" : "use", irn, step));
+	DBG((env->dbg, LEVEL_5, "\t\t%s adding %+F, step: %d\n", is_def ? "def" : "use", irn, step));
 
 
 	return b;
 }
 
+/**
+ * Check, if an irn is of the register class currently under processing.
+ * @param env The chordal environment.
+ * @param irn The node.
+ * @return 1, if the node is of that register class, 0 if not.
+ */
 static INLINE int has_reg_class(const be_chordal_env_t *env, const ir_node *irn)
 {
-  return arch_irn_has_reg_class(env->session_env->main_env->arch_env,
-			irn, arch_pos_make_out(0), env->cls);
+	return arch_irn_has_reg_class(env->birg->main_env->arch_env, irn, -1, env->cls);
+	// return arch_irn_consider_in_reg_alloc(env->birg->main_env->arch_env, env->cls, irn);
+}
+
+#define has_limited_constr(req, irn) \
+	(arch_get_register_req(arch_env, (req), irn, -1) && (req)->type == arch_register_req_type_limited)
+
+static int get_next_free_reg(const be_chordal_alloc_env_t *alloc_env, bitset_t *colors)
+{
+	bitset_t *tmp = alloc_env->tmp_colors;
+	bitset_copy(tmp, colors);
+	bitset_or(tmp, alloc_env->chordal_env->ignore_colors);
+	return bitset_next_clear(tmp, 0);
+}
+
+static bitset_t *get_decisive_partner_regs(bitset_t *bs, const be_operand_t *o1, const be_operand_t *o2)
+{
+	bitset_t *res = bs;
+
+	if(!o1) {
+		bitset_copy(bs, o2->regs);
+		return bs;
+	}
+
+	if(!o2) {
+		bitset_copy(bs, o1->regs);
+		return bs;
+	}
+
+	assert(o1->req.cls == o2->req.cls);
+
+	if(bitset_contains(o1->regs, o2->regs))
+		bitset_copy(bs, o1->regs);
+	else if(bitset_contains(o2->regs, o1->regs))
+		bitset_copy(bs, o2->regs);
+	else
+		res = NULL;
+
+	return res;
+}
+
+static be_insn_t *chordal_scan_insn(be_chordal_env_t *env, ir_node *irn)
+{
+	be_insn_env_t ie;
+
+	ie.ignore_colors = env->ignore_colors;
+	ie.aenv          = env->birg->main_env->arch_env;
+	ie.obst          = &env->obst;
+	ie.cls           = env->cls;
+	return be_scan_insn(&ie, irn);
+}
+
+static ir_node *prepare_constr_insn(be_chordal_env_t *env, ir_node *irn)
+{
+	be_insn_t *insn = chordal_scan_insn(env, irn);
+	int i;
+
+	if(!insn->has_constraints)
+		goto end;
+
+	for(i = insn->use_start; i < insn->n_ops; ++i) {
+		be_operand_t *op = &insn->ops[i];
+		if(op->has_constraints && values_interfere(env->lv, insn->irn, op->carrier)) {
+			ir_node *bl   = get_nodes_block(insn->irn);
+			ir_node *copy = be_new_Copy(env->cls, env->irg, bl, op->carrier);
+
+			sched_add_before(insn->irn, copy);
+			set_irn_n(insn->irn, op->pos, copy);
+			DBG((env->dbg, LEVEL_3, "inserting constr copy %+F for %+F pos %d\n", copy, insn->irn, op->pos));
+			be_liveness_update(env->lv, op->carrier);
+		}
+	}
+
+end:
+	obstack_free(&env->obst, insn);
+	return insn->next_insn;
+}
+
+static void pre_spill_prepare_constr_walker(ir_node *bl, void *data)
+{
+	be_chordal_env_t *env = data;
+	ir_node *irn;
+	for(irn = sched_first(bl); !sched_is_end(irn);) {
+		irn = prepare_constr_insn(env, irn);
+	}
+}
+
+void be_pre_spill_prepare_constr(be_chordal_env_t *cenv) {
+	irg_block_walk_graph(cenv->irg, pre_spill_prepare_constr_walker, NULL, (void *) cenv);
+}
+
+static void pair_up_operands(const be_chordal_alloc_env_t *alloc_env, be_insn_t *insn)
+{
+	const be_chordal_env_t *env = alloc_env->chordal_env;
+
+	int n_uses   = be_insn_n_uses(insn);
+	int n_defs   = be_insn_n_defs(insn);
+	bitset_t *bs = bitset_alloca(env->cls->n_regs);
+	int *pairing = alloca(MAX(n_defs, n_uses) * sizeof(pairing[0]));
+
+	int i, j;
+
+	/*
+		For each out operand, try to find an in operand which can be assigned the
+		same register as the out operand.
+	*/
+	for (j = 0; j < insn->use_start; ++j) {
+		int smallest         = -1;
+		int smallest_n_regs  = 2 * env->cls->n_regs + 1;
+		be_operand_t *out_op = &insn->ops[j];
+
+		/* Try to find an in operand which has ... */
+		for(i = insn->use_start; i < insn->n_ops; ++i) {
+			int n_total;
+			const be_operand_t *op = &insn->ops[i];
+
+			if (! values_interfere(env->lv, op->irn, op->carrier) && ! op->partner) {
+				bitset_clear_all(bs);
+				bitset_copy(bs, op->regs);
+				bitset_and(bs, out_op->regs);
+				n_total = bitset_popcnt(op->regs) + bitset_popcnt(out_op->regs);
+
+				if (bitset_popcnt(bs) > 0 && n_total < smallest_n_regs) {
+					smallest = i;
+					smallest_n_regs = n_total;
+				}
+			}
+		}
+
+		if (smallest >= 0) {
+			be_operand_t *partner = &insn->ops[smallest];
+			out_op->partner  = partner;
+			partner->partner = out_op;
+		}
+	}
+}
+
+
+static ir_node *pre_process_constraints(be_chordal_alloc_env_t *alloc_env, be_insn_t **the_insn)
+{
+	be_chordal_env_t *env       = alloc_env->chordal_env;
+	const arch_env_t *aenv      = env->birg->main_env->arch_env;
+	be_insn_t *insn             = *the_insn;
+	ir_node *bl                 = get_nodes_block(insn->irn);
+	ir_node *copy               = NULL;
+	ir_node *perm               = NULL;
+	bitset_t *out_constr        = bitset_alloca(env->cls->n_regs);
+	bitset_t *bs                = bitset_alloca(env->cls->n_regs);
+	DEBUG_ONLY(firm_dbg_module_t *dbg      = alloc_env->constr_dbg;)
+
+	int i;
+
+	assert(insn->has_constraints && "only do this for constrained nodes");
+
+	/*
+		Collect all registers that occur in output constraints.
+		This is necessary, since if the insn has one of these as an input constraint
+		and the corresponding operand interferes with the insn, the operand must
+		be copied.
+	*/
+	for(i = 0; i < insn->use_start; ++i) {
+		be_operand_t *op = &insn->ops[i];
+		if(op->has_constraints)
+			bitset_or(out_constr, op->regs);
+	}
+
+	/*
+		Now, figure out which input operand must be copied since it has input
+		constraints which are also output constraints.
+	*/
+	(void) bl;
+	(void) copy;
+	(void) bs;
+	(void) dbg;
+#if 0
+	for(i = insn->use_start; i < insn->n_ops; ++i) {
+		be_operand_t *op = &insn->ops[i];
+		if(op->has_constraints && (values_interfere(env->lv, op->carrier, insn->irn) || arch_irn_is(aenv, op->carrier, ignore))) {
+			bitset_copy(bs, op->regs);
+			bitset_and(bs, out_constr);
+
+			/*
+				The operand (interfering with the node) has input constraints
+				which also occur as output constraints, so insert a copy.
+			*/
+			if(bitset_popcnt(bs) > 0) {
+				copy        = be_new_Copy(op->req.cls, env->irg, bl, op->carrier);
+				op->carrier = copy;
+				sched_add_before(insn->irn, copy);
+				set_irn_n(insn->irn, op->pos, op->carrier);
+
+				DBG((dbg, LEVEL_2, "adding copy for interfering and constrained op %+F\n", op->carrier));
+			}
+		}
+	}
+#endif
+
+	/*
+		Make the Perm, recompute liveness and re-scan the insn since the
+		in operands are now the Projs of the Perm.
+	*/
+	perm = insert_Perm_after(aenv, env->lv, env->cls, env->dom_front, sched_prev(insn->irn));
+
+	/* Registers are propagated by insert_Perm_after(). Clean them here! */
+	if(perm) {
+		const ir_edge_t *edge;
+
+		foreach_out_edge(perm, edge) {
+			ir_node *proj = get_edge_src_irn(edge);
+			arch_set_irn_register(aenv, proj, NULL);
+		}
+
+		/*
+			We also have to re-build the insn since the input operands are now the Projs of
+			the Perm. Recomputing liveness is also a good idea if a Perm is inserted, since
+			the live sets may change.
+		*/
+		// be_liveness_recompute(env->lv);
+		obstack_free(&env->obst, insn);
+		*the_insn = insn = chordal_scan_insn(env, insn->irn);
+
+		/*
+			Copy the input constraints of the insn to the Perm as output
+			constraints. Succeeding phases (coalescing will need that).
+		*/
+		for(i = insn->use_start; i < insn->n_ops; ++i) {
+			be_operand_t *op = &insn->ops[i];
+			ir_node *proj = op->carrier;
+			/*
+				Note that the predecessor must not be a Proj of the Perm,
+				since ignore-nodes are not Perm'ed.
+			*/
+			if(op->has_constraints &&  is_Proj(proj) && get_Proj_pred(proj) == perm) {
+				be_set_constr_limited(perm, BE_OUT_POS(get_Proj_proj(proj)), &op->req);
+			}
+		}
+	}
+
+	return perm;
+}
+
+static ir_node *handle_constraints(be_chordal_alloc_env_t *alloc_env, ir_node *irn, int *silent)
+{
+	be_chordal_env_t *env  = alloc_env->chordal_env;
+	void *base             = obstack_base(&env->obst);
+	be_insn_t *insn        = chordal_scan_insn(env, irn);
+	ir_node *res           = insn->next_insn;
+	int be_silent          = *silent;
+
+	if(insn->pre_colored) {
+		int i;
+		for(i = 0; i < insn->use_start; ++i)
+			pset_insert_ptr(alloc_env->pre_colored, insn->ops[i].carrier);
+	}
+
+	/*
+		If the current node is a barrier toggle the silent flag.
+		If we are in the start block, we are ought to be silent at the beginning,
+		so the toggling activates the constraint handling but skips the barrier.
+		If we are in the end block we handle the in requirements of the barrier
+		and set the rest to silent.
+	*/
+	if(be_is_Barrier(irn))
+		*silent = !*silent;
+
+	if(be_silent)
+		goto end;
+
+	/*
+		Perms inserted before the constraint handling phase are considered to be
+		correctly precolored. These Perms arise during the ABI handling phase.
+	*/
+	if(insn->has_constraints) {
+		const arch_env_t *aenv = env->birg->main_env->arch_env;
+		int n_regs             = env->cls->n_regs;
+		bitset_t *bs           = bitset_alloca(n_regs);
+		ir_node **alloc_nodes  = alloca(n_regs * sizeof(alloc_nodes[0]));
+		bipartite_t *bp        = bipartite_new(n_regs, n_regs);
+		int *assignment        = alloca(n_regs * sizeof(assignment[0]));
+		pmap *partners         = pmap_create();
+		DEBUG_ONLY(firm_dbg_module_t *dbg = alloc_env->constr_dbg;)
+
+		int i, n_alloc;
+		long col;
+		const ir_edge_t *edge;
+		ir_node *perm = NULL;
+
+		/*
+			prepare the constraint handling of this node.
+			Perms are constructed and Copies are created for constrained values
+			interfering with the instruction.
+		*/
+		perm = pre_process_constraints(alloc_env, &insn);
+
+		/* find suitable in operands to the out operands of the node. */
+		pair_up_operands(alloc_env, insn);
+
+		/*
+			look at the in/out operands and add each operand (and its possible partner)
+			to a bipartite graph (left: nodes with partners, right: admissible colors).
+		*/
+		for(i = 0, n_alloc = 0; i < insn->n_ops; ++i) {
+			be_operand_t *op = &insn->ops[i];
+
+			/*
+				If the operand has no partner or the partner has not been marked
+				for allocation, determine the admissible registers and mark it
+				for allocation by associating the node and its partner with the
+				set of admissible registers via a bipartite graph.
+			*/
+			if(!op->partner || !pmap_contains(partners, op->partner->carrier)) {
+
+				pmap_insert(partners, op->carrier, op->partner ? op->partner->carrier : NULL);
+				alloc_nodes[n_alloc] = op->carrier;
+
+				DBG((dbg, LEVEL_2, "\tassociating %+F and %+F\n", op->carrier, op->partner ? op->partner->carrier : NULL));
+
+ 				bitset_clear_all(bs);
+				get_decisive_partner_regs(bs, op, op->partner);
+
+				DBG((dbg, LEVEL_2, "\tallowed registers for %+F: %B\n", op->carrier, bs));
+
+				bitset_foreach(bs, col)
+					bipartite_add(bp, n_alloc, col);
+
+				n_alloc++;
+			}
+		}
+
+		/*
+			Put all nodes which live by the constrained instruction also to the
+			allocation bipartite graph. They are considered unconstrained.
+		*/
+		if(perm) {
+			foreach_out_edge(perm, edge) {
+				ir_node *proj = get_edge_src_irn(edge);
+
+				assert(is_Proj(proj));
+
+				if(values_interfere(env->lv, proj, irn) && !pmap_contains(partners, proj)) {
+					assert(n_alloc < n_regs);
+					alloc_nodes[n_alloc] = proj;
+					pmap_insert(partners, proj, NULL);
+
+					bitset_clear_all(bs);
+					arch_put_non_ignore_regs(aenv, env->cls, bs);
+					bitset_foreach(bs, col)
+						bipartite_add(bp, n_alloc, col);
+
+					n_alloc++;
+				}
+			}
+		}
+
+		/* Compute a valid register allocation. */
+		bipartite_matching(bp, assignment);
+
+		/* Assign colors obtained from the matching. */
+		for(i = 0; i < n_alloc; ++i) {
+			const arch_register_t *reg;
+			ir_node *nodes[2];
+			int j;
+
+			assert(assignment[i] >= 0 && "there must have been a register assigned");
+			reg = arch_register_for_index(env->cls, assignment[i]);
+
+			nodes[0] = alloc_nodes[i];
+			nodes[1] = pmap_get(partners, alloc_nodes[i]);
+
+			for(j = 0; j < 2; ++j) {
+				if(!nodes[j])
+					continue;
+
+				arch_set_irn_register(aenv, nodes[j], reg);
+				pset_hinsert_ptr(alloc_env->pre_colored, nodes[j]);
+				DBG((dbg, LEVEL_2, "\tsetting %+F to register %s\n", nodes[j], reg->name));
+			}
+		}
+
+
+		/* Allocate the non-constrained Projs of the Perm. */
+		if(perm) {
+
+			bitset_clear_all(bs);
+
+			/* Put the colors of all Projs in a bitset. */
+			foreach_out_edge(perm, edge) {
+				ir_node *proj              = get_edge_src_irn(edge);
+				const arch_register_t *reg = arch_get_irn_register(aenv, proj);
+
+				if(reg != NULL)
+					bitset_set(bs, reg->index);
+			}
+
+			/* Assign the not yet assigned Projs of the Perm a suitable color. */
+			foreach_out_edge(perm, edge) {
+				ir_node *proj              = get_edge_src_irn(edge);
+				const arch_register_t *reg = arch_get_irn_register(aenv, proj);
+
+				DBG((dbg, LEVEL_2, "\tchecking reg of %+F: %s\n", proj, reg ? reg->name : "<none>"));
+
+				if(reg == NULL) {
+					col = get_next_free_reg(alloc_env, bs);
+					reg = arch_register_for_index(env->cls, col);
+					bitset_set(bs, reg->index);
+					arch_set_irn_register(aenv, proj, reg);
+					pset_insert_ptr(alloc_env->pre_colored, proj);
+					DBG((dbg, LEVEL_2, "\tsetting %+F to register %s\n", proj, reg->name));
+				}
+			}
+		}
+
+		bipartite_free(bp);
+		pmap_destroy(partners);
+	}
+
+end:
+	obstack_free(&env->obst, base);
+	return res;
+}
+
+/**
+ * Handle constraint nodes in each basic block.
+ * handle_constraints() inserts Perm nodes which perm
+ * over all values live at the constrained node right in front
+ * of the constrained node. These Perms signal a constrained node.
+ * For further comments, refer to handle_constraints().
+ */
+static void constraints(ir_node *bl, void *data)
+{
+	be_chordal_alloc_env_t *env = data;
+
+	/*
+		Start silent in the start block.
+		The silence remains until the first barrier is seen.
+		Each other block is begun loud.
+	*/
+	int silent                  = bl == get_irg_start_block(get_irn_irg(bl));
+	ir_node *irn;
+
+	/*
+		If the block is the start block search the barrier and
+		start handling constraints from there.
+	*/
+
+	for(irn = sched_first(bl); !sched_is_end(irn);) {
+		irn = handle_constraints(env, irn, &silent);
+	}
 }
 
 /**
@@ -279,16 +633,18 @@ static void pressure(ir_node *block, void *env_ptr)
 #define border_use(irn, step, real) \
 	border_add(env, head, irn, step, ++pressure, 0, real)
 
-	be_chordal_env_t *env = env_ptr;
-	bitset_t *live = env->live;
+	be_chordal_alloc_env_t *alloc_env = env_ptr;
+	be_chordal_env_t *env             = alloc_env->chordal_env;
+	bitset_t *live                    = alloc_env->live;
 	ir_node *irn;
+	DEBUG_ONLY(firm_dbg_module_t *dbg            = env->dbg;)
 
 	int i, n;
 	unsigned step = 0;
 	unsigned pressure = 0;
 	struct list_head *head;
-	pset *live_in = put_live_in(block, pset_new_ptr_default());
-	pset *live_end = put_live_end(block, pset_new_ptr_default());
+	pset *live_in  = be_lv_pset_put_in(env->lv, block, pset_new_ptr_default());
+	pset *live_end = be_lv_pset_put_end(env->lv, block, pset_new_ptr_default());
 
 	DBG((dbg, LEVEL_1, "Computing pressure in block %+F\n", block));
 	bitset_clear_all(live);
@@ -296,17 +652,17 @@ static void pressure(ir_node *block, void *env_ptr)
 	/* Set up the border list in the block info */
 	head = obstack_alloc(&env->obst, sizeof(*head));
 	INIT_LIST_HEAD(head);
-  assert(pmap_get(env->border_heads, block) == NULL);
+	assert(pmap_get(env->border_heads, block) == NULL);
 	pmap_insert(env->border_heads, block, head);
 
 	/*
 	 * Make final uses of all values live out of the block.
 	 * They are necessary to build up real intervals.
 	 */
-	for(irn = pset_first(live_end); irn; irn = pset_next(live_end)) {
+	foreach_pset(live_end, irn) {
 		if(has_reg_class(env, irn)) {
-			DBG((dbg, LEVEL_3, "\tMaking live: %+F/%d\n", irn, get_irn_graph_nr(irn)));
-			bitset_set(live, get_irn_graph_nr(irn));
+			DBG((dbg, LEVEL_3, "\tMaking live: %+F/%d\n", irn, get_irn_idx(irn)));
+			bitset_set(live, get_irn_idx(irn));
 			border_use(irn, step, 0);
 		}
 	}
@@ -318,23 +674,17 @@ static void pressure(ir_node *block, void *env_ptr)
 	 */
 	sched_foreach_reverse(block, irn) {
 		DBG((dbg, LEVEL_1, "\tinsn: %+F, pressure: %d\n", irn, pressure));
-		DBG((dbg, LEVEL_2, "\tlive: %b\n", live));
+		DBG((dbg, LEVEL_2, "\tlive: %B\n", live));
 
-	    /*
-	     * If the node defines some value, which can put into a
-	     * register of the current class, make a border for it.
-	     */
+		/*
+		 * If the node defines some value, which can put into a
+		 * register of the current class, make a border for it.
+		 */
 		if(has_reg_class(env, irn)) {
-			bitset_pos_t elm;
-			int nr = get_irn_graph_nr(irn);
+			int nr = get_irn_idx(irn);
 
 			bitset_clear(live, nr);
 			border_def(irn, step, 1);
-
-#ifdef BUILD_GRAPH
-			bitset_foreach(live, elm)
-				add_if(env, nr, (int) elm);
-#endif
 		}
 
 		/*
@@ -345,14 +695,16 @@ static void pressure(ir_node *block, void *env_ptr)
 				ir_node *op = get_irn_n(irn, i);
 
 				if(has_reg_class(env, op)) {
-					int nr = get_irn_graph_nr(op);
-
-					DBG((dbg, LEVEL_4, "\t\tpos: %d, use: %+F\n", i, op));
+					int nr = get_irn_idx(op);
+					const char *msg = "-";
 
 					if(!bitset_is_set(live, nr)) {
 						border_use(op, step, 1);
 						bitset_set(live, nr);
+						msg = "X";
 					}
+
+					DBG((dbg, LEVEL_4, "\t\t%s pos: %d, use: %+F\n", msg, i, op));
 				}
 			}
 		}
@@ -362,44 +714,45 @@ static void pressure(ir_node *block, void *env_ptr)
 	/*
 	 * Add initial defs for all values live in.
 	 */
-	for(irn = pset_first(live_in); irn; irn = pset_next(live_in)) {
+	foreach_pset(live_in, irn) {
 		if(has_reg_class(env, irn)) {
 
 			/* Mark the value live in. */
-			bitset_set(live, get_irn_graph_nr(irn));
+			bitset_set(live, get_irn_idx(irn));
 
 			/* Add the def */
 			border_def(irn, step, 0);
 		}
 	}
 
-
-  del_pset(live_in);
-  del_pset(live_end);
+	del_pset(live_in);
+	del_pset(live_end);
 }
 
 static void assign(ir_node *block, void *env_ptr)
 {
-	be_chordal_env_t *env = env_ptr;
-	bitset_t *live = env->live;
-	bitset_t *colors = env->colors;
-	bitset_t *in_colors = env->in_colors;
-	const arch_env_t *arch_env = env->session_env->main_env->arch_env;
+	be_chordal_alloc_env_t *alloc_env = env_ptr;
+	be_chordal_env_t *env       = alloc_env->chordal_env;
+	bitset_t *live              = alloc_env->live;
+	bitset_t *colors            = alloc_env->colors;
+	bitset_t *in_colors         = alloc_env->in_colors;
+	const arch_env_t *arch_env  = env->birg->main_env->arch_env;
+	struct list_head *head      = get_block_border_head(env, block);
+	pset *live_in               = be_lv_pset_put_in(env->lv, block, pset_new_ptr_default());
 
 	const ir_node *irn;
 	border_t *b;
-	struct list_head *head = get_block_border_head(env, block);
-	pset *live_in = put_live_in(block, pset_new_ptr_default());
+	DEBUG_ONLY(firm_dbg_module_t *dbg = env->dbg;)
 
-	bitset_clear_all(live);
 	bitset_clear_all(colors);
+	bitset_clear_all(live);
 	bitset_clear_all(in_colors);
 
 	DBG((dbg, LEVEL_4, "Assigning colors for block %+F\n", block));
 	DBG((dbg, LEVEL_4, "\tusedef chain for block\n"));
 	list_for_each_entry(border_t, b, head, list) {
 		DBG((dbg, LEVEL_4, "\t%s %+F/%d\n", b->is_def ? "def" : "use",
-					b->irn, get_irn_graph_nr(b->irn)));
+					b->irn, get_irn_idx(b->irn)));
 	}
 
 	/*
@@ -407,59 +760,69 @@ static void assign(ir_node *block, void *env_ptr)
 	 * Since their colors have already been assigned (The dominators were
 	 * allocated before), we have to mark their colors as used also.
 	 */
-	for(irn = pset_first(live_in); irn; irn = pset_next(live_in)) {
+	foreach_pset(live_in, irn) {
 		if(has_reg_class(env, irn)) {
-			const arch_register_t *reg = arch_get_irn_register(arch_env, irn, 0);
+			const arch_register_t *reg = arch_get_irn_register(arch_env, irn);
 			int col;
 
 			assert(reg && "Node must have been assigned a register");
 			col = arch_register_get_index(reg);
 
+			DBG((dbg, LEVEL_4, "%+F has reg %s\n", irn, reg->name));
+
 			/* Mark the color of the live in value as used. */
 			bitset_set(colors, col);
 			bitset_set(in_colors, col);
 
 			/* Mark the value live in. */
-			bitset_set(live, get_irn_graph_nr(irn));
+			bitset_set(live, get_irn_idx(irn));
 		}
 	}
 
 	/*
-	 * Mind that the sequence of defs from back to front defines a perfect
+	 * Mind that the sequence
+	 * of defs from back to front defines a perfect
 	 * elimination order. So, coloring the definitions from first to last
 	 * will work.
 	 */
 	list_for_each_entry_reverse(border_t, b, head, list) {
 		ir_node *irn = b->irn;
-		int nr = get_irn_graph_nr(irn);
+		int nr       = get_irn_idx(irn);
+		int ignore   = arch_irn_is(arch_env, irn, ignore);
 
 		/*
 		 * Assign a color, if it is a local def. Global defs already have a
 		 * color.
 		 */
-		if(b->is_def && !is_live_in(block, irn)) {
+		if(b->is_def && !be_is_live_in(env->lv, block, irn)) {
 			const arch_register_t *reg;
 			int col = NO_COLOR;
 
-			DBG((dbg, LEVEL_4, "\tcolors in use: %b\n", colors));
-
-			col = bitset_next_clear(colors, 0);
-			reg = arch_register_for_index(env->cls, col);
+			if(pset_find_ptr(alloc_env->pre_colored, irn) || ignore) {
+				reg = arch_get_irn_register(arch_env, irn);
+				col = reg->index;
+				assert(!bitset_is_set(colors, col) && "pre-colored register must be free");
+			}
 
-			assert(arch_get_irn_register(arch_env, irn, 0) == NULL && "This node must not have been assigned a register yet");
-			assert(!bitset_is_set(live, nr) && "Value's definition must not have been encountered");
+			else {
+				col = get_next_free_reg(alloc_env, colors);
+				reg = arch_register_for_index(env->cls, col);
+				assert(arch_get_irn_register(arch_env, irn) == NULL && "This node must not have been assigned a register yet");
+				assert(!arch_register_type_is(reg, ignore) && "Must not assign ignore register");
+			}
 
 			bitset_set(colors, col);
-			bitset_set(live, nr);
+			arch_set_irn_register(arch_env, irn, reg);
+
+			DBG((dbg, LEVEL_1, "\tassigning register %s(%d) to %+F\n", arch_register_get_name(reg), col, irn));
 
-			arch_set_irn_register(arch_env, irn, 0, reg);
-			DBG((dbg, LEVEL_1, "\tassigning register %s(%d) to %+F\n",
-            arch_register_get_name(reg), col, irn));
+			assert(!bitset_is_set(live, nr) && "Value's definition must not have been encountered");
+			bitset_set(live, nr);
 		}
 
 		/* Clear the color upon a use. */
 		else if(!b->is_def) {
-			const arch_register_t *reg = arch_get_irn_register(arch_env, irn, 0);
+			const arch_register_t *reg = arch_get_irn_register(arch_env, irn);
 			int col;
 
 			assert(reg && "Register must have been assigned");
@@ -475,214 +838,53 @@ static void assign(ir_node *block, void *env_ptr)
 	del_pset(live_in);
 }
 
-void be_ra_chordal_init(void)
-{
-	dbg = firm_dbg_register(DBG_CHORDAL);
-	firm_dbg_set_mask(dbg, DBG_LEVEL);
-}
-
-be_chordal_env_t *be_ra_chordal(
-    const be_main_session_env_t *session,
-    const arch_register_class_t *cls)
-{
-  ir_graph *irg = session->irg;
-	int node_count = get_graph_node_count(irg);
-	int colors_n = arch_register_class_n_regs(cls);
-	be_chordal_env_t *env = malloc(sizeof(*env));
-
-	if(get_irg_dom_state(irg) != dom_consistent)
-		compute_doms(irg);
-
-	obstack_init(&env->obst);
-
-#ifdef BUILD_GRAPH
-	env->edges = new_set(if_edge_cmp, node_count);
-	env->nodes = new_set(if_node_cmp, node_count);
-#endif
-
-  env->session_env = session;
-	env->live = bitset_obstack_alloc(&env->obst, node_count);
-	env->colors = bitset_obstack_alloc(&env->obst, colors_n);
-	env->in_colors = bitset_obstack_alloc(&env->obst, colors_n);
-	env->colors_n = colors_n;
-	env->cls = cls;
-	env->border_heads = pmap_create();
-
-	/* First, determine the pressure */
-	dom_tree_walk_irg(irg, pressure, NULL, env);
-
-	/* Insert probable spills */
-	be_ra_chordal_spill(env);
-
-	/* Assign the colors */
-	dom_tree_walk_irg(irg, assign, NULL, env);
-
-#ifdef DUMP_IFG
-	dump_ifg(env);
-#endif
-
-#ifdef DUMP_INTERVALS
-	{
-		char buf[128];
-    	plotter_t *plotter;
-
-		ir_snprintf(buf, sizeof(buf), "ifg_%s_%F.eps", cls->name, irg);
-    	plotter = new_plotter_ps(buf);
-
-    	draw_interval_tree(&draw_chordal_def_opts, env, plotter, env->session_env->main_env->arch_env, cls);
-    	plotter_free(plotter);
-	}
-#endif
-	return env;
-}
-
-void be_ra_chordal_check(be_chordal_env_t *chordal_env) {
-	const arch_env_t *arch_env = chordal_env->session_env->main_env->arch_env;
-	struct obstack ob;
-	pmap_entry *pme;
-	ir_node **nodes, *n1, *n2;
-	int i, o;
-
-	/* Collect all irns */
-	obstack_init(&ob);
-	pmap_foreach(chordal_env->border_heads, pme) {
-		border_t *curr;
-		struct list_head *head = pme->value;
-		list_for_each_entry(border_t, curr, head, list)
-			if (curr->is_def && curr->is_real)
-				if (arch_get_irn_reg_class(arch_env, curr->irn, arch_pos_make_out(0)) == chordal_env->cls)
-					obstack_ptr_grow(&ob, curr->irn);
-	}
-	obstack_ptr_grow(&ob, NULL);
-	nodes = (ir_node **) obstack_finish(&ob);
-
-	/* Check them */
-	for (i = 0, n1 = nodes[i]; n1; n1 = nodes[++i]) {
-		const arch_register_t *n1_reg, *n2_reg;
-
-		n1_reg = arch_get_irn_register(arch_env, n1, 0);
-		if (!arch_reg_is_allocatable(arch_env, n1, arch_pos_make_out(0), n1_reg)) {
-			DBG((dbg, 0, "Register assigned to %+F is not allowed\n", n1));
-			assert(0 && "Register constraint does not hold");
-		}
-		for (o = i+1, n2 = nodes[o]; n2; n2 = nodes[++o]) {
-			n2_reg = arch_get_irn_register(arch_env, n2, 0);
-			if (nodes_interfere(chordal_env, n1, n2) && n1_reg == n2_reg) {
-				DBG((dbg, 0, "Values %+F and %+F interfere and have the same register assigned\n", n1, n2));
-				assert(0 && "Interfering values have the same color!");
-			}
-		}
-	}
-	obstack_free(&ob, NULL);
-}
-
-/* BETTER #ifdef BUILD_GRAPH --> faster version of checker with edges */
-
-void be_ra_chordal_done(be_chordal_env_t *env)
+void be_ra_chordal_color(be_chordal_env_t *chordal_env)
 {
-#ifdef BUILD_GRAPH
-	{
-		if_node_t *ifn;
-		for(ifn = set_first(env->nodes); ifn; ifn = set_next(env->nodes))
-			free(ifn->neighb);
-		free(env->nodes);
-		free(env->edges);
-	}
-#endif
+	be_chordal_alloc_env_t env;
+	char buf[256];
 
-  pmap_destroy(env->border_heads);
-	obstack_free(&env->obst, NULL);
-	free(env);
-}
+	int colors_n          = arch_register_class_n_regs(chordal_env->cls);
+	ir_graph *irg         = chordal_env->irg;
 
 
+	assure_doms(irg);
 
-int nodes_interfere(const be_chordal_env_t *env, const ir_node *a, const ir_node *b)
-{
-#ifdef BUILD_GRAPH
-	return are_connected(env, get_irn_graph_nr(a), get_irn_graph_nr(b));
-#else
-	return values_interfere(a, b);
-#endif /* BUILD_GRAPH */
-}
-
-#ifdef BUILD_GRAPH
-
-set *be_ra_get_ifg_edges(const be_chordal_env_t *env) {
-	return env->edges;
-}
-
-set *be_ra_get_ifg_nodes(const be_chordal_env_t *env) {
-	return env->nodes;
-}
-
-#endif
+	env.chordal_env   = chordal_env;
+	env.colors_n      = colors_n;
+	env.colors        = bitset_alloca(colors_n);
+	env.tmp_colors    = bitset_alloca(colors_n);
+	env.in_colors     = bitset_alloca(colors_n);
+	env.pre_colored   = pset_new_ptr_default();
+	FIRM_DBG_REGISTER(env.constr_dbg, "firm.be.chordal.constr");
 
-typedef struct {
-	const be_main_session_env_t *env;
-	const arch_register_class_t *cls;
-} check_pressure_info_t;
 
+	/* Handle register targeting constraints */
+	dom_tree_walk_irg(irg, constraints, NULL, &env);
 
-static int check_pressure_has_class(const check_pressure_info_t *i, const ir_node *irn)
-{
-  return arch_irn_has_reg_class(i->env->main_env->arch_env,
-      irn, arch_pos_make_out(0), i->cls);
-}
-
-static void check_pressure_walker(ir_node *bl, void *data)
-{
-	firm_dbg_module_t *dbg = firm_dbg_register("be.ra.pressure");
-	check_pressure_info_t *info = data;
-	int n_regs = arch_register_class_n_regs(info->cls);
-
-	pset *live = pset_new_ptr_default();
-	int step = 0;
-	ir_node *irn;
-	irn_live_t *li;
-
-//	firm_dbg_set_mask(dbg, -1);
-
-	live_foreach(bl, li) {
-		if(live_is_end(li) && check_pressure_has_class(info, li->irn)) {
-			ir_node *irn = (ir_node *) li->irn;
-			pset_insert_ptr(live, irn);
-		}
+	if(chordal_env->opts->dump_flags & BE_CH_DUMP_CONSTR) {
+		snprintf(buf, sizeof(buf), "-%s-constr", chordal_env->cls->name);
+		be_dump(chordal_env->irg, buf, dump_ir_block_graph_sched);
 	}
 
-	DBG((dbg, LEVEL_1, "end set for %+F\n", bl));
-	for(irn = pset_first(live); irn; irn = pset_next(live))
-		DBG((dbg, LEVEL_1, "\t%+F\n", irn));
-
-	sched_foreach_reverse(bl, irn) {
-		int i, n;
-		int pressure = pset_count(live);
+	be_numbering(irg);
+	env.live = bitset_malloc(get_irg_last_idx(chordal_env->irg));
 
-		DBG((dbg, LEVEL_1, "%+10F@%+10F: pressure %d\n", bl, irn, pressure));
+	/* First, determine the pressure */
+	dom_tree_walk_irg(irg, pressure, NULL, &env);
 
-		if(pressure > n_regs) {
-			ir_node *x;
-			ir_printf("%+10F@%+10F: pressure to high: %d\n", bl, irn, pressure);
-			for(x = pset_first(live); x; x = pset_next(live))
-				ir_printf("\t%+10F\n", x);
-		}
+	/* Assign the colors */
+	dom_tree_walk_irg(irg, assign, NULL, &env);
 
-		if(check_pressure_has_class(info, irn))
-			pset_remove_ptr(live, irn);
+	be_numbering_done(irg);
 
-		for(i = 0, n = get_irn_arity(irn); i < n; i++) {
-			ir_node *op = get_irn_n(irn, i);
-			if(check_pressure_has_class(info, op) && !is_Phi(irn))
-				pset_insert_ptr(live, op);
-		}
-		step++;
+	if(chordal_env->opts->dump_flags & BE_CH_DUMP_TREE_INTV) {
+		plotter_t *plotter;
+		ir_snprintf(buf, sizeof(buf), "ifg_%s_%F.eps", chordal_env->cls->name, irg);
+		plotter = new_plotter_ps(buf);
+		draw_interval_tree(&draw_chordal_def_opts, chordal_env, plotter);
+		plotter_free(plotter);
 	}
-}
 
-void be_check_pressure(const be_main_session_env_t *env, const arch_register_class_t *cls)
-{
-	check_pressure_info_t i;
-	i.env = env;
-	i.cls = cls;
-	irg_block_walk_graph(env->irg, check_pressure_walker, NULL, &i);
+	bitset_free(env.live);
+	del_pset(env.pre_colored);
 }