X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fbechordal.c;h=d2b414cb1a0b501a4d839783d04505cb62323f27;hb=91f9fd8a65f0db8bcf956cfe54ac4cca394c45e8;hp=0640305191e1692e18ba08c00e9ce99e852c5433;hpb=8a327004fbf756b9c00fd7c5b86401f8e808660c;p=libfirm diff --git a/ir/be/bechordal.c b/ir/be/bechordal.c index 064030519..d2b414cb1 100644 --- a/ir/be/bechordal.c +++ b/ir/be/bechordal.c @@ -1,23 +1,29 @@ -/** - * Chordal register allocation. - * @author Sebastian Hack - * @date 8.12.2004 +/* + * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved. + * + * This file is part of libFirm. + * + * This file may be distributed and/or modified under the terms of the + * GNU General Public License version 2 as published by the Free Software + * Foundation and appearing in the file LICENSE.GPL included in the + * packaging of this file. * - * Copyright (C) Universitaet Karlsruhe - * Released under the GPL + * Licensees holding valid libFirm Professional Edition licenses may use + * this file in accordance with the libFirm Commercial License. + * Agreement provided with the Software. + * + * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE + * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE. */ -#ifdef HAVE_CONFIG_H +/** + * @file + * @brief Chordal register allocation. + * @author Sebastian Hack + * @date 08.12.2004 + */ #include "config.h" -#endif - -#ifdef HAVE_MALLOC_H -#include -#endif - -#ifdef HAVE_ALLOCA_H -#include -#endif #include @@ -25,7 +31,9 @@ #include "pset.h" #include "list.h" #include "bitset.h" -#include "iterator.h" +#include "raw_bitset.h" +#include "bipartite.h" +#include "hungarian.h" #include "irmode_t.h" #include "irgraph_t.h" @@ -33,456 +41,357 @@ #include "irgwalk.h" #include "irdump.h" #include "irdom.h" +#include "irtools.h" #include "debug.h" -#include "xmalloc.h" +#include "iredges.h" #include "beutil.h" #include "besched.h" -#include "benumb_t.h" -#include "besched_t.h" +#include "besched.h" #include "belive_t.h" -#include "benode_t.h" +#include "benode.h" #include "bearch.h" +#include "beirgmod.h" #include "beifg.h" - +#include "beinsn_t.h" +#include "statev_t.h" +#include "beirg.h" +#include "beintlive_t.h" +#include "bera.h" #include "bechordal_t.h" #include "bechordal_draw.h" +#include "bemodule.h" +#include "bearch.h" +#include "bechordal_common.h" -#define DBG_LEVEL SET_LEVEL_0 -#define DBG_LEVEL_CHECK SET_LEVEL_0 - -#define NO_COLOR (-1) - -#undef DUMP_INTERVALS +DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;) -typedef struct _be_chordal_alloc_env_t { +typedef struct be_chordal_alloc_env_t { be_chordal_env_t *chordal_env; - pset *pre_colored; /**< Set of precolored nodes. */ - bitset_t *live; /**< A liveness bitset. */ - bitset_t *colors; /**< The color mask. */ - bitset_t *in_colors; /**< Colors used by live in values. */ - int colors_n; /**< The number of colors. */ + pset *pre_colored; /**< Set of precolored nodes. */ + bitset_t *live; /**< A liveness bitset. */ + bitset_t *tmp_colors; /**< An auxiliary bitset which is as long as the number of colors in the class. */ + bitset_t *colors; /**< The color mask. */ } be_chordal_alloc_env_t; -#include "fourcc.h" - -/* Make a fourcc for border checking. */ -#define BORDER_FOURCC FOURCC('B', 'O', 'R', 'D') - -static void check_border_list(struct list_head *head) +static int get_next_free_reg(const be_chordal_alloc_env_t *alloc_env, bitset_t *colors) { - border_t *x; - list_for_each_entry(border_t, x, head, list) { - assert(x->magic == BORDER_FOURCC); - } + bitset_t *tmp = alloc_env->tmp_colors; + bitset_copy(tmp, colors); + bitset_flip_all(tmp); + bitset_and(tmp, alloc_env->chordal_env->allocatable_regs); + return bitset_next_set(tmp, 0); } -static void check_heads(be_chordal_env_t *env) +static bitset_t const *get_decisive_partner_regs(be_operand_t const *const o1) { - pmap_entry *ent; - for(ent = pmap_first(env->border_heads); ent; ent = pmap_next(env->border_heads)) { - /* ir_printf("checking border list of block %+F\n", ent->key); */ - check_border_list(ent->value); - } + be_operand_t const *const o2 = o1->partner; + assert(!o2 || o1->req->cls == o2->req->cls); + + if (!o2 || bitset_contains(o1->regs, o2->regs)) { + return o1->regs; + } else if (bitset_contains(o2->regs, o1->regs)) { + return o2->regs; + } else { + return NULL; + } } - -/** - * Add an interval border to the list of a block's list - * of interval border. - * @note You always have to create the use before the def. - * @param env The environment. - * @param head The list head to enqueue the borders. - * @param irn The node (value) the border belongs to. - * @param pressure The pressure at this point in time. - * @param step A time step for the border. - * @param is_def Is the border a use or a def. - * @return The created border. - */ -static INLINE border_t *border_add(be_chordal_env_t *env, struct list_head *head, - ir_node *irn, unsigned step, unsigned pressure, - unsigned is_def, unsigned is_real) +static void pair_up_operands(const be_chordal_alloc_env_t *alloc_env, be_insn_t *insn) { - border_t *b; - - if(!is_def) { - border_t *def; + const be_chordal_env_t *env = alloc_env->chordal_env; + bitset_t *bs = bitset_alloca(env->cls->n_regs); + int i; + int j; - b = obstack_alloc(&env->obst, sizeof(*b)); + /* + * For each out operand, try to find an in operand which can be assigned the + * same register as the out operand. + */ + for (j = 0; j < insn->use_start; ++j) { + be_operand_t *smallest = NULL; + int smallest_n_regs = env->cls->n_regs + 1; + be_operand_t *out_op = &insn->ops[j]; + + /* Try to find an in operand which has ... */ + for (i = insn->use_start; i < insn->n_ops; ++i) { + int n_total; + be_operand_t *op = &insn->ops[i]; + be_lv_t *lv; + + if (op->partner != NULL) + continue; + lv = be_get_irg_liveness(env->irg); + if (be_values_interfere(lv, op->irn, op->carrier)) + continue; + + bitset_copy(bs, op->regs); + bitset_and(bs, out_op->regs); + n_total = bitset_popcount(op->regs); + + if (!bitset_is_empty(bs) && n_total < smallest_n_regs) { + smallest = op; + smallest_n_regs = n_total; + } + } - /* also allocate the def and tie it to the use. */ - def = obstack_alloc(&env->obst, sizeof(*def)); - memset(def, 0, sizeof(*def)); - b->other_end = def; - def->other_end = b; + if (smallest != NULL) { + for (i = insn->use_start; i < insn->n_ops; ++i) { + if (insn->ops[i].carrier == smallest->carrier) + insn->ops[i].partner = out_op; + } - /* - * Set the link field of the irn to the def. - * This strongly relies on the fact, that the use is always - * made before the def. - */ - set_irn_link(irn, def); + out_op->partner = smallest; + smallest->partner = out_op; + } + } +} - b->magic = BORDER_FOURCC; - def->magic = BORDER_FOURCC; +static void handle_constraints(be_chordal_alloc_env_t *alloc_env, + ir_node *irn) +{ + int n_regs; + ir_node **alloc_nodes; + //hungarian_problem_t *bp; + int *assignment; + pmap *partners; + int i, n_alloc; + ir_node *perm = NULL; + //int match_res, cost; + be_chordal_env_t *env = alloc_env->chordal_env; + void *base = obstack_base(env->obst); + be_insn_t *insn = be_scan_insn(env, irn); + bipartite_t *bp; + + if (insn->pre_colored) { + int i; + for (i = 0; i < insn->use_start; ++i) + pset_insert_ptr(alloc_env->pre_colored, insn->ops[i].carrier); } /* - * If the def is encountered, the use was made and so was the - * the def node (see the code above). It was placed into the - * link field of the irn, so we can get it there. + * Perms inserted before the constraint handling phase are considered to be + * correctly precolored. These Perms arise during the ABI handling phase. */ - else { - b = get_irn_link(irn); + if (!insn->has_constraints || is_Phi(irn)) + goto end; - assert(b && b->magic == BORDER_FOURCC && "Illegal border encountered"); - } - - b->pressure = pressure; - b->is_def = is_def; - b->is_real = is_real; - b->irn = irn; - b->step = step; - list_add_tail(&b->list, head); - DBG((env->dbg, LEVEL_5, "\t\t%s adding %+F, step: %d\n", is_def ? "def" : "use", irn, step)); - - - return b; -} + n_regs = env->cls->n_regs; + alloc_nodes = ALLOCAN(ir_node*, n_regs); + //bp = hungarian_new(n_regs, n_regs, 2, HUNGARIAN_MATCH_PERFECT); + bp = bipartite_new(n_regs, n_regs); + assignment = ALLOCAN(int, n_regs); + partners = pmap_create(); -/** - * Check, if an irn is of the register class currently under processing. - * @param env The chordal environment. - * @param irn The node. - * @return 1, if the node is of that register class, 0 if not. - */ -static INLINE int has_reg_class(const be_chordal_env_t *env, const ir_node *irn) -{ - return arch_irn_has_reg_class(env->main_env->arch_env, irn, -1, env->cls); -} + /* + * prepare the constraint handling of this node. + * Perms are constructed and Copies are created for constrained values + * interfering with the instruction. + */ + perm = pre_process_constraints(alloc_env->chordal_env, &insn); -#define has_limited_constr(req, irn) \ - (arch_get_register_req(arch_env, (req), irn, -1) && (req)->type == arch_register_req_type_limited) + /* find suitable in operands to the out operands of the node. */ + pair_up_operands(alloc_env, insn); -static int try_pre_color(be_chordal_env_t *env, ir_node *irn, - pset *pre_colored, bitset_t *colors_used) -{ - arch_register_req_t req; + /* + * look at the in/out operands and add each operand (and its possible partner) + * to a bipartite graph (left: nodes with partners, right: admissible colors). + */ + for (i = 0, n_alloc = 0; i < insn->n_ops; ++i) { + be_operand_t *op = &insn->ops[i]; - if(arch_get_register_req(env->main_env->arch_env, &req, irn, -1) && arch_register_req_is(&req, limited)) { + /* + * If the operand has no partner or the partner has not been marked + * for allocation, determine the admissible registers and mark it + * for allocation by associating the node and its partner with the + * set of admissible registers via a bipartite graph. + */ + if (!op->partner || !pmap_contains(partners, op->partner->carrier)) { + ir_node *partner = op->partner ? op->partner->carrier : NULL; + int i; + + pmap_insert(partners, op->carrier, partner); + if (partner != NULL) + pmap_insert(partners, partner, op->carrier); + + /* don't insert a node twice */ + for (i = 0; i < n_alloc; ++i) { + if (alloc_nodes[i] == op->carrier) { + break; + } + } + if (i < n_alloc) + continue; - bitset_t *bs = bitset_alloca(env->cls->n_regs); - const arch_register_t *reg; - int col; + alloc_nodes[n_alloc] = op->carrier; - req.limited(irn, -1, bs); - col = bitset_next_set(bs, 0); - reg = arch_register_for_index(env->cls, col); + DBG((dbg, LEVEL_2, "\tassociating %+F and %+F\n", op->carrier, + partner)); - pset_insert_ptr(pre_colored, irn); - arch_set_irn_register(env->main_env->arch_env, irn, reg); - bitset_set(colors_used, col); + bitset_t const *const bs = get_decisive_partner_regs(op); + if (bs) { + DBG((dbg, LEVEL_2, "\tallowed registers for %+F: %B\n", op->carrier, bs)); - DBG((env->dbg, LEVEL_2, "pre coloring %+F with %s\n", irn, reg->name)); + bitset_foreach(bs, col) { + //hungarian_add(bp, n_alloc, col, 1); + bipartite_add(bp, n_alloc, col); + } + } else { + DBG((dbg, LEVEL_2, "\tallowed registers for %+F: none\n", op->carrier)); + } - return 1; + n_alloc++; + } } - return 0; -} + /* + * Put all nodes which live through the constrained instruction also to the + * allocation bipartite graph. They are considered unconstrained. + */ + if (perm != NULL) { + foreach_out_edge(perm, edge) { + int i; + ir_node *proj = get_edge_src_irn(edge); + be_lv_t *lv = be_get_irg_liveness(env->irg); + + assert(is_Proj(proj)); + + if (!be_values_interfere(lv, proj, irn) + || pmap_contains(partners, proj)) + continue; + + /* don't insert a node twice */ + for (i = 0; i < n_alloc; ++i) { + if (alloc_nodes[i] == proj) { + break; + } + } + if (i < n_alloc) + continue; -/** - * Handle register targeting constraints signaled by a Perm. - * @param alloc_env Private data for the allocation phase. - * @param perm The Perm node guarding the constrained node. - * @return The constrained node. - - Pro-coloring works as follows: - - +-----------------------------------+ - | Perm | - +---.-------.--------.---------.----+ - | | | | - +---+--+ | | | - | Proj | | | | - +------+ | | | - | | | - +--+---+ | | - | Proj | | | - +--.---+ | | - | | | - | +--+---+ | - | | Proj | | - | +------+ | - | | - | +---+--+ - `-. | Proj | Result: - `._ +---.--+ R1 - `. | - `-. | - `._ | - +`.-+--+ - |Constr| Result: - +------+ R2 - - 1) Look at all Projs of the Perm if they have output constraints. - If one has an output constraint, pre-color it, else record it - in the set leftover. Its color has to be chosen after all - constrained nodes are colored. Furthermore record all colors - used in the pre-coloring in the set colors_used. - - 2) Look whether the first node not a Proj (this is the constrained - node due to which the Perm has been inserted) has an output - constraint. If yes, pre-color the node accordingly else do nothing - since the node's input constraints are modelled by the Proj's - output constraint. - - There's one subtle point here: If thenode has an output constraint - and the live range of some Proj ends at that node, we must give - that Proj the color of the constrained node. Otherwise the - available colors may not suffice for the rest of the projs. - - 3) At last, color the Projs which have not been colored yet with the - left over colors. - - So afterwards, everything including the constrained node will - be colored and the assign() phase can complete this coloring. - Note that therefore, we put the pre-colored nodes in a set - called pre_colored(). - */ -static ir_node *handle_constraints_at_perm(be_chordal_alloc_env_t *alloc_env, ir_node *perm) -{ - be_chordal_env_t *env = alloc_env->chordal_env; - firm_dbg_module_t *dbg = env->dbg; - const arch_env_t *arch_env = env->main_env->arch_env; + assert(n_alloc < n_regs); - pset *leftover = pset_new_ptr(8); - pset *pre_colored = pset_new_ptr(8); - bitset_t *colors_used = bitset_alloca(env->cls->n_regs); - ir_node *irn, *cnstr, *last; - int has_cnstr = 0; + alloc_nodes[n_alloc] = proj; + pmap_insert(partners, proj, NULL); - assert(be_is_Perm(perm)); + bitset_foreach(env->allocatable_regs, col) { + //hungarian_add(bp, n_alloc, col, 1); + bipartite_add(bp, n_alloc, col); + } - DBG((dbg, LEVEL_2, "Constraints on %+F\n", perm)); + n_alloc++; + } + } - /* - * Color constrained Projs first. - */ - for(irn = sched_next(perm); is_Proj(irn); irn = sched_next(irn)) - if(!try_pre_color(env, irn, pre_colored, colors_used)) - pset_insert_ptr(leftover, irn); + /* Compute a valid register allocation. */ +#if 0 + hungarian_prepare_cost_matrix(bp, HUNGARIAN_MODE_MAXIMIZE_UTIL); + match_res = hungarian_solve(bp, assignment, &cost, 1); + assert(match_res == 0 && "matching failed"); +#else + /*bipartite_dump_f(stderr, bp);*/ + bipartite_matching(bp, assignment); +#endif - cnstr = irn; - last = irn; + /* Assign colors obtained from the matching. */ + for (i = 0; i < n_alloc; ++i) { + const arch_register_t *reg; + ir_node *irn; - if(get_irn_mode(cnstr) == mode_T) { - for(irn = sched_next(cnstr); is_Proj(irn); irn = sched_next(irn)) - if(!try_pre_color(env, irn, pre_colored, colors_used)) - pset_insert_ptr(leftover, irn); + assert(assignment[i] >= 0 && "there must have been a register assigned (node not register pressure faithful?)"); + reg = arch_register_for_index(env->cls, assignment[i]); - last = sched_prev(irn); - } + irn = alloc_nodes[i]; + if (irn != NULL) { + arch_set_irn_register(irn, reg); + (void) pset_hinsert_ptr(alloc_env->pre_colored, irn); + DBG((dbg, LEVEL_2, "\tsetting %+F to register %s\n", irn, reg->name)); + } - else - try_pre_color(env, cnstr, pre_colored, colors_used); + irn = pmap_get(ir_node, partners, alloc_nodes[i]); + if (irn != NULL) { + arch_set_irn_register(irn, reg); + (void) pset_hinsert_ptr(alloc_env->pre_colored, irn); + DBG((dbg, LEVEL_2, "\tsetting %+F to register %s\n", irn, reg->name)); + } + } - pset_insert_pset_ptr(alloc_env->pre_colored, pre_colored); + /* Allocate the non-constrained Projs of the Perm. */ + if (perm != NULL) { + /* Put the colors of all Projs in a bitset. */ + bitset_t *const bs = bitset_alloca(n_regs); + foreach_out_edge(perm, edge) { + ir_node *proj = get_edge_src_irn(edge); + const arch_register_t *reg = arch_get_irn_register(proj); - for(irn = pset_first(leftover); irn; irn = pset_next(leftover)) { - const arch_register_t *reg; - ir_node *precol; - int colored = 0; - - for(precol = pset_first(pre_colored); precol; precol = pset_next(pre_colored)) { - arch_register_t *pre_col_reg = arch_get_irn_register(arch_env, precol); - - if(!values_interfere(irn, precol)) { - reg = arch_get_irn_register(arch_env, precol); - pset_break(pre_colored); - pset_remove_ptr(pre_colored, precol); - DBG((dbg, LEVEL_2, "non-interfering %+F setting to %s\n", irn, reg->name)); - colored = 1; - break; - } + if (reg != NULL) + bitset_set(bs, reg->index); } - if(!colored) { - int col = bitset_next_clear(colors_used, 0); + /* Assign the not yet assigned Projs of the Perm a suitable color. */ + foreach_out_edge(perm, edge) { + ir_node *proj = get_edge_src_irn(edge); + const arch_register_t *reg = arch_get_irn_register(proj); - assert(col >= 0 && col < env->cls->n_regs && "There must be a register left"); - reg = arch_register_for_index(env->cls, col); + DBG((dbg, LEVEL_2, "\tchecking reg of %+F: %s\n", proj, reg ? reg->name : "")); - DBG((dbg, LEVEL_2, "coloring leftover %+F with %s\n", irn, reg->name)); + if (reg == NULL) { + size_t const col = get_next_free_reg(alloc_env, bs); + reg = arch_register_for_index(env->cls, col); + bitset_set(bs, reg->index); + arch_set_irn_register(proj, reg); + pset_insert_ptr(alloc_env->pre_colored, proj); + DBG((dbg, LEVEL_2, "\tsetting %+F to register %s\n", proj, reg->name)); + } } - - arch_set_irn_register(arch_env, irn, reg); - pset_insert_ptr(alloc_env->pre_colored, irn); - bitset_set(colors_used, reg->index); } - del_pset(leftover); - del_pset(pre_colored); + bipartite_free(bp); + //hungarian_free(bp); + pmap_destroy(partners); - return last; +end: + obstack_free(env->obst, base); } /** * Handle constraint nodes in each basic block. - * be_insert_constr_perms() inserts Perm nodes which perm + * handle_constraints() inserts Perm nodes which perm * over all values live at the constrained node right in front * of the constrained node. These Perms signal a constrained node. - * For further comments, refer to handle_constraints_at_perm(). + * For further comments, refer to handle_constraints(). */ static void constraints(ir_node *bl, void *data) { - be_chordal_alloc_env_t *env = data; - arch_env_t *arch_env = env->chordal_env->main_env->arch_env; - ir_node *irn; - - for(irn = sched_first(bl); !sched_is_end(irn); irn = sched_next(irn)) { - if(be_is_Perm(irn) && arch_irn_has_reg_class(arch_env, irn, 0, env->chordal_env->cls)) - irn = handle_constraints_at_perm(env, irn); - } -} - -/** - * Annotate the register pressure to the nodes and compute - * the liveness intervals. - * @param block The block to do it for. - * @param env_ptr The environment. - */ -static void pressure(ir_node *block, void *env_ptr) -{ -/* Convenience macro for a def */ -#define border_def(irn, step, real) \ - border_add(env, head, irn, step, pressure--, 1, real) - -/* Convenience macro for a use */ -#define border_use(irn, step, real) \ - border_add(env, head, irn, step, ++pressure, 0, real) - - be_chordal_alloc_env_t *alloc_env = env_ptr; - be_chordal_env_t *env = alloc_env->chordal_env; - bitset_t *live = alloc_env->live; - firm_dbg_module_t *dbg = env->dbg; - ir_node *irn; - - int i, n; - unsigned step = 0; - unsigned pressure = 0; - struct list_head *head; - pset *live_in = put_live_in(block, pset_new_ptr_default()); - pset *live_end = put_live_end(block, pset_new_ptr_default()); - - DBG((dbg, LEVEL_1, "Computing pressure in block %+F\n", block)); - bitset_clear_all(live); - - /* Set up the border list in the block info */ - head = obstack_alloc(&env->obst, sizeof(*head)); - INIT_LIST_HEAD(head); - assert(pmap_get(env->border_heads, block) == NULL); - pmap_insert(env->border_heads, block, head); - - /* - * Make final uses of all values live out of the block. - * They are necessary to build up real intervals. - */ - for(irn = pset_first(live_end); irn; irn = pset_next(live_end)) { - if(has_reg_class(env, irn)) { - DBG((dbg, LEVEL_3, "\tMaking live: %+F/%d\n", irn, get_irn_graph_nr(irn))); - bitset_set(live, get_irn_graph_nr(irn)); - border_use(irn, step, 0); - } - } - ++step; - - /* - * Determine the last uses of a value inside the block, since they are - * relevant for the interval borders. - */ - sched_foreach_reverse(block, irn) { - DBG((dbg, LEVEL_1, "\tinsn: %+F, pressure: %d\n", irn, pressure)); - DBG((dbg, LEVEL_2, "\tlive: %b\n", live)); - - /* - * If the node defines some value, which can put into a - * register of the current class, make a border for it. - */ - if(has_reg_class(env, irn)) { - int nr = get_irn_graph_nr(irn); - - bitset_clear(live, nr); - border_def(irn, step, 1); - } - - /* - * If the node is no phi node we can examine the uses. - */ - if(!is_Phi(irn)) { - for(i = 0, n = get_irn_arity(irn); i < n; ++i) { - ir_node *op = get_irn_n(irn, i); - - if(has_reg_class(env, op)) { - int nr = get_irn_graph_nr(op); - - DBG((dbg, LEVEL_4, "\t\tpos: %d, use: %+F\n", i, op)); - - if(!bitset_is_set(live, nr)) { - border_use(op, step, 1); - bitset_set(live, nr); - } - } - } - } - ++step; - } - - /* - * Add initial defs for all values live in. - */ - for(irn = pset_first(live_in); irn; irn = pset_next(live_in)) { - if(has_reg_class(env, irn)) { + be_chordal_alloc_env_t *env = (be_chordal_alloc_env_t*)data; + ir_node *irn; - /* Mark the value live in. */ - bitset_set(live, get_irn_graph_nr(irn)); - - /* Add the def */ - border_def(irn, step, 0); - } + for (irn = sched_first(bl); !sched_is_end(irn);) { + ir_node *const next = sched_next(irn); + handle_constraints(env, irn); + irn = next; } - - - del_pset(live_in); - del_pset(live_end); } static void assign(ir_node *block, void *env_ptr) { - be_chordal_alloc_env_t *alloc_env = env_ptr; + be_chordal_alloc_env_t *alloc_env = (be_chordal_alloc_env_t*)env_ptr; be_chordal_env_t *env = alloc_env->chordal_env; - firm_dbg_module_t *dbg = env->dbg; bitset_t *live = alloc_env->live; bitset_t *colors = alloc_env->colors; - bitset_t *in_colors = alloc_env->in_colors; - const arch_env_t *arch_env = env->main_env->arch_env; - - const ir_node *irn; - border_t *b; - struct list_head *head = get_block_border_head(env, block); - pset *live_in = put_live_in(block, pset_new_ptr_default()); + struct list_head *head = get_block_border_head(env, block); + be_lv_t *lv = be_get_irg_liveness(env->irg); - bitset_clear_all(live); bitset_clear_all(colors); - bitset_clear_all(in_colors); + bitset_clear_all(live); DBG((dbg, LEVEL_4, "Assigning colors for block %+F\n", block)); DBG((dbg, LEVEL_4, "\tusedef chain for block\n")); - list_for_each_entry(border_t, b, head, list) { + foreach_border_head(head, b) { DBG((dbg, LEVEL_4, "\t%s %+F/%d\n", b->is_def ? "def" : "use", - b->irn, get_irn_graph_nr(b->irn))); + b->irn, get_irn_idx(b->irn))); } /* @@ -490,20 +399,19 @@ static void assign(ir_node *block, void *env_ptr) * Since their colors have already been assigned (The dominators were * allocated before), we have to mark their colors as used also. */ - for(irn = pset_first(live_in); irn; irn = pset_next(live_in)) { - if(has_reg_class(env, irn)) { - const arch_register_t *reg = arch_get_irn_register(arch_env, irn); - int col; + be_lv_foreach(lv, block, be_lv_state_in, irn) { + if (arch_irn_consider_in_reg_alloc(env->cls, irn)) { + const arch_register_t *reg = arch_get_irn_register(irn); assert(reg && "Node must have been assigned a register"); - col = arch_register_get_index(reg); + DBG((dbg, LEVEL_4, "%+F has reg %s\n", irn, reg->name)); /* Mark the color of the live in value as used. */ + int const col = reg->index; bitset_set(colors, col); - bitset_set(in_colors, col); /* Mark the value live in. */ - bitset_set(live, get_irn_graph_nr(irn)); + bitset_set(live, get_irn_idx(irn)); } } @@ -512,101 +420,113 @@ static void assign(ir_node *block, void *env_ptr) * elimination order. So, coloring the definitions from first to last * will work. */ - list_for_each_entry_reverse(border_t, b, head, list) { + foreach_border_head(head, b) { ir_node *irn = b->irn; - int nr = get_irn_graph_nr(irn); + int nr = get_irn_idx(irn); + int ignore = arch_irn_is_ignore(irn); /* * Assign a color, if it is a local def. Global defs already have a * color. */ - if(b->is_def && !is_live_in(block, irn)) { + if (b->is_def && !be_is_live_in(lv, block, irn)) { const arch_register_t *reg; - int col = NO_COLOR; + int col; - if(pset_find_ptr(alloc_env->pre_colored, irn)) { - reg = arch_get_irn_register(arch_env, irn); + if (ignore || pset_find_ptr(alloc_env->pre_colored, irn)) { + reg = arch_get_irn_register(irn); col = reg->index; assert(!bitset_is_set(colors, col) && "pre-colored register must be free"); - } - - else { - col = bitset_next_clear(colors, 0); + } else { + col = get_next_free_reg(alloc_env, colors); reg = arch_register_for_index(env->cls, col); - assert(arch_get_irn_register(arch_env, irn) == NULL && "This node must not have been assigned a register yet"); + assert(arch_get_irn_register(irn) == NULL && "This node must not have been assigned a register yet"); } bitset_set(colors, col); - arch_set_irn_register(arch_env, irn, reg); + arch_set_irn_register(irn, reg); - DBG((dbg, LEVEL_1, "\tassigning register %s(%d) to %+F\n", - arch_register_get_name(reg), col, irn)); + DBG((dbg, LEVEL_1, "\tassigning register %s(%d) to %+F\n", reg->name, col, irn)); assert(!bitset_is_set(live, nr) && "Value's definition must not have been encountered"); bitset_set(live, nr); - } - - /* Clear the color upon a use. */ - else if(!b->is_def) { - const arch_register_t *reg = arch_get_irn_register(arch_env, irn); - int col; + } else if (!b->is_def) { + /* Clear the color upon a use. */ + const arch_register_t *reg = arch_get_irn_register(irn); assert(reg && "Register must have been assigned"); - col = arch_register_get_index(reg); - assert(bitset_is_set(live, nr) && "Cannot have a non live use"); - - bitset_clear(colors, col); + bitset_clear(colors, reg->index); bitset_clear(live, nr); } } - - del_pset(live_in); } -void be_ra_chordal_color(be_chordal_env_t *chordal_env) +static void be_ra_chordal_color(be_chordal_env_t *const chordal_env) { - int node_count = get_graph_node_count(chordal_env->irg); - int colors_n = arch_register_class_n_regs(chordal_env->cls); - ir_graph *irg = chordal_env->irg; - be_chordal_alloc_env_t env; + char buf[256]; + const arch_register_class_t *cls = chordal_env->cls; + + int colors_n = arch_register_class_n_regs(cls); + ir_graph *irg = chordal_env->irg; + + be_assure_live_sets(irg); + assure_doms(irg); + + env.chordal_env = chordal_env; + env.colors = bitset_alloca(colors_n); + env.tmp_colors = bitset_alloca(colors_n); + env.pre_colored = pset_new_ptr_default(); + + be_timer_push(T_SPLIT); - if(get_irg_dom_state(irg) != dom_consistent) - compute_doms(irg); + if (chordal_env->opts->dump_flags & BE_CH_DUMP_SPLIT) { + snprintf(buf, sizeof(buf), "%s-split", chordal_env->cls->name); + dump_ir_graph(chordal_env->irg, buf); + } + + be_timer_pop(T_SPLIT); - env.chordal_env = chordal_env; - env.live = bitset_malloc(node_count); - env.colors = bitset_malloc(colors_n); - env.in_colors = bitset_malloc(colors_n); - env.colors_n = colors_n; - env.pre_colored = pset_new_ptr_default(); + be_timer_push(T_CONSTR); /* Handle register targeting constraints */ dom_tree_walk_irg(irg, constraints, NULL, &env); + if (chordal_env->opts->dump_flags & BE_CH_DUMP_CONSTR) { + snprintf(buf, sizeof(buf), "%s-constr", chordal_env->cls->name); + dump_ir_graph(chordal_env->irg, buf); + } + + be_timer_pop(T_CONSTR); + + env.live = bitset_malloc(get_irg_last_idx(chordal_env->irg)); + /* First, determine the pressure */ - dom_tree_walk_irg(irg, pressure, NULL, &env); + dom_tree_walk_irg(irg, create_borders, NULL, env.chordal_env); /* Assign the colors */ dom_tree_walk_irg(irg, assign, NULL, &env); -#ifdef DUMP_INTERVALS - { - char buf[128]; - plotter_t *plotter; - - ir_snprintf(buf, sizeof(buf), "ifg_%s_%F.eps", cls->name, irg); - plotter = new_plotter_ps(buf); - - draw_interval_tree(&draw_chordal_def_opts, chordal_env, plotter, env->arch_env, cls); - plotter_free(plotter); + if (chordal_env->opts->dump_flags & BE_CH_DUMP_TREE_INTV) { + plotter_t *plotter; + ir_snprintf(buf, sizeof(buf), "ifg_%s_%F.eps", chordal_env->cls->name, irg); + plotter = new_plotter_ps(buf); + draw_interval_tree(&draw_chordal_def_opts, chordal_env, plotter); + plotter_free(plotter); } -#endif - - free(env.live); - free(env.colors); - free(env.in_colors); + bitset_free(env.live); del_pset(env.pre_colored); } + +BE_REGISTER_MODULE_CONSTRUCTOR(be_init_chordal) +void be_init_chordal(void) +{ + static be_ra_chordal_coloring_t coloring = { + be_ra_chordal_color + }; + FIRM_DBG_REGISTER(dbg, "firm.be.chordal"); + + be_register_chordal_coloring("default", &coloring); +}