X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fbechordal.c;h=81ac0a1618c4b702e6f6a45e64dd01e877dc3a33;hb=4d7a9507baf1737297cd4f7fc91eab209fd5d398;hp=500e5a746537e2666ac52a188584d94f06d31ef8;hpb=4c66ebcce62ceffb68a891142dd309429e03351a;p=libfirm diff --git a/ir/be/bechordal.c b/ir/be/bechordal.c index 500e5a746..81ac0a161 100644 --- a/ir/be/bechordal.c +++ b/ir/be/bechordal.c @@ -11,6 +11,14 @@ #include "config.h" #endif +#ifdef HAVE_MALLOC_H +#include +#endif + +#ifdef HAVE_ALLOCA_H +#include +#endif + #include #include "obst.h" @@ -18,6 +26,7 @@ #include "list.h" #include "bitset.h" #include "iterator.h" +#include "bipartite.h" #include "irmode_t.h" #include "irgraph_t.h" @@ -33,6 +42,7 @@ #include "benumb_t.h" #include "besched_t.h" #include "belive_t.h" +#include "benode_t.h" #include "bearch.h" #include "beifg.h" @@ -44,11 +54,12 @@ #define NO_COLOR (-1) -#undef DUMP_INTERVALS +#define DUMP_INTERVALS typedef struct _be_chordal_alloc_env_t { be_chordal_env_t *chordal_env; + pset *pre_colored; /**< Set of precolored nodes. */ bitset_t *live; /**< A liveness bitset. */ bitset_t *colors; /**< The color mask. */ bitset_t *in_colors; /**< Colors used by live in values. */ @@ -149,7 +160,320 @@ static INLINE border_t *border_add(be_chordal_env_t *env, struct list_head *head */ static INLINE int has_reg_class(const be_chordal_env_t *env, const ir_node *irn) { - return arch_irn_has_reg_class(env->main_env->arch_env, irn, -1, env->cls); + // return arch_irn_has_reg_class(env->main_env->arch_env, irn, -1, env->cls); + return arch_irn_consider_in_reg_alloc(env->birg->main_env->arch_env, env->cls, irn); +} + +#define has_limited_constr(req, irn) \ + (arch_get_register_req(arch_env, (req), irn, -1) && (req)->type == arch_register_req_type_limited) + +typedef struct _operand_t operand_t; + +struct _operand_t { + ir_node *irn; + ir_node *carrier; + operand_t *partner; + int pos; + arch_register_req_t req; +}; + +typedef struct { + operand_t *ops; + int n_ops; + int use_start; + ir_node *next_insn; + unsigned has_constraints : 1; +} insn_t; + +static insn_t *scan_insn(be_chordal_env_t *env, ir_node *irn, struct obstack *obst) +{ + const arch_env_t *arch_env = env->birg->main_env->arch_env; + operand_t o; + insn_t *insn; + int i, n; + + insn = obstack_alloc(obst, sizeof(insn[0])); + memset(insn, 0, sizeof(insn[0])); + + insn->next_insn = sched_next(irn); + if(get_irn_mode(irn) == mode_T) { + ir_node *p; + + for(p = sched_next(irn); is_Proj(p); p = sched_next(p)) { + if(arch_irn_consider_in_reg_alloc(arch_env, env->cls, p)) { + o.carrier = p; + o.irn = irn; + o.pos = -(get_Proj_proj(p) + 1); + o.partner = NULL; + arch_get_register_req(arch_env, &o.req, p, -1); + obstack_grow(obst, &o, sizeof(o)); + insn->n_ops++; + insn->has_constraints |= arch_register_req_is(&o.req, limited); + } + } + + insn->next_insn = p; + } + + else if(arch_irn_consider_in_reg_alloc(arch_env, env->cls, irn)) { + o.carrier = irn; + o.irn = irn; + o.pos = -1; + o.partner = NULL; + arch_get_register_req(arch_env, &o.req, irn, -1); + obstack_grow(obst, &o, sizeof(o)); + insn->n_ops++; + insn->has_constraints |= arch_register_req_is(&o.req, limited); + } + + insn->use_start = insn->n_ops; + + for(i = 0, n = get_irn_arity(irn); i < n; ++i) { + ir_node *op = get_irn_n(irn, i); + + if(arch_irn_consider_in_reg_alloc(arch_env, env->cls, op)) { + o.carrier = op; + o.irn = irn; + o.pos = i; + o.partner = NULL; + arch_get_register_req(arch_env, &o.req, irn, i); + obstack_grow(obst, &o, sizeof(o)); + insn->n_ops++; + insn->has_constraints |= arch_register_req_is(&o.req, limited); + } + } + + insn->ops = obstack_finish(obst); + return insn; +} + +static operand_t *find_unpaired_use(insn_t *insn, const operand_t *op, int can_be_constrained) +{ + int i; + operand_t *res = NULL; + + for(i = insn->use_start; i < insn->n_ops; ++i) { + operand_t *op = &insn->ops[i]; + int has_constraint = arch_register_req_is(&op->req, limited); + + if(!values_interfere(op->carrier, op->irn) && !op->partner && (!has_constraint || can_be_constrained)) { + if(arch_register_req_is(&op->req, should_be_same) && op->req.other_same == op->carrier) + return op; + else + res = op; + } + } + + return res; +} + +static void pair_up_operands(insn_t *insn) +{ + firm_dbg_module_t *dbg = firm_dbg_register("firm.be.chordal.constr"); + int i; + + for(i = 0; i < insn->use_start; ++i) { + operand_t *op = &insn->ops[i]; + int has_constraint = arch_register_req_is(&op->req, limited); + operand_t *partner = find_unpaired_use(insn, op, !has_constraint); + + if(partner) { + op->partner = partner; + partner->partner = op; + } + } +} + +static ir_node *handle_constraints(be_chordal_alloc_env_t *alloc_env, ir_node *irn) +{ + be_chordal_env_t *env = alloc_env->chordal_env; + void *base = obstack_base(&env->obst); + insn_t *insn = scan_insn(env, irn, &env->obst); + ir_node *res = insn->next_insn; + + if(insn->has_constraints) { + firm_dbg_module_t *dbg = firm_dbg_register("firm.be.chordal.constr"); + const arch_env_t *aenv = env->birg->main_env->arch_env; + int n_regs = env->cls->n_regs; + bitset_t *bs = bitset_alloca(n_regs); + bitset_t *non_ignore = bitset_alloca(n_regs); + ir_node **alloc_nodes = alloca(n_regs * sizeof(alloc_nodes[0])); + bipartite_t *bp = bipartite_new(n_regs, n_regs); + int *assignment = alloca(n_regs * sizeof(assignment[0])); + pmap *partners = pmap_create(); + + int i, n_alloc; + long col; + const ir_edge_t *edge; + ir_node *perm = insert_Perm_after(aenv, env->cls, env->dom_front, sched_prev(irn)); + + arch_put_non_ignore_regs(aenv, env->cls, non_ignore); + + /* Registers are propagated by insert_Perm_after(). Clean them here! */ + if(perm) { + foreach_out_edge(perm, edge) { + ir_node *proj = get_edge_src_irn(edge); + arch_set_irn_register(aenv, proj, NULL); + } + } + + + be_liveness(env->irg); + insn = scan_insn(env, irn, &env->obst); + + DBG((dbg, LEVEL_1, "handling constraints for %+F\n", irn)); + + /* + * If there was no Perm made, nothing was alive in this register class. + * This means, that the node has no operands, thus no input constraints. + * so it had output constraints. The other results then can be assigned freely. + */ + + pair_up_operands(insn); + + for(i = 0, n_alloc = 0; i < insn->n_ops; ++i) { + operand_t *op = &insn->ops[i]; + if(arch_register_req_is(&op->req, limited) && arch_irn_consider_in_reg_alloc(aenv, env->cls, op->carrier)) { + const arch_register_t *reg = arch_get_irn_register(aenv, op->carrier); + + pmap_insert(partners, op->carrier, op->partner ? op->partner->carrier : NULL); + alloc_nodes[n_alloc] = op->carrier; + + DBG((dbg, LEVEL_2, "\tassociating %+F and %+F\n", op->carrier, pmap_get(partners, op->carrier))); + + bitset_clear_all(bs); + op->req.limited(op->req.limited_env, bs); + assert((!reg || bitset_is_set(bs, reg->index)) && "color of pre-colored node is not in its allowed colors"); + bitset_and(bs, non_ignore); + + /* if the node is pre-colored, explicitly allow the color with which it is pre-colored. */ + if(reg) { + bitset_set(bs, reg->index); + } + + DBG((dbg, LEVEL_2, "\tallowed registers for %+F: %B\n", op->carrier, bs)); + + bitset_foreach(bs, col) + bipartite_add(bp, n_alloc, col); + + n_alloc++; + } + } + + if(perm) { + /* Make the input constraints of the node to output constraints of the Perm's Projs */ + for(i = insn->use_start; i < insn->n_ops; ++i) { + operand_t *op = &insn->ops[i]; + + /* + If the operand is an "in" operand, constrained and the carrier is a Proj to the Perm, + then copy the in constraint to the Perm's out constraint + */ + if(arch_register_req_is(&op->req, limited) && is_Proj(op->carrier) && perm == get_Proj_pred(op->carrier)) + be_set_constr_limited(perm, BE_OUT_POS(get_Proj_proj(op->carrier)), &op->req); + } + + foreach_out_edge(perm, edge) { + ir_node *proj = get_edge_src_irn(edge); + + assert(is_Proj(proj)); + + if(values_interfere(proj, irn)) { + assert(n_alloc < n_regs); + alloc_nodes[n_alloc] = proj; + pmap_insert(partners, proj, NULL); + + bitset_clear_all(bs); + arch_get_allocatable_regs(aenv, proj, -1, bs); + bitset_and(bs, non_ignore); + bitset_foreach(bs, col) + bipartite_add(bp, n_alloc, col); + + n_alloc++; + } + } + } + + bipartite_matching(bp, assignment); + + /* Assign colors obtained from the matching. */ + for(i = 0; i < n_alloc; ++i) { + int j; + ir_node *nodes[2]; + const arch_register_t *reg; + + assert(assignment[i] >= 0 && "there must have been a register assigned"); + reg = arch_register_for_index(env->cls, assignment[i]); + + nodes[0] = alloc_nodes[i]; + nodes[1] = pmap_get(partners, alloc_nodes[i]); + + for(j = 0; j < 2; ++j) { + if(!nodes[j]) + continue; + + arch_set_irn_register(aenv, nodes[j], reg); + pset_hinsert_ptr(alloc_env->pre_colored, nodes[j]); + DBG((dbg, LEVEL_2, "\tsetting %+F to register %s\n", nodes[j], reg->name)); + } + } + + + /* Allocate the non-constrained Projs of the Perm. */ + if(perm) { + bitset_clear_all(bs); + + /* Put the colors of all Projs in a bitset. */ + foreach_out_edge(perm, edge) { + ir_node *proj = get_edge_src_irn(edge); + const arch_register_t *reg = arch_get_irn_register(aenv, proj); + + if(reg != NULL) + bitset_set(bs, reg->index); + } + + /* Assign the not yet assigned Projs of the Perm a suitable color. */ + foreach_out_edge(perm, edge) { + ir_node *proj = get_edge_src_irn(edge); + const arch_register_t *reg = arch_get_irn_register(aenv, proj); + + DBG((dbg, LEVEL_2, "\tchecking reg of %+F: %s\n", proj, reg ? reg->name : "")); + + if(reg == NULL) { + col = bitset_next_clear(bs, 0); + reg = arch_register_for_index(env->cls, col); + bitset_set(bs, reg->index); + arch_set_irn_register(aenv, proj, reg); + pset_insert_ptr(alloc_env->pre_colored, proj); + DBG((dbg, LEVEL_2, "\tsetting %+F to register %s\n", proj, reg->name)); + } + } + } + + pmap_destroy(partners); + } + + obstack_free(&env->obst, base); + return res; +} + +/** + * Handle constraint nodes in each basic block. + * be_insert_constr_perms() inserts Perm nodes which perm + * over all values live at the constrained node right in front + * of the constrained node. These Perms signal a constrained node. + * For further comments, refer to handle_constraints_at_perm(). + */ +static void constraints(ir_node *bl, void *data) +{ + firm_dbg_module_t *dbg = firm_dbg_register("firm.be.chordal.constr"); + be_chordal_alloc_env_t *env = data; + arch_env_t *arch_env = env->chordal_env->birg->main_env->arch_env; + ir_node *irn; + + for(irn = sched_first(bl); !sched_is_end(irn);) { + irn = handle_constraints(env, irn); + } } /** @@ -170,6 +494,7 @@ static void pressure(ir_node *block, void *env_ptr) be_chordal_alloc_env_t *alloc_env = env_ptr; be_chordal_env_t *env = alloc_env->chordal_env; + const arch_env_t *arch_env = env->birg->main_env->arch_env; bitset_t *live = alloc_env->live; firm_dbg_module_t *dbg = env->dbg; ir_node *irn; @@ -211,10 +536,10 @@ static void pressure(ir_node *block, void *env_ptr) DBG((dbg, LEVEL_1, "\tinsn: %+F, pressure: %d\n", irn, pressure)); DBG((dbg, LEVEL_2, "\tlive: %b\n", live)); - /* - * If the node defines some value, which can put into a - * register of the current class, make a border for it. - */ + /* + * If the node defines some value, which can put into a + * register of the current class, make a border for it. + */ if(has_reg_class(env, irn)) { int nr = get_irn_graph_nr(irn); @@ -271,15 +596,15 @@ static void assign(ir_node *block, void *env_ptr) bitset_t *live = alloc_env->live; bitset_t *colors = alloc_env->colors; bitset_t *in_colors = alloc_env->in_colors; - const arch_env_t *arch_env = env->main_env->arch_env; + const arch_env_t *arch_env = env->birg->main_env->arch_env; const ir_node *irn; border_t *b; struct list_head *head = get_block_border_head(env, block); pset *live_in = put_live_in(block, pset_new_ptr_default()); - bitset_clear_all(live); bitset_clear_all(colors); + bitset_clear_all(live); bitset_clear_all(in_colors); DBG((dbg, LEVEL_4, "Assigning colors for block %+F\n", block)); @@ -312,7 +637,8 @@ static void assign(ir_node *block, void *env_ptr) } /* - * Mind that the sequence of defs from back to front defines a perfect + * Mind that the sequence + * of defs from back to front defines a perfect * elimination order. So, coloring the definitions from first to last * will work. */ @@ -328,20 +654,26 @@ static void assign(ir_node *block, void *env_ptr) const arch_register_t *reg; int col = NO_COLOR; - DBG((dbg, LEVEL_4, "\tcolors in use: %b\n", colors)); - - col = bitset_next_clear(colors, 0); - reg = arch_register_for_index(env->cls, col); + if(pset_find_ptr(alloc_env->pre_colored, irn)) { + reg = arch_get_irn_register(arch_env, irn); + col = reg->index; + assert(!bitset_is_set(colors, col) && "pre-colored register must be free"); + } - assert(arch_get_irn_register(arch_env, irn) == NULL && "This node must not have been assigned a register yet"); - assert(!bitset_is_set(live, nr) && "Value's definition must not have been encountered"); + else { + col = bitset_next_clear(colors, 0); + reg = arch_register_for_index(env->cls, col); + assert(arch_get_irn_register(arch_env, irn) == NULL && "This node must not have been assigned a register yet"); + } bitset_set(colors, col); - bitset_set(live, nr); - arch_set_irn_register(arch_env, irn, reg); + DBG((dbg, LEVEL_1, "\tassigning register %s(%d) to %+F\n", arch_register_get_name(reg), col, irn)); + + assert(!bitset_is_set(live, nr) && "Value's definition must not have been encountered"); + bitset_set(live, nr); } /* Clear the color upon a use. */ @@ -364,21 +696,32 @@ static void assign(ir_node *block, void *env_ptr) void be_ra_chordal_color(be_chordal_env_t *chordal_env) { - int node_count = get_graph_node_count(chordal_env->irg); + be_chordal_alloc_env_t env; + char buf[256]; + int colors_n = arch_register_class_n_regs(chordal_env->cls); ir_graph *irg = chordal_env->irg; - void *base = obstack_base(&chordal_env->obst); - be_chordal_alloc_env_t env; if(get_irg_dom_state(irg) != dom_consistent) compute_doms(irg); - env.chordal_env = chordal_env; - env.live = bitset_obstack_alloc(&chordal_env->obst, node_count); - env.colors = bitset_obstack_alloc(&chordal_env->obst, colors_n); - env.in_colors = bitset_obstack_alloc(&chordal_env->obst, colors_n); - env.colors_n = colors_n; + env.chordal_env = chordal_env; + env.colors_n = colors_n; + env.colors = bitset_malloc(colors_n); + env.in_colors = bitset_malloc(colors_n); + env.pre_colored = pset_new_ptr_default(); + + /* Handle register targeting constraints */ + dom_tree_walk_irg(irg, constraints, NULL, &env); + + if(chordal_env->opts->dump_flags & BE_CH_DUMP_CONSTR) { + snprintf(buf, sizeof(buf), "-%s-constr", chordal_env->cls->name); + dump_ir_block_graph_sched(chordal_env->irg, buf); + } + + be_numbering(irg); + env.live = bitset_malloc(get_graph_node_count(chordal_env->irg)); /* First, determine the pressure */ dom_tree_walk_irg(irg, pressure, NULL, &env); @@ -386,18 +729,18 @@ void be_ra_chordal_color(be_chordal_env_t *chordal_env) /* Assign the colors */ dom_tree_walk_irg(irg, assign, NULL, &env); -#ifdef DUMP_INTERVALS - { - char buf[128]; - plotter_t *plotter; + be_numbering_done(irg); - ir_snprintf(buf, sizeof(buf), "ifg_%s_%F.eps", cls->name, irg); + if(chordal_env->opts->dump_flags & BE_CH_DUMP_TREE_INTV) { + plotter_t *plotter; + ir_snprintf(buf, sizeof(buf), "ifg_%s_%F.eps", chordal_env->cls->name, irg); plotter = new_plotter_ps(buf); - - draw_interval_tree(&draw_chordal_def_opts, chordal_env, plotter, env->arch_env, cls); + draw_interval_tree(&draw_chordal_def_opts, chordal_env, plotter); plotter_free(plotter); } -#endif - obstack_free(&chordal_env->obst, base); + free(env.live); + free(env.colors); + free(env.in_colors); + del_pset(env.pre_colored); }