X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fbechordal.c;h=5459ad0ace9aab7cc06a670128ab76dcc8fff628;hb=48f0393daa5d5a14ed7e3e32ee2b090759c9371e;hp=81ac0a1618c4b702e6f6a45e64dd01e877dc3a33;hpb=d3377c04f3ad875a8eb3594202b1ab15ffb5a95e;p=libfirm

diff --git a/ir/be/bechordal.c b/ir/be/bechordal.c
index 81ac0a161..5459ad0ac 100644
--- a/ir/be/bechordal.c
+++ b/ir/be/bechordal.c
@@ -1,7 +1,8 @@
 /**
  * Chordal register allocation.
  * @author Sebastian Hack
- * @date 8.12.2004
+ * @date   8.12.2004
+ * @cvs-id $Id$
  *
  * Copyright (C) Universitaet Karlsruhe
  * Released under the GPL
@@ -34,6 +35,7 @@
 #include "irgwalk.h"
 #include "irdump.h"
 #include "irdom.h"
+#include "irtools.h"
 #include "debug.h"
 #include "xmalloc.h"
 
@@ -44,7 +46,10 @@
 #include "belive_t.h"
 #include "benode_t.h"
 #include "bearch.h"
+#include "beirgmod.h"
 #include "beifg.h"
+#include "beinsn_t.h"
+#include "bestatevent.h"
 
 #include "bechordal_t.h"
 #include "bechordal_draw.h"
@@ -59,11 +64,13 @@
 typedef struct _be_chordal_alloc_env_t {
 	be_chordal_env_t *chordal_env;
 
-	pset *pre_colored;    /**< Set of precolored nodes. */
-	bitset_t *live;				/**< A liveness bitset. */
-	bitset_t *colors;			/**< The color mask. */
-	bitset_t *in_colors;        /**< Colors used by live in values. */
-	int colors_n;               /**< The number of colors. */
+	pset *pre_colored;              /**< Set of precolored nodes. */
+	bitset_t *live;				    /**< A liveness bitset. */
+	bitset_t *tmp_colors;           /**< An auxiliary bitset which is as long as the number of colors in the class. */
+	bitset_t *colors;			    /**< The color mask. */
+	bitset_t *in_colors;            /**< Colors used by live in values. */
+	int colors_n;                   /**< The number of colors. */
+	DEBUG_ONLY(firm_dbg_module_t *constr_dbg;)  /**< Debug output for the constraint handler. */
 } be_chordal_alloc_env_t;
 
 #include "fourcc.h"
@@ -71,6 +78,7 @@ typedef struct _be_chordal_alloc_env_t {
 /* Make a fourcc for border checking. */
 #define BORDER_FOURCC				FOURCC('B', 'O', 'R', 'D')
 
+#if 0
 static void check_border_list(struct list_head *head)
 {
   border_t *x;
@@ -87,7 +95,7 @@ static void check_heads(be_chordal_env_t *env)
     check_border_list(ent->value);
   }
 }
-
+#endif
 
 /**
  * Add an interval border to the list of a block's list
@@ -160,196 +168,384 @@ static INLINE border_t *border_add(be_chordal_env_t *env, struct list_head *head
  */
 static INLINE int has_reg_class(const be_chordal_env_t *env, const ir_node *irn)
 {
-	// return arch_irn_has_reg_class(env->main_env->arch_env, irn, -1, env->cls);
-	return arch_irn_consider_in_reg_alloc(env->birg->main_env->arch_env, env->cls, irn);
+	return arch_irn_has_reg_class(env->birg->main_env->arch_env, irn, -1, env->cls);
+	// return arch_irn_consider_in_reg_alloc(env->birg->main_env->arch_env, env->cls, irn);
 }
 
 #define has_limited_constr(req, irn) \
 	(arch_get_register_req(arch_env, (req), irn, -1) && (req)->type == arch_register_req_type_limited)
 
-typedef struct _operand_t operand_t;
+static int get_next_free_reg(const be_chordal_alloc_env_t *alloc_env, bitset_t *colors)
+{
+	bitset_t *tmp = alloc_env->tmp_colors;
+	bitset_copy(tmp, colors);
+	bitset_or(tmp, alloc_env->chordal_env->ignore_colors);
+	return bitset_next_clear(tmp, 0);
+}
 
-struct _operand_t {
-	ir_node *irn;
-	ir_node *carrier;
-	operand_t *partner;
-	int pos;
-	arch_register_req_t req;
-};
-
-typedef struct {
-	operand_t *ops;
-	int n_ops;
-	int use_start;
-	ir_node *next_insn;
-	unsigned has_constraints : 1;
-} insn_t;
-
-static insn_t *scan_insn(be_chordal_env_t *env, ir_node *irn, struct obstack *obst)
+static bitset_t *get_decisive_partner_regs(bitset_t *bs, const be_operand_t *o1, const be_operand_t *o2)
 {
-	const arch_env_t *arch_env = env->birg->main_env->arch_env;
-	operand_t o;
-	insn_t *insn;
-	int i, n;
+	bitset_t *res = bs;
+
+	if(!o1) {
+		bitset_copy(bs, o2->regs);
+		return bs;
+	}
+
+	if(!o2) {
+		bitset_copy(bs, o1->regs);
+		return bs;
+	}
+
+	assert(o1->req.cls == o2->req.cls);
+
+	if(bitset_contains(o1->regs, o2->regs))
+		bitset_copy(bs, o1->regs);
+	else if(bitset_contains(o2->regs, o1->regs))
+		bitset_copy(bs, o2->regs);
+	else
+		res = NULL;
+
+	return res;
+}
+
+static be_insn_t *chordal_scan_insn(be_chordal_env_t *env, ir_node *irn)
+{
+	be_insn_env_t ie;
+
+	ie.ignore_colors = env->ignore_colors;
+	ie.aenv          = env->birg->main_env->arch_env;
+	ie.obst          = &env->obst;
+	ie.cls           = env->cls;
+	return be_scan_insn(&ie, irn);
+}
+
+static ir_node *prepare_constr_insn(be_chordal_env_t *env, ir_node *irn)
+{
+	const arch_env_t *aenv = env->birg->main_env->arch_env;
+	bitset_t *def_constr   = bitset_alloca(env->cls->n_regs);
+	bitset_t *tmp          = bitset_alloca(env->cls->n_regs);
+	ir_node *bl            = get_nodes_block(irn);
+
+	be_insn_t *insn;
+	int i, j;
+
+	for (i = get_irn_arity(irn) - 1; i >= 0; --i) {
+		ir_node *op = get_irn_n(irn, i);
 
-	insn = obstack_alloc(obst, sizeof(insn[0]));
-	memset(insn, 0, sizeof(insn[0]));
-
-	insn->next_insn = sched_next(irn);
-	if(get_irn_mode(irn) == mode_T) {
-		ir_node *p;
-
-		for(p = sched_next(irn); is_Proj(p); p = sched_next(p)) {
-			if(arch_irn_consider_in_reg_alloc(arch_env, env->cls, p)) {
-				o.carrier = p;
-				o.irn     = irn;
-				o.pos     = -(get_Proj_proj(p) + 1);
-				o.partner = NULL;
-				arch_get_register_req(arch_env, &o.req, p, -1);
-				obstack_grow(obst, &o, sizeof(o));
-				insn->n_ops++;
-				insn->has_constraints |= arch_register_req_is(&o.req, limited);
+		const arch_register_t *reg;
+		arch_register_req_t req;
+
+		if (arch_get_irn_reg_class(aenv, irn, i) == env->cls) {
+			reg = arch_get_irn_register(aenv, op);
+
+			if (reg && arch_register_type_is(reg, ignore)) {
+				arch_get_register_req(aenv, &req, irn, i);
+
+				if (arch_register_req_is(&req, limited)) {
+					bitset_clear_all(tmp);
+					req.limited(req.limited_env, tmp);
+
+					if (! bitset_is_set(tmp, reg->index)) {
+						ir_node *copy = be_new_Copy(env->cls, env->irg, bl, op);
+						be_stat_ev("constr_copy", 1);
+
+						sched_add_before(irn, copy);
+						set_irn_n(irn, i, copy);
+						DBG((env->dbg, LEVEL_3, "inserting ignore arg copy %+F for %+F pos %d\n", copy, irn, i));
+					}
+				}
 			}
 		}
+	}
 
-		insn->next_insn = p;
+    insn = chordal_scan_insn(env, irn);
+
+	if(!insn->has_constraints)
+		goto end;
+
+	/* insert copies for nodes that occur constrained more than once. */
+	for(i = insn->use_start; i < insn->n_ops; ++i) {
+		be_operand_t *op = &insn->ops[i];
+
+		if(op->has_constraints) {
+			for(j = i + 1; j < insn->n_ops; ++j) {
+				be_operand_t *a_op = &insn->ops[j];
+
+				if(a_op->carrier == op->carrier && a_op->has_constraints) {
+					ir_node *copy = be_new_Copy(env->cls, env->irg, bl, op->carrier);
+					be_stat_ev("constr_copy", 1);
+
+					sched_add_before(insn->irn, copy);
+					set_irn_n(insn->irn, a_op->pos, copy);
+					DBG((env->dbg, LEVEL_3, "inserting multiple constr copy %+F for %+F pos %d\n", copy, insn->irn, a_op->pos));
+				}
+			}
+		}
 	}
 
-	else if(arch_irn_consider_in_reg_alloc(arch_env, env->cls, irn)) {
-		o.carrier = irn;
-		o.irn     = irn;
-		o.pos     = -1;
-		o.partner = NULL;
-		arch_get_register_req(arch_env, &o.req, irn, -1);
-		obstack_grow(obst, &o, sizeof(o));
-		insn->n_ops++;
-		insn->has_constraints |= arch_register_req_is(&o.req, limited);
+	/* collect all registers occuring in out constraints. */
+	for(i = 0; i < insn->use_start; ++i) {
+		be_operand_t *op = &insn->ops[i];
+		if(op->has_constraints)
+			bitset_or(def_constr, op->regs);
 	}
 
-	insn->use_start = insn->n_ops;
+	/*
+		insert copies for all constrained arguments living through the node
+		and being constrained to a register which also occurs in out constraints.
+	*/
+	for(i = insn->use_start; i < insn->n_ops; ++i) {
+		be_operand_t *op = &insn->ops[i];
 
-	for(i = 0, n = get_irn_arity(irn); i < n; ++i) {
-		ir_node *op = get_irn_n(irn, i);
+		bitset_copy(tmp, op->regs);
+		bitset_and(tmp, def_constr);
 
-		if(arch_irn_consider_in_reg_alloc(arch_env, env->cls, op)) {
-			o.carrier = op;
-			o.irn     = irn;
-			o.pos     = i;
-			o.partner = NULL;
-			arch_get_register_req(arch_env, &o.req, irn, i);
-			obstack_grow(obst, &o, sizeof(o));
-			insn->n_ops++;
-			insn->has_constraints |= arch_register_req_is(&o.req, limited);
+		/*
+			Check, if
+			1) the operand is constrained.
+			2) lives through the node.
+			3) is constrained to a register occuring in out constraints.
+		*/
+		if(op->has_constraints && values_interfere(env->lv, insn->irn, op->carrier) && bitset_popcnt(tmp) > 0) {
+			/*
+				only create the copy if the operand is no copy.
+				this is necessary since the assure constraints phase inserts
+				Copies and Keeps for operands which must be different from the results.
+				Additional copies here would destroy this.
+			*/
+			if(!be_is_Copy(op->carrier)) {
+				ir_node *copy = be_new_Copy(env->cls, env->irg, bl, op->carrier);
+
+				sched_add_before(insn->irn, copy);
+				set_irn_n(insn->irn, op->pos, copy);
+				DBG((env->dbg, LEVEL_3, "inserting constr copy %+F for %+F pos %d\n", copy, insn->irn, op->pos));
+				be_liveness_update(env->lv, op->carrier);
+			}
 		}
 	}
 
-	insn->ops = obstack_finish(obst);
-	return insn;
+end:
+	obstack_free(&env->obst, insn);
+	return insn->next_insn;
 }
 
-static operand_t *find_unpaired_use(insn_t *insn, const operand_t *op, int can_be_constrained)
+static void pre_spill_prepare_constr_walker(ir_node *bl, void *data)
 {
-	int i;
-	operand_t *res = NULL;
+	be_chordal_env_t *env = data;
+	ir_node *irn;
+	for(irn = sched_first(bl); !sched_is_end(irn);) {
+		irn = prepare_constr_insn(env, irn);
+	}
+}
 
-	for(i = insn->use_start; i < insn->n_ops; ++i) {
-		operand_t *op = &insn->ops[i];
-		int has_constraint = arch_register_req_is(&op->req, limited);
-
-		if(!values_interfere(op->carrier, op->irn) && !op->partner && (!has_constraint || can_be_constrained)) {
-			if(arch_register_req_is(&op->req, should_be_same) && op->req.other_same == op->carrier)
-				return op;
-			else
-				res = op;
+void be_pre_spill_prepare_constr(be_chordal_env_t *cenv) {
+	irg_block_walk_graph(cenv->irg, pre_spill_prepare_constr_walker, NULL, (void *) cenv);
+}
+
+static void pair_up_operands(const be_chordal_alloc_env_t *alloc_env, be_insn_t *insn)
+{
+	const be_chordal_env_t *env = alloc_env->chordal_env;
+
+	int n_uses   = be_insn_n_uses(insn);
+	int n_defs   = be_insn_n_defs(insn);
+	bitset_t *bs = bitset_alloca(env->cls->n_regs);
+	int *pairing = alloca(MAX(n_defs, n_uses) * sizeof(pairing[0]));
+
+	int i, j;
+
+	/*
+		For each out operand, try to find an in operand which can be assigned the
+		same register as the out operand.
+	*/
+	for (j = 0; j < insn->use_start; ++j) {
+		int smallest         = -1;
+		int smallest_n_regs  = 2 * env->cls->n_regs + 1;
+		be_operand_t *out_op = &insn->ops[j];
+
+		/* Try to find an in operand which has ... */
+		for(i = insn->use_start; i < insn->n_ops; ++i) {
+			int n_total;
+			const be_operand_t *op = &insn->ops[i];
+
+			if (! values_interfere(env->lv, op->irn, op->carrier) && ! op->partner) {
+				bitset_clear_all(bs);
+				bitset_copy(bs, op->regs);
+				bitset_and(bs, out_op->regs);
+				n_total = bitset_popcnt(op->regs) + bitset_popcnt(out_op->regs);
+
+				if (bitset_popcnt(bs) > 0 && n_total < smallest_n_regs) {
+					smallest = i;
+					smallest_n_regs = n_total;
+				}
+			}
 		}
-	}
 
-	return res;
+		if (smallest >= 0) {
+			be_operand_t *partner = &insn->ops[smallest];
+			out_op->partner  = partner;
+			partner->partner = out_op;
+		}
+	}
 }
 
-static void pair_up_operands(insn_t *insn)
+
+static ir_node *pre_process_constraints(be_chordal_alloc_env_t *alloc_env, be_insn_t **the_insn)
 {
-	firm_dbg_module_t *dbg = firm_dbg_register("firm.be.chordal.constr");
+	be_chordal_env_t *env       = alloc_env->chordal_env;
+	const arch_env_t *aenv      = env->birg->main_env->arch_env;
+	be_insn_t *insn             = *the_insn;
+	ir_node *bl                 = get_nodes_block(insn->irn);
+	ir_node *copy               = NULL;
+	ir_node *perm               = NULL;
+	bitset_t *out_constr        = bitset_alloca(env->cls->n_regs);
+	bitset_t *bs                = bitset_alloca(env->cls->n_regs);
+	DEBUG_ONLY(firm_dbg_module_t *dbg      = alloc_env->constr_dbg;)
+
 	int i;
 
+	assert(insn->has_constraints && "only do this for constrained nodes");
+
+	/*
+		Collect all registers that occur in output constraints.
+		This is necessary, since if the insn has one of these as an input constraint
+		and the corresponding operand interferes with the insn, the operand must
+		be copied.
+	*/
 	for(i = 0; i < insn->use_start; ++i) {
-		operand_t *op      = &insn->ops[i];
-		int has_constraint = arch_register_req_is(&op->req, limited);
-		operand_t *partner = find_unpaired_use(insn, op, !has_constraint);
+		be_operand_t *op = &insn->ops[i];
+		if(op->has_constraints)
+			bitset_or(out_constr, op->regs);
+	}
+
+	(void) bl;
+	(void) copy;
+	(void) bs;
+	DEBUG_ONLY((void) dbg;)
+
+	/*
+		Make the Perm, recompute liveness and re-scan the insn since the
+		in operands are now the Projs of the Perm.
+	*/
+	perm = insert_Perm_after(aenv, env->lv, env->cls, env->dom_front, sched_prev(insn->irn));
+
+	/* Registers are propagated by insert_Perm_after(). Clean them here! */
+	if(perm) {
+		const ir_edge_t *edge;
 
-		if(partner) {
-			op->partner = partner;
-			partner->partner = op;
+		be_stat_ev("constr_perm", get_irn_arity(perm));
+		foreach_out_edge(perm, edge) {
+			ir_node *proj = get_edge_src_irn(edge);
+			arch_set_irn_register(aenv, proj, NULL);
+		}
+
+		/*
+			We also have to re-build the insn since the input operands are now the Projs of
+			the Perm. Recomputing liveness is also a good idea if a Perm is inserted, since
+			the live sets may change.
+		*/
+		// be_liveness_recompute(env->lv);
+		obstack_free(&env->obst, insn);
+		*the_insn = insn = chordal_scan_insn(env, insn->irn);
+
+		/*
+			Copy the input constraints of the insn to the Perm as output
+			constraints. Succeeding phases (coalescing will need that).
+		*/
+		for(i = insn->use_start; i < insn->n_ops; ++i) {
+			be_operand_t *op = &insn->ops[i];
+			ir_node *proj = op->carrier;
+			/*
+				Note that the predecessor must not be a Proj of the Perm,
+				since ignore-nodes are not Perm'ed.
+			*/
+			if(op->has_constraints &&  is_Proj(proj) && get_Proj_pred(proj) == perm) {
+				be_set_constr_limited(perm, BE_OUT_POS(get_Proj_proj(proj)), &op->req);
+			}
 		}
 	}
+
+	return perm;
 }
 
-static ir_node *handle_constraints(be_chordal_alloc_env_t *alloc_env, ir_node *irn)
+static ir_node *handle_constraints(be_chordal_alloc_env_t *alloc_env, ir_node *irn, int *silent)
 {
 	be_chordal_env_t *env  = alloc_env->chordal_env;
 	void *base             = obstack_base(&env->obst);
-	insn_t *insn           = scan_insn(env, irn, &env->obst);
+	be_insn_t *insn        = chordal_scan_insn(env, irn);
 	ir_node *res           = insn->next_insn;
+	int be_silent          = *silent;
+
+	if(insn->pre_colored) {
+		int i;
+		for(i = 0; i < insn->use_start; ++i)
+			pset_insert_ptr(alloc_env->pre_colored, insn->ops[i].carrier);
+	}
+
+	/*
+		If the current node is a barrier toggle the silent flag.
+		If we are in the start block, we are ought to be silent at the beginning,
+		so the toggling activates the constraint handling but skips the barrier.
+		If we are in the end block we handle the in requirements of the barrier
+		and set the rest to silent.
+	*/
+	if(be_is_Barrier(irn))
+		*silent = !*silent;
+
+	if(be_silent)
+		goto end;
 
+	/*
+		Perms inserted before the constraint handling phase are considered to be
+		correctly precolored. These Perms arise during the ABI handling phase.
+	*/
 	if(insn->has_constraints) {
-		firm_dbg_module_t *dbg = firm_dbg_register("firm.be.chordal.constr");
 		const arch_env_t *aenv = env->birg->main_env->arch_env;
 		int n_regs             = env->cls->n_regs;
 		bitset_t *bs           = bitset_alloca(n_regs);
-		bitset_t *non_ignore   = bitset_alloca(n_regs);
 		ir_node **alloc_nodes  = alloca(n_regs * sizeof(alloc_nodes[0]));
 		bipartite_t *bp        = bipartite_new(n_regs, n_regs);
 		int *assignment        = alloca(n_regs * sizeof(assignment[0]));
 		pmap *partners         = pmap_create();
+		DEBUG_ONLY(firm_dbg_module_t *dbg = alloc_env->constr_dbg;)
 
 		int i, n_alloc;
 		long col;
 		const ir_edge_t *edge;
-		ir_node *perm = insert_Perm_after(aenv, env->cls, env->dom_front, sched_prev(irn));
-
-		arch_put_non_ignore_regs(aenv, env->cls, non_ignore);
-
-		/* Registers are propagated by insert_Perm_after(). Clean them here! */
-		if(perm) {
-			foreach_out_edge(perm, edge) {
-				ir_node *proj = get_edge_src_irn(edge);
-				arch_set_irn_register(aenv, proj, NULL);
-			}
-		}
-
-
-		be_liveness(env->irg);
-		insn = scan_insn(env, irn, &env->obst);
-
-		DBG((dbg, LEVEL_1, "handling constraints for %+F\n", irn));
+		ir_node *perm = NULL;
 
 		/*
-		 * If there was no Perm made, nothing was alive in this register class.
-		 * This means, that the node has no operands, thus no input constraints.
-		 * so it had output constraints. The other results then can be assigned freely.
-		 */
+			prepare the constraint handling of this node.
+			Perms are constructed and Copies are created for constrained values
+			interfering with the instruction.
+		*/
+		perm = pre_process_constraints(alloc_env, &insn);
 
-		pair_up_operands(insn);
+		/* find suitable in operands to the out operands of the node. */
+		pair_up_operands(alloc_env, insn);
 
+		/*
+			look at the in/out operands and add each operand (and its possible partner)
+			to a bipartite graph (left: nodes with partners, right: admissible colors).
+		*/
 		for(i = 0, n_alloc = 0; i < insn->n_ops; ++i) {
-			operand_t *op = &insn->ops[i];
-			if(arch_register_req_is(&op->req, limited) && arch_irn_consider_in_reg_alloc(aenv, env->cls, op->carrier)) {
-				const arch_register_t *reg = arch_get_irn_register(aenv, op->carrier);
+			be_operand_t *op = &insn->ops[i];
+
+			/*
+				If the operand has no partner or the partner has not been marked
+				for allocation, determine the admissible registers and mark it
+				for allocation by associating the node and its partner with the
+				set of admissible registers via a bipartite graph.
+			*/
+			if(!op->partner || !pmap_contains(partners, op->partner->carrier)) {
 
 				pmap_insert(partners, op->carrier, op->partner ? op->partner->carrier : NULL);
 				alloc_nodes[n_alloc] = op->carrier;
 
-				DBG((dbg, LEVEL_2, "\tassociating %+F and %+F\n", op->carrier, pmap_get(partners, op->carrier)));
-
-				bitset_clear_all(bs);
-				op->req.limited(op->req.limited_env, bs);
-				assert((!reg || bitset_is_set(bs, reg->index)) && "color of pre-colored node is not in its allowed colors");
-				bitset_and(bs, non_ignore);
+				DBG((dbg, LEVEL_2, "\tassociating %+F and %+F\n", op->carrier, op->partner ? op->partner->carrier : NULL));
 
-				/* if the node is pre-colored, explicitly allow the color with which it is pre-colored. */
-				if(reg) {
-					bitset_set(bs, reg->index);
-				}
+ 				bitset_clear_all(bs);
+				get_decisive_partner_regs(bs, op, op->partner);
 
 				DBG((dbg, LEVEL_2, "\tallowed registers for %+F: %B\n", op->carrier, bs));
 
@@ -360,32 +556,24 @@ static ir_node *handle_constraints(be_chordal_alloc_env_t *alloc_env, ir_node *i
 			}
 		}
 
+		/*
+			Put all nodes which live through the constrained instruction also to the
+			allocation bipartite graph. They are considered unconstrained.
+		*/
 		if(perm) {
-			/* Make the input constraints of the node to output constraints of the Perm's Projs */
-			for(i = insn->use_start; i < insn->n_ops; ++i) {
-				operand_t *op = &insn->ops[i];
-
-				/*
-					If the operand is an "in" operand, constrained and the carrier is a Proj to the Perm,
-					then copy the in constraint to the Perm's out constraint
-				*/
-				if(arch_register_req_is(&op->req, limited) && is_Proj(op->carrier) && perm == get_Proj_pred(op->carrier))
-					be_set_constr_limited(perm, BE_OUT_POS(get_Proj_proj(op->carrier)), &op->req);
-			}
-
 			foreach_out_edge(perm, edge) {
 				ir_node *proj = get_edge_src_irn(edge);
 
 				assert(is_Proj(proj));
 
-				if(values_interfere(proj, irn)) {
+				if(values_interfere(env->lv, proj, irn) && !pmap_contains(partners, proj)) {
 					assert(n_alloc < n_regs);
 					alloc_nodes[n_alloc] = proj;
 					pmap_insert(partners, proj, NULL);
 
 					bitset_clear_all(bs);
-					arch_get_allocatable_regs(aenv, proj, -1, bs);
-					bitset_and(bs, non_ignore);
+					arch_put_non_ignore_regs(aenv, env->cls, bs);
+					bitset_andnot(bs, env->ignore_colors);
 					bitset_foreach(bs, col)
 						bipartite_add(bp, n_alloc, col);
 
@@ -394,13 +582,14 @@ static ir_node *handle_constraints(be_chordal_alloc_env_t *alloc_env, ir_node *i
 			}
 		}
 
+		/* Compute a valid register allocation. */
 		bipartite_matching(bp, assignment);
 
 		/* Assign colors obtained from the matching. */
 		for(i = 0; i < n_alloc; ++i) {
-			int j;
-			ir_node *nodes[2];
 			const arch_register_t *reg;
+			ir_node *nodes[2];
+			int j;
 
 			assert(assignment[i] >= 0 && "there must have been a register assigned");
 			reg = arch_register_for_index(env->cls, assignment[i]);
@@ -421,6 +610,7 @@ static ir_node *handle_constraints(be_chordal_alloc_env_t *alloc_env, ir_node *i
 
 		/* Allocate the non-constrained Projs of the Perm. */
 		if(perm) {
+
 			bitset_clear_all(bs);
 
 			/* Put the colors of all Projs in a bitset. */
@@ -440,7 +630,7 @@ static ir_node *handle_constraints(be_chordal_alloc_env_t *alloc_env, ir_node *i
 				DBG((dbg, LEVEL_2, "\tchecking reg of %+F: %s\n", proj, reg ? reg->name : "<none>"));
 
 				if(reg == NULL) {
-					col = bitset_next_clear(bs, 0);
+					col = get_next_free_reg(alloc_env, bs);
 					reg = arch_register_for_index(env->cls, col);
 					bitset_set(bs, reg->index);
 					arch_set_irn_register(aenv, proj, reg);
@@ -450,29 +640,41 @@ static ir_node *handle_constraints(be_chordal_alloc_env_t *alloc_env, ir_node *i
 			}
 		}
 
+		bipartite_free(bp);
 		pmap_destroy(partners);
 	}
 
+end:
 	obstack_free(&env->obst, base);
 	return res;
 }
 
 /**
  * Handle constraint nodes in each basic block.
- * be_insert_constr_perms() inserts Perm nodes which perm
+ * handle_constraints() inserts Perm nodes which perm
  * over all values live at the constrained node right in front
  * of the constrained node. These Perms signal a constrained node.
- * For further comments, refer to handle_constraints_at_perm().
+ * For further comments, refer to handle_constraints().
  */
 static void constraints(ir_node *bl, void *data)
 {
-	firm_dbg_module_t *dbg      = firm_dbg_register("firm.be.chordal.constr");
 	be_chordal_alloc_env_t *env = data;
-	arch_env_t *arch_env        = env->chordal_env->birg->main_env->arch_env;
+
+	/*
+		Start silent in the start block.
+		The silence remains until the first barrier is seen.
+		Each other block is begun loud.
+	*/
+	int silent                  = bl == get_irg_start_block(get_irn_irg(bl));
 	ir_node *irn;
 
+	/*
+		If the block is the start block search the barrier and
+		start handling constraints from there.
+	*/
+
 	for(irn = sched_first(bl); !sched_is_end(irn);) {
-		irn = handle_constraints(env, irn);
+		irn = handle_constraints(env, irn, &silent);
 	}
 }
 
@@ -494,17 +696,16 @@ static void pressure(ir_node *block, void *env_ptr)
 
 	be_chordal_alloc_env_t *alloc_env = env_ptr;
 	be_chordal_env_t *env             = alloc_env->chordal_env;
-	const arch_env_t *arch_env        = env->birg->main_env->arch_env;
 	bitset_t *live                    = alloc_env->live;
-	firm_dbg_module_t *dbg            = env->dbg;
 	ir_node *irn;
+	DEBUG_ONLY(firm_dbg_module_t *dbg            = env->dbg;)
 
 	int i, n;
 	unsigned step = 0;
 	unsigned pressure = 0;
 	struct list_head *head;
-	pset *live_in = put_live_in(block, pset_new_ptr_default());
-	pset *live_end = put_live_end(block, pset_new_ptr_default());
+	pset *live_in  = be_lv_pset_put_in(env->lv, block, pset_new_ptr_default());
+	pset *live_end = be_lv_pset_put_end(env->lv, block, pset_new_ptr_default());
 
 	DBG((dbg, LEVEL_1, "Computing pressure in block %+F\n", block));
 	bitset_clear_all(live);
@@ -519,10 +720,10 @@ static void pressure(ir_node *block, void *env_ptr)
 	 * Make final uses of all values live out of the block.
 	 * They are necessary to build up real intervals.
 	 */
-	for(irn = pset_first(live_end); irn; irn = pset_next(live_end)) {
+	foreach_pset(live_end, irn) {
 		if(has_reg_class(env, irn)) {
-			DBG((dbg, LEVEL_3, "\tMaking live: %+F/%d\n", irn, get_irn_graph_nr(irn)));
-			bitset_set(live, get_irn_graph_nr(irn));
+			DBG((dbg, LEVEL_3, "\tMaking live: %+F/%d\n", irn, get_irn_idx(irn)));
+			bitset_set(live, get_irn_idx(irn));
 			border_use(irn, step, 0);
 		}
 	}
@@ -534,14 +735,14 @@ static void pressure(ir_node *block, void *env_ptr)
 	 */
 	sched_foreach_reverse(block, irn) {
 		DBG((dbg, LEVEL_1, "\tinsn: %+F, pressure: %d\n", irn, pressure));
-		DBG((dbg, LEVEL_2, "\tlive: %b\n", live));
+		DBG((dbg, LEVEL_2, "\tlive: %B\n", live));
 
 		/*
 		 * If the node defines some value, which can put into a
 		 * register of the current class, make a border for it.
 		 */
 		if(has_reg_class(env, irn)) {
-			int nr = get_irn_graph_nr(irn);
+			int nr = get_irn_idx(irn);
 
 			bitset_clear(live, nr);
 			border_def(irn, step, 1);
@@ -555,14 +756,16 @@ static void pressure(ir_node *block, void *env_ptr)
 				ir_node *op = get_irn_n(irn, i);
 
 				if(has_reg_class(env, op)) {
-					int nr = get_irn_graph_nr(op);
-
-					DBG((dbg, LEVEL_4, "\t\tpos: %d, use: %+F\n", i, op));
+					int nr = get_irn_idx(op);
+					const char *msg = "-";
 
 					if(!bitset_is_set(live, nr)) {
 						border_use(op, step, 1);
 						bitset_set(live, nr);
+						msg = "X";
 					}
+
+					DBG((dbg, LEVEL_4, "\t\t%s pos: %d, use: %+F\n", msg, i, op));
 				}
 			}
 		}
@@ -572,36 +775,35 @@ static void pressure(ir_node *block, void *env_ptr)
 	/*
 	 * Add initial defs for all values live in.
 	 */
-	for(irn = pset_first(live_in); irn; irn = pset_next(live_in)) {
+	foreach_pset(live_in, irn) {
 		if(has_reg_class(env, irn)) {
 
 			/* Mark the value live in. */
-			bitset_set(live, get_irn_graph_nr(irn));
+			bitset_set(live, get_irn_idx(irn));
 
 			/* Add the def */
 			border_def(irn, step, 0);
 		}
 	}
 
-
-  del_pset(live_in);
-  del_pset(live_end);
+	del_pset(live_in);
+	del_pset(live_end);
 }
 
 static void assign(ir_node *block, void *env_ptr)
 {
 	be_chordal_alloc_env_t *alloc_env = env_ptr;
 	be_chordal_env_t *env       = alloc_env->chordal_env;
-	firm_dbg_module_t *dbg      = env->dbg;
 	bitset_t *live              = alloc_env->live;
 	bitset_t *colors            = alloc_env->colors;
 	bitset_t *in_colors         = alloc_env->in_colors;
 	const arch_env_t *arch_env  = env->birg->main_env->arch_env;
+	struct list_head *head      = get_block_border_head(env, block);
+	pset *live_in               = be_lv_pset_put_in(env->lv, block, pset_new_ptr_default());
 
 	const ir_node *irn;
 	border_t *b;
-	struct list_head *head = get_block_border_head(env, block);
-	pset *live_in = put_live_in(block, pset_new_ptr_default());
+	DEBUG_ONLY(firm_dbg_module_t *dbg = env->dbg;)
 
 	bitset_clear_all(colors);
 	bitset_clear_all(live);
@@ -611,7 +813,7 @@ static void assign(ir_node *block, void *env_ptr)
 	DBG((dbg, LEVEL_4, "\tusedef chain for block\n"));
 	list_for_each_entry(border_t, b, head, list) {
 		DBG((dbg, LEVEL_4, "\t%s %+F/%d\n", b->is_def ? "def" : "use",
-					b->irn, get_irn_graph_nr(b->irn)));
+					b->irn, get_irn_idx(b->irn)));
 	}
 
 	/*
@@ -619,7 +821,7 @@ static void assign(ir_node *block, void *env_ptr)
 	 * Since their colors have already been assigned (The dominators were
 	 * allocated before), we have to mark their colors as used also.
 	 */
-	for(irn = pset_first(live_in); irn; irn = pset_next(live_in)) {
+	foreach_pset(live_in, irn) {
 		if(has_reg_class(env, irn)) {
 			const arch_register_t *reg = arch_get_irn_register(arch_env, irn);
 			int col;
@@ -627,12 +829,14 @@ static void assign(ir_node *block, void *env_ptr)
 			assert(reg && "Node must have been assigned a register");
 			col = arch_register_get_index(reg);
 
+			DBG((dbg, LEVEL_4, "%+F has reg %s\n", irn, reg->name));
+
 			/* Mark the color of the live in value as used. */
 			bitset_set(colors, col);
 			bitset_set(in_colors, col);
 
 			/* Mark the value live in. */
-			bitset_set(live, get_irn_graph_nr(irn));
+			bitset_set(live, get_irn_idx(irn));
 		}
 	}
 
@@ -644,33 +848,34 @@ static void assign(ir_node *block, void *env_ptr)
 	 */
 	list_for_each_entry_reverse(border_t, b, head, list) {
 		ir_node *irn = b->irn;
-		int nr = get_irn_graph_nr(irn);
+		int nr       = get_irn_idx(irn);
+		int ignore   = arch_irn_is(arch_env, irn, ignore);
 
 		/*
 		 * Assign a color, if it is a local def. Global defs already have a
 		 * color.
 		 */
-		if(b->is_def && !is_live_in(block, irn)) {
+		if(b->is_def && !be_is_live_in(env->lv, block, irn)) {
 			const arch_register_t *reg;
 			int col = NO_COLOR;
 
-			if(pset_find_ptr(alloc_env->pre_colored, irn)) {
+			if(pset_find_ptr(alloc_env->pre_colored, irn) || ignore) {
 				reg = arch_get_irn_register(arch_env, irn);
 				col = reg->index;
 				assert(!bitset_is_set(colors, col) && "pre-colored register must be free");
 			}
 
 			else {
-				col = bitset_next_clear(colors, 0);
+				col = get_next_free_reg(alloc_env, colors);
 				reg = arch_register_for_index(env->cls, col);
 				assert(arch_get_irn_register(arch_env, irn) == NULL && "This node must not have been assigned a register yet");
+				assert(!arch_register_type_is(reg, ignore) && "Must not assign ignore register");
 			}
 
 			bitset_set(colors, col);
 			arch_set_irn_register(arch_env, irn, reg);
 
-			DBG((dbg, LEVEL_1, "\tassigning register %s(%d) to %+F\n",
-            arch_register_get_name(reg), col, irn));
+			DBG((dbg, LEVEL_1, "\tassigning register %s(%d) to %+F\n", arch_register_get_name(reg), col, irn));
 
 			assert(!bitset_is_set(live, nr) && "Value's definition must not have been encountered");
 			bitset_set(live, nr);
@@ -703,25 +908,26 @@ void be_ra_chordal_color(be_chordal_env_t *chordal_env)
 	ir_graph *irg         = chordal_env->irg;
 
 
-	if(get_irg_dom_state(irg) != dom_consistent)
-		compute_doms(irg);
+	assure_doms(irg);
 
 	env.chordal_env   = chordal_env;
 	env.colors_n      = colors_n;
-	env.colors        = bitset_malloc(colors_n);
-	env.in_colors     = bitset_malloc(colors_n);
+	env.colors        = bitset_alloca(colors_n);
+	env.tmp_colors    = bitset_alloca(colors_n);
+	env.in_colors     = bitset_alloca(colors_n);
 	env.pre_colored   = pset_new_ptr_default();
+	FIRM_DBG_REGISTER(env.constr_dbg, "firm.be.chordal.constr");
+
 
 	/* Handle register targeting constraints */
 	dom_tree_walk_irg(irg, constraints, NULL, &env);
 
 	if(chordal_env->opts->dump_flags & BE_CH_DUMP_CONSTR) {
 		snprintf(buf, sizeof(buf), "-%s-constr", chordal_env->cls->name);
-		dump_ir_block_graph_sched(chordal_env->irg, buf);
+		be_dump(chordal_env->irg, buf, dump_ir_block_graph_sched);
 	}
 
-	be_numbering(irg);
-	env.live = bitset_malloc(get_graph_node_count(chordal_env->irg));
+	env.live = bitset_malloc(get_irg_last_idx(chordal_env->irg));
 
 	/* First, determine the pressure */
 	dom_tree_walk_irg(irg, pressure, NULL, &env);
@@ -732,15 +938,13 @@ void be_ra_chordal_color(be_chordal_env_t *chordal_env)
 	be_numbering_done(irg);
 
 	if(chordal_env->opts->dump_flags & BE_CH_DUMP_TREE_INTV) {
-    	plotter_t *plotter;
+		plotter_t *plotter;
 		ir_snprintf(buf, sizeof(buf), "ifg_%s_%F.eps", chordal_env->cls->name, irg);
-    	plotter = new_plotter_ps(buf);
-    	draw_interval_tree(&draw_chordal_def_opts, chordal_env, plotter);
-    	plotter_free(plotter);
+		plotter = new_plotter_ps(buf);
+		draw_interval_tree(&draw_chordal_def_opts, chordal_env, plotter);
+		plotter_free(plotter);
 	}
 
-	free(env.live);
-	free(env.colors);
-	free(env.in_colors);
+	bitset_free(env.live);
 	del_pset(env.pre_colored);
 }