X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fbechordal.c;h=1fa973b35fe5bf273f0ddaa6e803d0dccadf9643;hb=6e998f91ca26b38b9022cfe5f3316bd3074bf39f;hp=dc6ea1ac5adff195ed8c8f39bbdbb5b2fab8b922;hpb=664c5fbedff1ecee98ca8c8ccbb0fb0e11e7059a;p=libfirm

diff --git a/ir/be/bechordal.c b/ir/be/bechordal.c
index dc6ea1ac5..1fa973b35 100644
--- a/ir/be/bechordal.c
+++ b/ir/be/bechordal.c
@@ -1,33 +1,43 @@
-/**
- * Chordal register allocation.
- * @author Sebastian Hack
- * @date   8.12.2004
- * @cvs-id $Id$
+/*
+ * Copyright (C) 1995-2007 University of Karlsruhe.  All right reserved.
+ *
+ * This file is part of libFirm.
+ *
+ * This file may be distributed and/or modified under the terms of the
+ * GNU General Public License version 2 as published by the Free Software
+ * Foundation and appearing in the file LICENSE.GPL included in the
+ * packaging of this file.
+ *
+ * Licensees holding valid libFirm Professional Edition licenses may use
+ * this file in accordance with the libFirm Commercial License.
+ * Agreement provided with the Software.
  *
- * Copyright (C) Universitaet Karlsruhe
- * Released under the GPL
+ * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
+ * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE.
  */
 
+/**
+ * @file
+ * @brief       Chordal register allocation.
+ * @author      Sebastian Hack
+ * @date        08.12.2004
+ * @version     $Id$
+ */
 #ifdef HAVE_CONFIG_H
 #include "config.h"
 #endif
 
-#ifdef HAVE_MALLOC_H
-#include <malloc.h>
-#endif
-
-#ifdef HAVE_ALLOCA_H
-#include <alloca.h>
-#endif
-
 #include <ctype.h>
 
 #include "obst.h"
 #include "pset.h"
 #include "list.h"
 #include "bitset.h"
+#include "raw_bitset.h"
 #include "iterator.h"
 #include "bipartite.h"
+#include "hungarian.h"
 
 #include "irmode_t.h"
 #include "irgraph_t.h"
@@ -36,30 +46,37 @@
 #include "irdump.h"
 #include "irdom.h"
 #include "irtools.h"
+#include "irbitset.h"
 #include "debug.h"
 #include "xmalloc.h"
+#include "iredges.h"
 
 #include "beutil.h"
 #include "besched.h"
-#include "benumb_t.h"
 #include "besched_t.h"
 #include "belive_t.h"
 #include "benode_t.h"
-#include "bearch.h"
+#include "bearch_t.h"
 #include "beirgmod.h"
 #include "beifg.h"
 #include "beinsn_t.h"
-
+#include "bestatevent.h"
+#include "beirg_t.h"
+#include "beintlive_t.h"
+#include "bera.h"
 #include "bechordal_t.h"
 #include "bechordal_draw.h"
+#include "bemodule.h"
 
-#define DBG_LEVEL SET_LEVEL_0
-#define DBG_LEVEL_CHECK SET_LEVEL_0
+DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
 
 #define NO_COLOR (-1)
 
 #define DUMP_INTERVALS
 
+/* new style assign routine without borders. */
+#undef NEW_STYLE_ASSIGN
+
 typedef struct _be_chordal_alloc_env_t {
 	be_chordal_env_t *chordal_env;
 
@@ -69,7 +86,6 @@ typedef struct _be_chordal_alloc_env_t {
 	bitset_t *colors;			    /**< The color mask. */
 	bitset_t *in_colors;            /**< Colors used by live in values. */
 	int colors_n;                   /**< The number of colors. */
-	DEBUG_ONLY(firm_dbg_module_t *constr_dbg;)  /**< Debug output for the constraint handler. */
 } be_chordal_alloc_env_t;
 
 #include "fourcc.h"
@@ -117,10 +133,10 @@ static INLINE border_t *border_add(be_chordal_env_t *env, struct list_head *head
 	if(!is_def) {
 		border_t *def;
 
-		b = obstack_alloc(&env->obst, sizeof(*b));
+		b = obstack_alloc(env->obst, sizeof(*b));
 
 		/* also allocate the def and tie it to the use. */
-		def = obstack_alloc(&env->obst, sizeof(*def));
+		def = obstack_alloc(env->obst, sizeof(*def));
 		memset(def, 0, sizeof(*def));
 		b->other_end = def;
 		def->other_end = b;
@@ -132,8 +148,8 @@ static INLINE border_t *border_add(be_chordal_env_t *env, struct list_head *head
 		 */
 		set_irn_link(irn, def);
 
-		b->magic = BORDER_FOURCC;
-		def->magic = BORDER_FOURCC;
+		DEBUG_ONLY(b->magic = BORDER_FOURCC);
+		DEBUG_ONLY(def->magic = BORDER_FOURCC);
 	}
 
 	/*
@@ -153,7 +169,7 @@ static INLINE border_t *border_add(be_chordal_env_t *env, struct list_head *head
 	b->irn = irn;
 	b->step = step;
 	list_add_tail(&b->list, head);
-	DBG((env->dbg, LEVEL_5, "\t\t%s adding %+F, step: %d\n", is_def ? "def" : "use", irn, step));
+	DBG((dbg, LEVEL_5, "\t\t%s adding %+F, step: %d\n", is_def ? "def" : "use", irn, step));
 
 
 	return b;
@@ -167,8 +183,7 @@ static INLINE border_t *border_add(be_chordal_env_t *env, struct list_head *head
  */
 static INLINE int has_reg_class(const be_chordal_env_t *env, const ir_node *irn)
 {
-	return arch_irn_has_reg_class(env->birg->main_env->arch_env, irn, -1, env->cls);
-	// return arch_irn_consider_in_reg_alloc(env->birg->main_env->arch_env, env->cls, irn);
+	return arch_irn_consider_in_reg_alloc(env->birg->main_env->arch_env, env->cls, irn);
 }
 
 #define has_limited_constr(req, irn) \
@@ -196,7 +211,7 @@ static bitset_t *get_decisive_partner_regs(bitset_t *bs, const be_operand_t *o1,
 		return bs;
 	}
 
-	assert(o1->req.cls == o2->req.cls);
+	assert(o1->req->cls == o2->req->cls || ! o1->req->cls || ! o2->req->cls);
 
 	if(bitset_contains(o1->regs, o2->regs))
 		bitset_copy(bs, o1->regs);
@@ -214,21 +229,85 @@ static be_insn_t *chordal_scan_insn(be_chordal_env_t *env, ir_node *irn)
 
 	ie.ignore_colors = env->ignore_colors;
 	ie.aenv          = env->birg->main_env->arch_env;
-	ie.obst          = &env->obst;
+	ie.obst          = env->obst;
 	ie.cls           = env->cls;
 	return be_scan_insn(&ie, irn);
 }
 
 static ir_node *prepare_constr_insn(be_chordal_env_t *env, ir_node *irn)
 {
-	be_insn_t *insn      = chordal_scan_insn(env, irn);
-	bitset_t *def_constr = bitset_alloca(env->cls->n_regs);
-	bitset_t *tmp        = bitset_alloca(env->cls->n_regs);
-	int i;
+	const be_irg_t *birg   = env->birg;
+	const arch_env_t *aenv = birg->main_env->arch_env;
+	bitset_t *tmp          = bitset_alloca(env->cls->n_regs);
+	bitset_t *def_constr   = bitset_alloca(env->cls->n_regs);
+	ir_node *bl            = get_nodes_block(irn);
+	be_lv_t *lv            = env->birg->lv;
+
+	be_insn_t *insn;
+	int i, j;
+
+	for (i = get_irn_arity(irn) - 1; i >= 0; --i) {
+		ir_node *op = get_irn_n(irn, i);
+		ir_node *copy;
+		const arch_register_t *reg;
+		const arch_register_req_t *req;
+
+		if (arch_get_irn_reg_class(aenv, irn, i) != env->cls)
+			continue;
+
+		reg = arch_get_irn_register(aenv, op);
+
+		if (reg == NULL || !arch_register_type_is(reg, ignore))
+			continue;
+		if(arch_register_type_is(reg, joker))
+			continue;
+
+		req = arch_get_register_req(aenv, irn, i);
+		if (!arch_register_req_is(req, limited))
+			continue;
+
+		if (rbitset_is_set(req->limited, reg->index))
+			continue;
+
+		copy = be_new_Copy(env->cls, env->irg, bl, op);
+		be_stat_ev("constr_copy", 1);
+
+		sched_add_before(irn, copy);
+		set_irn_n(irn, i, copy);
+		DBG((dbg, LEVEL_3, "inserting ignore arg copy %+F for %+F pos %d\n", copy, irn, i));
+	}
+
+    insn = chordal_scan_insn(env, irn);
 
 	if(!insn->has_constraints)
 		goto end;
 
+	/* insert copies for nodes that occur constrained more than once. */
+	for(i = insn->use_start; i < insn->n_ops; ++i) {
+		be_operand_t *op = &insn->ops[i];
+
+		if(!op->has_constraints)
+			continue;
+
+		for(j = i + 1; j < insn->n_ops; ++j) {
+			ir_node *copy;
+			be_operand_t *a_op = &insn->ops[j];
+
+			if(a_op->carrier != op->carrier || !a_op->has_constraints)
+				continue;
+
+			if (be_is_Copy(get_irn_n(insn->irn, a_op->pos)))
+				continue;
+
+			copy = be_new_Copy(env->cls, env->irg, bl, op->carrier);
+			be_stat_ev("constr_copy", 1);
+
+			sched_add_before(insn->irn, copy);
+			set_irn_n(insn->irn, a_op->pos, copy);
+			DBG((dbg, LEVEL_3, "inserting multiple constr copy %+F for %+F pos %d\n", copy, insn->irn, a_op->pos));
+		}
+	}
+
 	/* collect all registers occuring in out constraints. */
 	for(i = 0; i < insn->use_start; ++i) {
 		be_operand_t *op = &insn->ops[i];
@@ -241,6 +320,7 @@ static ir_node *prepare_constr_insn(be_chordal_env_t *env, ir_node *irn)
 		and being constrained to a register which also occurs in out constraints.
 	*/
 	for(i = insn->use_start; i < insn->n_ops; ++i) {
+		ir_node *copy;
 		be_operand_t *op = &insn->ops[i];
 
 		bitset_copy(tmp, op->regs);
@@ -252,28 +332,30 @@ static ir_node *prepare_constr_insn(be_chordal_env_t *env, ir_node *irn)
 			2) lives through the node.
 			3) is constrained to a register occuring in out constraints.
 		*/
-		if(op->has_constraints && values_interfere(env->lv, insn->irn, op->carrier) && bitset_popcnt(tmp) > 0) {
-			ir_node *bl   = get_nodes_block(insn->irn);
+		if(!op->has_constraints ||
+				!values_interfere(birg, insn->irn, op->carrier) ||
+				bitset_popcnt(tmp) == 0)
+			continue;
 
-			/*
-				only create the copy if the operand is no copy.
-				this is necessary since the assure constraints phase inserts
-				Copies and Keeps for operands which must be different from the results.
-				Additional copies here would destroy this.
-			*/
-			if(!be_is_Copy(op->carrier)) {
-				ir_node *copy = be_new_Copy(env->cls, env->irg, bl, op->carrier);
-
-				sched_add_before(insn->irn, copy);
-				set_irn_n(insn->irn, op->pos, copy);
-				DBG((env->dbg, LEVEL_3, "inserting constr copy %+F for %+F pos %d\n", copy, insn->irn, op->pos));
-				be_liveness_update(env->lv, op->carrier);
-			}
-		}
+		/*
+		   only create the copy if the operand is no copy.
+		   this is necessary since the assure constraints phase inserts
+		   Copies and Keeps for operands which must be different from the results.
+		   Additional copies here would destroy this.
+		 */
+		if (be_is_Copy(get_irn_n(insn->irn, op->pos)))
+			continue;
+
+		copy = be_new_Copy(env->cls, env->irg, bl, op->carrier);
+
+		sched_add_before(insn->irn, copy);
+		set_irn_n(insn->irn, op->pos, copy);
+		DBG((dbg, LEVEL_3, "inserting constr copy %+F for %+F pos %d\n", copy, insn->irn, op->pos));
+		be_liveness_update(lv, op->carrier);
 	}
 
 end:
-	obstack_free(&env->obst, insn);
+	obstack_free(env->obst, insn);
 	return insn->next_insn;
 }
 
@@ -315,16 +397,19 @@ static void pair_up_operands(const be_chordal_alloc_env_t *alloc_env, be_insn_t
 			int n_total;
 			const be_operand_t *op = &insn->ops[i];
 
-			if (! values_interfere(env->lv, op->irn, op->carrier) && ! op->partner) {
-				bitset_clear_all(bs);
-				bitset_copy(bs, op->regs);
-				bitset_and(bs, out_op->regs);
-				n_total = bitset_popcnt(op->regs) + bitset_popcnt(out_op->regs);
+			if (op->partner != NULL)
+				continue;
+			if (values_interfere(env->birg, op->irn, op->carrier))
+				continue;
 
-				if (bitset_popcnt(bs) > 0 && n_total < smallest_n_regs) {
-					smallest = i;
-					smallest_n_regs = n_total;
-				}
+			bitset_clear_all(bs);
+			bitset_copy(bs, op->regs);
+			bitset_and(bs, out_op->regs);
+			n_total = bitset_popcnt(op->regs) + bitset_popcnt(out_op->regs);
+
+			if (bitset_popcnt(bs) > 0 && n_total < smallest_n_regs) {
+				smallest = i;
+				smallest_n_regs = n_total;
 			}
 		}
 
@@ -337,18 +422,15 @@ static void pair_up_operands(const be_chordal_alloc_env_t *alloc_env, be_insn_t
 }
 
 
-static ir_node *pre_process_constraints(be_chordal_alloc_env_t *alloc_env, be_insn_t **the_insn)
+static ir_node *pre_process_constraints(be_chordal_alloc_env_t *alloc_env,
+                                        be_insn_t **the_insn)
 {
 	be_chordal_env_t *env       = alloc_env->chordal_env;
 	const arch_env_t *aenv      = env->birg->main_env->arch_env;
 	be_insn_t *insn             = *the_insn;
-	ir_node *bl                 = get_nodes_block(insn->irn);
-	ir_node *copy               = NULL;
 	ir_node *perm               = NULL;
 	bitset_t *out_constr        = bitset_alloca(env->cls->n_regs);
-	bitset_t *bs                = bitset_alloca(env->cls->n_regs);
-	DEBUG_ONLY(firm_dbg_module_t *dbg      = alloc_env->constr_dbg;)
-
+	const ir_edge_t *edge;
 	int i;
 
 	assert(insn->has_constraints && "only do this for constrained nodes");
@@ -365,75 +447,44 @@ static ir_node *pre_process_constraints(be_chordal_alloc_env_t *alloc_env, be_in
 			bitset_or(out_constr, op->regs);
 	}
 
-	/*
-		Now, figure out which input operand must be copied since it has input
-		constraints which are also output constraints.
-	*/
-	(void) bl;
-	(void) copy;
-	(void) bs;
-	(void) dbg;
-#if 0
-	for(i = insn->use_start; i < insn->n_ops; ++i) {
-		be_operand_t *op = &insn->ops[i];
-		if(op->has_constraints && (values_interfere(env->lv, op->carrier, insn->irn) || arch_irn_is(aenv, op->carrier, ignore))) {
-			bitset_copy(bs, op->regs);
-			bitset_and(bs, out_constr);
-
-			/*
-				The operand (interfering with the node) has input constraints
-				which also occur as output constraints, so insert a copy.
-			*/
-			if(bitset_popcnt(bs) > 0) {
-				copy        = be_new_Copy(op->req.cls, env->irg, bl, op->carrier);
-				op->carrier = copy;
-				sched_add_before(insn->irn, copy);
-				set_irn_n(insn->irn, op->pos, op->carrier);
-
-				DBG((dbg, LEVEL_2, "adding copy for interfering and constrained op %+F\n", op->carrier));
-			}
-		}
-	}
-#endif
-
 	/*
 		Make the Perm, recompute liveness and re-scan the insn since the
 		in operands are now the Projs of the Perm.
 	*/
-	perm = insert_Perm_after(aenv, env->lv, env->cls, env->dom_front, sched_prev(insn->irn));
+	perm = insert_Perm_after(env->birg, env->cls, sched_prev(insn->irn));
 
 	/* Registers are propagated by insert_Perm_after(). Clean them here! */
-	if(perm) {
-		const ir_edge_t *edge;
+	if(perm == NULL)
+		return NULL;
 
-		foreach_out_edge(perm, edge) {
-			ir_node *proj = get_edge_src_irn(edge);
-			arch_set_irn_register(aenv, proj, NULL);
-		}
+	be_stat_ev("constr_perm", get_irn_arity(perm));
+	foreach_out_edge(perm, edge) {
+		ir_node *proj = get_edge_src_irn(edge);
+		arch_set_irn_register(aenv, proj, NULL);
+	}
 
-		/*
-			We also have to re-build the insn since the input operands are now the Projs of
-			the Perm. Recomputing liveness is also a good idea if a Perm is inserted, since
-			the live sets may change.
-		*/
-		// be_liveness_recompute(env->lv);
-		obstack_free(&env->obst, insn);
-		*the_insn = insn = chordal_scan_insn(env, insn->irn);
+	/*
+		We also have to re-build the insn since the input operands are now the Projs of
+		the Perm. Recomputing liveness is also a good idea if a Perm is inserted, since
+		the live sets may change.
+	*/
+	// be_liveness_recompute(lv);
+	obstack_free(env->obst, insn);
+	*the_insn = insn = chordal_scan_insn(env, insn->irn);
 
+	/*
+		Copy the input constraints of the insn to the Perm as output
+		constraints. Succeeding phases (coalescing) will need that.
+	*/
+	for(i = insn->use_start; i < insn->n_ops; ++i) {
+		be_operand_t *op = &insn->ops[i];
+		ir_node *proj = op->carrier;
 		/*
-			Copy the input constraints of the insn to the Perm as output
-			constraints. Succeeding phases (coalescing will need that).
+			Note that the predecessor must not be a Proj of the Perm,
+			since ignore-nodes are not Perm'ed.
 		*/
-		for(i = insn->use_start; i < insn->n_ops; ++i) {
-			be_operand_t *op = &insn->ops[i];
-			ir_node *proj = op->carrier;
-			/*
-				Note that the predecessor must not be a Proj of the Perm,
-				since ignore-nodes are not Perm'ed.
-			*/
-			if(op->has_constraints &&  is_Proj(proj) && get_Proj_pred(proj) == perm) {
-				be_set_constr_limited(perm, BE_OUT_POS(get_Proj_proj(proj)), &op->req);
-			}
+		if(op->has_constraints &&  is_Proj(proj) && get_Proj_pred(proj) == perm) {
+			be_set_constr_limited(perm, BE_OUT_POS(get_Proj_proj(proj)), op->req);
 		}
 	}
 
@@ -442,11 +493,24 @@ static ir_node *pre_process_constraints(be_chordal_alloc_env_t *alloc_env, be_in
 
 static ir_node *handle_constraints(be_chordal_alloc_env_t *alloc_env, ir_node *irn, int *silent)
 {
+	const arch_env_t *aenv;
+	int n_regs;
+	bitset_t *bs;
+	ir_node **alloc_nodes;
+	hungarian_problem_t *bp;
+	int *assignment;
+	pmap *partners;
+	int i, n_alloc;
+	long col;
+	const ir_edge_t *edge;
+	ir_node *perm = NULL;
+	int match_res, cost;
 	be_chordal_env_t *env  = alloc_env->chordal_env;
-	void *base             = obstack_base(&env->obst);
+	void *base             = obstack_base(env->obst);
 	be_insn_t *insn        = chordal_scan_insn(env, irn);
 	ir_node *res           = insn->next_insn;
 	int be_silent          = *silent;
+	be_irg_t *birg         = env->birg;
 
 	if(insn->pre_colored) {
 		int i;
@@ -471,152 +535,156 @@ static ir_node *handle_constraints(be_chordal_alloc_env_t *alloc_env, ir_node *i
 		Perms inserted before the constraint handling phase are considered to be
 		correctly precolored. These Perms arise during the ABI handling phase.
 	*/
-	if(insn->has_constraints) {
-		const arch_env_t *aenv = env->birg->main_env->arch_env;
-		int n_regs             = env->cls->n_regs;
-		bitset_t *bs           = bitset_alloca(n_regs);
-		ir_node **alloc_nodes  = alloca(n_regs * sizeof(alloc_nodes[0]));
-		bipartite_t *bp        = bipartite_new(n_regs, n_regs);
-		int *assignment        = alloca(n_regs * sizeof(assignment[0]));
-		pmap *partners         = pmap_create();
-		DEBUG_ONLY(firm_dbg_module_t *dbg = alloc_env->constr_dbg;)
-
-		int i, n_alloc;
-		long col;
-		const ir_edge_t *edge;
-		ir_node *perm = NULL;
+	if(!insn->has_constraints)
+		goto end;
 
-		/*
-			prepare the constraint handling of this node.
-			Perms are constructed and Copies are created for constrained values
-			interfering with the instruction.
-		*/
-		perm = pre_process_constraints(alloc_env, &insn);
+	aenv        = env->birg->main_env->arch_env;
+	n_regs      = env->cls->n_regs;
+	bs          = bitset_alloca(n_regs);
+	alloc_nodes = alloca(n_regs * sizeof(alloc_nodes[0]));
+	bp          = hungarian_new(n_regs, n_regs, 2, HUNGARIAN_MATCH_PERFECT);
+	// bipartite_t *bp        = bipartite_new(n_regs, n_regs);
+	assignment  = alloca(n_regs * sizeof(assignment[0]));
+	partners    = pmap_create();
 
-		/* find suitable in operands to the out operands of the node. */
-		pair_up_operands(alloc_env, insn);
+	/*
+		prepare the constraint handling of this node.
+		Perms are constructed and Copies are created for constrained values
+		interfering with the instruction.
+	*/
+	perm = pre_process_constraints(alloc_env, &insn);
 
-		/*
-			look at the in/out operands and add each operand (and its possible partner)
-			to a bipartite graph (left: nodes with partners, right: admissible colors).
-		*/
-		for(i = 0, n_alloc = 0; i < insn->n_ops; ++i) {
-			be_operand_t *op = &insn->ops[i];
+	/* find suitable in operands to the out operands of the node. */
+	pair_up_operands(alloc_env, insn);
 
-			/*
-				If the operand has no partner or the partner has not been marked
-				for allocation, determine the admissible registers and mark it
-				for allocation by associating the node and its partner with the
-				set of admissible registers via a bipartite graph.
-			*/
-			if(!op->partner || !pmap_contains(partners, op->partner->carrier)) {
+	/*
+		look at the in/out operands and add each operand (and its possible partner)
+		to a bipartite graph (left: nodes with partners, right: admissible colors).
+	*/
+	for(i = 0, n_alloc = 0; i < insn->n_ops; ++i) {
+		be_operand_t *op = &insn->ops[i];
 
-				pmap_insert(partners, op->carrier, op->partner ? op->partner->carrier : NULL);
-				alloc_nodes[n_alloc] = op->carrier;
+		/*
+			If the operand has no partner or the partner has not been marked
+			for allocation, determine the admissible registers and mark it
+			for allocation by associating the node and its partner with the
+			set of admissible registers via a bipartite graph.
+		*/
+		if(!op->partner || !pmap_contains(partners, op->partner->carrier)) {
 
-				DBG((dbg, LEVEL_2, "\tassociating %+F and %+F\n", op->carrier, op->partner ? op->partner->carrier : NULL));
+			pmap_insert(partners, op->carrier, op->partner ? op->partner->carrier : NULL);
+			alloc_nodes[n_alloc] = op->carrier;
 
- 				bitset_clear_all(bs);
-				get_decisive_partner_regs(bs, op, op->partner);
+			DBG((dbg, LEVEL_2, "\tassociating %+F and %+F\n", op->carrier, op->partner ? op->partner->carrier : NULL));
 
-				DBG((dbg, LEVEL_2, "\tallowed registers for %+F: %B\n", op->carrier, bs));
+			bitset_clear_all(bs);
+			get_decisive_partner_regs(bs, op, op->partner);
 
-				bitset_foreach(bs, col)
-					bipartite_add(bp, n_alloc, col);
+			DBG((dbg, LEVEL_2, "\tallowed registers for %+F: %B\n", op->carrier, bs));
 
-				n_alloc++;
+			bitset_foreach(bs, col) {
+				hungarian_add(bp, n_alloc, col, 1);
+				// bipartite_add(bp, n_alloc, col);
 			}
+
+			n_alloc++;
 		}
+	}
 
-		/*
-			Put all nodes which live by the constrained instruction also to the
-			allocation bipartite graph. They are considered unconstrained.
-		*/
-		if(perm) {
-			foreach_out_edge(perm, edge) {
-				ir_node *proj = get_edge_src_irn(edge);
+	/*
+		Put all nodes which live through the constrained instruction also to the
+		allocation bipartite graph. They are considered unconstrained.
+	*/
+	if(perm != NULL) {
+		foreach_out_edge(perm, edge) {
+			ir_node *proj = get_edge_src_irn(edge);
 
-				assert(is_Proj(proj));
+			assert(is_Proj(proj));
 
-				if(values_interfere(env->lv, proj, irn) && !pmap_contains(partners, proj)) {
-					assert(n_alloc < n_regs);
-					alloc_nodes[n_alloc] = proj;
-					pmap_insert(partners, proj, NULL);
+			if(!values_interfere(birg, proj, irn) || pmap_contains(partners, proj))
+				continue;
 
-					bitset_clear_all(bs);
-					arch_put_non_ignore_regs(aenv, env->cls, bs);
-					bitset_foreach(bs, col)
-						bipartite_add(bp, n_alloc, col);
+			assert(n_alloc < n_regs);
+			alloc_nodes[n_alloc] = proj;
+			pmap_insert(partners, proj, NULL);
 
-					n_alloc++;
-				}
+			bitset_clear_all(bs);
+			arch_put_non_ignore_regs(aenv, env->cls, bs);
+			bitset_andnot(bs, env->ignore_colors);
+			bitset_foreach(bs, col) {
+				hungarian_add(bp, n_alloc, col, 1);
+				// bipartite_add(bp, n_alloc, col);
 			}
+
+			n_alloc++;
 		}
+	}
 
-		/* Compute a valid register allocation. */
-		bipartite_matching(bp, assignment);
+	/* Compute a valid register allocation. */
+	hungarian_prepare_cost_matrix(bp, HUNGARIAN_MODE_MAXIMIZE_UTIL);
+	match_res = hungarian_solve(bp, assignment, &cost, 1);
+	assert(match_res == 0 && "matching failed");
+	//bipartite_matching(bp, assignment);
 
-		/* Assign colors obtained from the matching. */
-		for(i = 0; i < n_alloc; ++i) {
-			const arch_register_t *reg;
-			ir_node *nodes[2];
-			int j;
+	/* Assign colors obtained from the matching. */
+	for(i = 0; i < n_alloc; ++i) {
+		const arch_register_t *reg;
+		ir_node *nodes[2];
+		int j;
 
-			assert(assignment[i] >= 0 && "there must have been a register assigned");
-			reg = arch_register_for_index(env->cls, assignment[i]);
+		assert(assignment[i] >= 0 && "there must have been a register assigned");
+		reg = arch_register_for_index(env->cls, assignment[i]);
 
-			nodes[0] = alloc_nodes[i];
-			nodes[1] = pmap_get(partners, alloc_nodes[i]);
+		nodes[0] = alloc_nodes[i];
+		nodes[1] = pmap_get(partners, alloc_nodes[i]);
 
-			for(j = 0; j < 2; ++j) {
-				if(!nodes[j])
-					continue;
+		for(j = 0; j < 2; ++j) {
+			if(!nodes[j])
+				continue;
 
-				arch_set_irn_register(aenv, nodes[j], reg);
-				pset_hinsert_ptr(alloc_env->pre_colored, nodes[j]);
-				DBG((dbg, LEVEL_2, "\tsetting %+F to register %s\n", nodes[j], reg->name));
-			}
+			arch_set_irn_register(aenv, nodes[j], reg);
+			(void) pset_hinsert_ptr(alloc_env->pre_colored, nodes[j]);
+			DBG((dbg, LEVEL_2, "\tsetting %+F to register %s\n", nodes[j], reg->name));
 		}
+	}
 
+	/* Allocate the non-constrained Projs of the Perm. */
+	if(perm != NULL) {
+		bitset_clear_all(bs);
 
-		/* Allocate the non-constrained Projs of the Perm. */
-		if(perm) {
-
-			bitset_clear_all(bs);
-
-			/* Put the colors of all Projs in a bitset. */
-			foreach_out_edge(perm, edge) {
-				ir_node *proj              = get_edge_src_irn(edge);
-				const arch_register_t *reg = arch_get_irn_register(aenv, proj);
+		/* Put the colors of all Projs in a bitset. */
+		foreach_out_edge(perm, edge) {
+			ir_node *proj              = get_edge_src_irn(edge);
+			const arch_register_t *reg = arch_get_irn_register(aenv, proj);
 
-				if(reg != NULL)
-					bitset_set(bs, reg->index);
-			}
+			if(reg != NULL)
+				bitset_set(bs, reg->index);
+		}
 
-			/* Assign the not yet assigned Projs of the Perm a suitable color. */
-			foreach_out_edge(perm, edge) {
-				ir_node *proj              = get_edge_src_irn(edge);
-				const arch_register_t *reg = arch_get_irn_register(aenv, proj);
+		/* Assign the not yet assigned Projs of the Perm a suitable color. */
+		foreach_out_edge(perm, edge) {
+			ir_node *proj              = get_edge_src_irn(edge);
+			const arch_register_t *reg = arch_get_irn_register(aenv, proj);
 
-				DBG((dbg, LEVEL_2, "\tchecking reg of %+F: %s\n", proj, reg ? reg->name : "<none>"));
+			DBG((dbg, LEVEL_2, "\tchecking reg of %+F: %s\n", proj, reg ? reg->name : "<none>"));
 
-				if(reg == NULL) {
-					col = get_next_free_reg(alloc_env, bs);
-					reg = arch_register_for_index(env->cls, col);
-					bitset_set(bs, reg->index);
-					arch_set_irn_register(aenv, proj, reg);
-					pset_insert_ptr(alloc_env->pre_colored, proj);
-					DBG((dbg, LEVEL_2, "\tsetting %+F to register %s\n", proj, reg->name));
-				}
+			if(reg == NULL) {
+				col = get_next_free_reg(alloc_env, bs);
+				reg = arch_register_for_index(env->cls, col);
+				bitset_set(bs, reg->index);
+				arch_set_irn_register(aenv, proj, reg);
+				pset_insert_ptr(alloc_env->pre_colored, proj);
+				DBG((dbg, LEVEL_2, "\tsetting %+F to register %s\n", proj, reg->name));
 			}
 		}
-
-		bipartite_free(bp);
-		pmap_destroy(partners);
 	}
 
+	//bipartite_free(bp);
+	hungarian_free(bp);
+	pmap_destroy(partners);
+
 end:
-	obstack_free(&env->obst, base);
+	obstack_free(env->obst, base);
 	return res;
 }
 
@@ -669,20 +737,20 @@ static void pressure(ir_node *block, void *env_ptr)
 	be_chordal_env_t *env             = alloc_env->chordal_env;
 	bitset_t *live                    = alloc_env->live;
 	ir_node *irn;
-	DEBUG_ONLY(firm_dbg_module_t *dbg            = env->dbg;)
+	be_lv_t *lv                       = env->birg->lv;
 
 	int i, n;
 	unsigned step = 0;
 	unsigned pressure = 0;
 	struct list_head *head;
-	pset *live_in  = be_lv_pset_put_in(env->lv, block, pset_new_ptr_default());
-	pset *live_end = be_lv_pset_put_end(env->lv, block, pset_new_ptr_default());
+	pset *live_in  = be_lv_pset_put_in(lv, block, pset_new_ptr_default());
+	pset *live_end = be_lv_pset_put_end(lv, block, pset_new_ptr_default());
 
 	DBG((dbg, LEVEL_1, "Computing pressure in block %+F\n", block));
 	bitset_clear_all(live);
 
 	/* Set up the border list in the block info */
-	head = obstack_alloc(&env->obst, sizeof(*head));
+	head = obstack_alloc(env->obst, sizeof(*head));
 	INIT_LIST_HEAD(head);
 	assert(pmap_get(env->border_heads, block) == NULL);
 	pmap_insert(env->border_heads, block, head);
@@ -770,11 +838,11 @@ static void assign(ir_node *block, void *env_ptr)
 	bitset_t *in_colors         = alloc_env->in_colors;
 	const arch_env_t *arch_env  = env->birg->main_env->arch_env;
 	struct list_head *head      = get_block_border_head(env, block);
-	pset *live_in               = be_lv_pset_put_in(env->lv, block, pset_new_ptr_default());
+	be_lv_t *lv                 = env->birg->lv;
+	pset *live_in               = be_lv_pset_put_in(lv, block, pset_new_ptr_default());
 
 	const ir_node *irn;
 	border_t *b;
-	DEBUG_ONLY(firm_dbg_module_t *dbg = env->dbg;)
 
 	bitset_clear_all(colors);
 	bitset_clear_all(live);
@@ -812,8 +880,7 @@ static void assign(ir_node *block, void *env_ptr)
 	}
 
 	/*
-	 * Mind that the sequence
-	 * of defs from back to front defines a perfect
+	 * Mind that the sequence of defs from back to front defines a perfect
 	 * elimination order. So, coloring the definitions from first to last
 	 * will work.
 	 */
@@ -826,17 +893,15 @@ static void assign(ir_node *block, void *env_ptr)
 		 * Assign a color, if it is a local def. Global defs already have a
 		 * color.
 		 */
-		if(b->is_def && !be_is_live_in(env->lv, block, irn)) {
+		if(b->is_def && !be_is_live_in(lv, block, irn)) {
 			const arch_register_t *reg;
 			int col = NO_COLOR;
 
-			if(pset_find_ptr(alloc_env->pre_colored, irn) || ignore) {
+			if(ignore || pset_find_ptr(alloc_env->pre_colored, irn)) {
 				reg = arch_get_irn_register(arch_env, irn);
 				col = reg->index;
 				assert(!bitset_is_set(colors, col) && "pre-colored register must be free");
-			}
-
-			else {
+			} else {
 				col = get_next_free_reg(alloc_env, colors);
 				reg = arch_register_for_index(env->cls, col);
 				assert(arch_get_irn_register(arch_env, irn) == NULL && "This node must not have been assigned a register yet");
@@ -860,7 +925,11 @@ static void assign(ir_node *block, void *env_ptr)
 			assert(reg && "Register must have been assigned");
 
 			col = arch_register_get_index(reg);
-			assert(bitset_is_set(live, nr) && "Cannot have a non live use");
+#ifndef NDEBUG
+			if(!arch_register_type_is(reg, ignore)) {
+				assert(bitset_is_set(live, nr) && "Cannot have a non live use");
+			}
+#endif
 
 			bitset_clear(colors, col);
 			bitset_clear(live, nr);
@@ -870,15 +939,146 @@ static void assign(ir_node *block, void *env_ptr)
 	del_pset(live_in);
 }
 
+/**
+ * A new assign...
+ */
+static void assign_new(ir_node *block, be_chordal_alloc_env_t *alloc_env, bitset_t *live_end_dom)
+{
+	be_chordal_env_t *env      = alloc_env->chordal_env;
+	bitset_t *colors           = alloc_env->colors;
+	bitset_t *in_colors        = alloc_env->in_colors;
+	bitset_t *live             = bitset_irg_malloc(env->irg);
+	const arch_env_t *arch_env = env->birg->main_env->arch_env;
+	be_irg_t *birg             = env->birg;
+	lv_chk_t *lv               = be_get_birg_liveness_chk(birg);
+
+	bitset_pos_t elm;
+	ir_node *irn;
+
+	bitset_clear_all(colors);
+	bitset_clear_all(in_colors);
+
+	/*
+	 * All variables which are live in to this block are live out
+	 * of the immediate dominator thanks to SSA properties. As we
+	 * have already visited the immediate dominator, we know these
+	 * variables. The only tjing left is to check wheather they are live
+	 * in here (they also could be phi arguments to some ohi not
+	 * in this block, hence we have to check).
+	 */
+	bitset_foreach (live_end_dom, elm) {
+		ir_node *irn = get_idx_irn(env->irg, elm);
+		if (lv_chk_bl_in(lv, block, irn)) {
+			const arch_register_t *reg = arch_get_irn_register(arch_env, irn);
+			int col;
+
+			assert(be_is_live_in(env->birg->lv, block, irn));
+			assert(reg && "Node must have been assigned a register");
+			col = arch_register_get_index(reg);
+
+			DBG((dbg, LEVEL_4, "%+F has reg %s\n", irn, reg->name));
+
+			/* Mark the color of the live in value as used. */
+			bitset_set(colors, col);
+			bitset_set(in_colors, col);
+
+			/* Mark the value live in. */
+			bitset_set(live, elm);
+		}
+
+		else {
+			assert(!be_is_live_in(env->birg->lv, block, irn));
+		}
+	}
+
+	/*
+	 * Mind that the sequence of defs from back to front defines a perfect
+	 * elimination order. So, coloring the definitions from first to last
+	 * will work.
+	 */
+	sched_foreach (block, irn) {
+		int nr       = get_irn_idx(irn);
+		int ignore   = arch_irn_is(arch_env, irn, ignore);
+
+		/* Clear the color upon a last use. */
+		if(!is_Phi(irn)) {
+			int i;
+			for (i = get_irn_arity(irn) - 1; i >= 0; --i) {
+				ir_node *op = get_irn_n(irn, i);
+
+				/*
+				 * If the reg class matches and the operand is not live after
+				 * the node, irn is a last use of op and the register can
+				 * be freed.
+				 */
+				if (has_reg_class(env, op)) {
+					if (!be_lv_chk_after_irn(birg, op, irn)) {
+						const arch_register_t *reg = arch_get_irn_register(arch_env, op);
+						int col;
+
+						assert(reg && "Register must have been assigned");
+						col = arch_register_get_index(reg);
+						bitset_clear(colors, col);
+						bitset_clear(live, nr);
+					}
+				}
+			}
+		}
+
+		if (has_reg_class(env, irn)) {
+			const arch_register_t *reg;
+			int col = NO_COLOR;
+
+			/*
+			 * Assign a color, if it is a local def. Global defs already have a
+			 * color.
+			 */
+			if(ignore || pset_find_ptr(alloc_env->pre_colored, irn)) {
+				reg = arch_get_irn_register(arch_env, irn);
+				col = reg->index;
+				assert(!bitset_is_set(colors, col) && "pre-colored register must be free");
+			} else {
+				col = get_next_free_reg(alloc_env, colors);
+				reg = arch_register_for_index(env->cls, col);
+				assert(arch_get_irn_register(arch_env, irn) == NULL && "This node must not have been assigned a register yet");
+				assert(!arch_register_type_is(reg, ignore) && "Must not assign ignore register");
+			}
+
+			bitset_set(colors, col);
+			arch_set_irn_register(arch_env, irn, reg);
+
+			DBG((dbg, LEVEL_1, "\tassigning register %s(%d) to %+F\n", arch_register_get_name(reg), col, irn));
+
+			assert(!bitset_is_set(live, nr) && "Value's definition must not have been encountered");
+			bitset_set(live, nr);
+		}
+
+	}
+
+	dominates_for_each (block, irn) {
+		assign_new(irn, alloc_env, live);
+	}
+
+	bitset_free(live);
+}
+
 void be_ra_chordal_color(be_chordal_env_t *chordal_env)
 {
 	be_chordal_alloc_env_t env;
 	char buf[256];
+	be_irg_t *birg = chordal_env->birg;
+	const arch_register_class_t *cls = chordal_env->cls;
 
-	int colors_n          = arch_register_class_n_regs(chordal_env->cls);
+	int colors_n          = arch_register_class_n_regs(cls);
 	ir_graph *irg         = chordal_env->irg;
+	int allocatable_regs  = colors_n - be_put_ignore_regs(birg, cls, NULL);
 
+	/* some special classes contain only ignore regs, no work to be done */
+	if(allocatable_regs == 0)
+		return;
 
+	be_assure_dom_front(birg);
+	be_assure_liveness(birg);
 	assure_doms(irg);
 
 	env.chordal_env   = chordal_env;
@@ -887,8 +1087,6 @@ void be_ra_chordal_color(be_chordal_env_t *chordal_env)
 	env.tmp_colors    = bitset_alloca(colors_n);
 	env.in_colors     = bitset_alloca(colors_n);
 	env.pre_colored   = pset_new_ptr_default();
-	FIRM_DBG_REGISTER(env.constr_dbg, "firm.be.chordal.constr");
-
 
 	/* Handle register targeting constraints */
 	dom_tree_walk_irg(irg, constraints, NULL, &env);
@@ -898,16 +1096,17 @@ void be_ra_chordal_color(be_chordal_env_t *chordal_env)
 		be_dump(chordal_env->irg, buf, dump_ir_block_graph_sched);
 	}
 
-	be_numbering(irg);
 	env.live = bitset_malloc(get_irg_last_idx(chordal_env->irg));
 
 	/* First, determine the pressure */
 	dom_tree_walk_irg(irg, pressure, NULL, &env);
 
 	/* Assign the colors */
+#ifdef NEW_STYLE_ASSIGN
+	assign_new(get_irg_start_block(irg), &env, env.live);
+#else
 	dom_tree_walk_irg(irg, assign, NULL, &env);
-
-	be_numbering_done(irg);
+#endif
 
 	if(chordal_env->opts->dump_flags & BE_CH_DUMP_TREE_INTV) {
 		plotter_t *plotter;
@@ -920,3 +1119,10 @@ void be_ra_chordal_color(be_chordal_env_t *chordal_env)
 	bitset_free(env.live);
 	del_pset(env.pre_colored);
 }
+
+void be_init_chordal(void)
+{
+	FIRM_DBG_REGISTER(dbg, "firm.be.chordal");
+}
+
+BE_REGISTER_MODULE_CONSTRUCTOR(be_init_chordal);