X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fbearch.h;h=e72e5bfc86bda68f5183acb09be48d41e4b78d80;hb=44fdfafcf4d8940cbdc92266b091f18c62832d3a;hp=f81adc5e41642572b7a0cac83fa34a05b3004179;hpb=bc7b5ee69d084e629590a6977b79a2fab7cd1aa1;p=libfirm diff --git a/ir/be/bearch.h b/ir/be/bearch.h index f81adc5e4..e72e5bfc8 100644 --- a/ir/be/bearch.h +++ b/ir/be/bearch.h @@ -26,6 +26,8 @@ #ifndef FIRM_BE_BEARCH_H #define FIRM_BE_BEARCH_H +#include + #include "firm_types.h" #include "bitset.h" #include "be.h" @@ -68,11 +70,13 @@ typedef enum arch_register_type_t { * Different types of register allocation requirements. */ typedef enum arch_register_req_type_t { - arch_register_req_type_none = 0, /**< No register requirement. */ - arch_register_req_type_normal = 1, /**< All registers in the class are allowed. */ - arch_register_req_type_limited = 2, /**< Only a real subset of the class is allowed. */ - arch_register_req_type_should_be_same = 4, /**< The register should be equal to another one at the node. */ - arch_register_req_type_must_be_different = 8, /**< The register must be unequal from some other at the node. */ + arch_register_req_type_none = 0, /**< No register requirement. */ + arch_register_req_type_normal = 1U << 0, /**< All registers in the class are allowed. */ + arch_register_req_type_limited = 1U << 1, /**< Only a real subset of the class is allowed. */ + arch_register_req_type_should_be_same = 1U << 2, /**< The register should be equal to another one at the node. */ + arch_register_req_type_must_be_different = 1U << 3, /**< The register must be unequal from some other at the node. */ + arch_register_req_type_ignore = 1U << 4, /**< ignore while allocating registers */ + arch_register_req_type_produces_sp = 1U << 5, /**< the output produces a new value for the stack pointer */ } arch_register_req_type_t; extern const arch_register_req_t *arch_no_register_req; @@ -105,9 +109,7 @@ typedef enum arch_irn_flags_t { arch_irn_flags_none = 0, /**< Node flags. */ arch_irn_flags_dont_spill = 1U << 0, /**< This must not be spilled. */ arch_irn_flags_rematerializable = 1U << 1, /**< This can be replicated instead of spilled/reloaded. */ - arch_irn_flags_ignore = 1U << 2, /**< Ignore node during register allocation. */ - arch_irn_flags_modify_sp = 1U << 3, /**< I modify the stack pointer. */ - arch_irn_flags_modify_flags = 1U << 4 /**< I modify flags. */ + arch_irn_flags_modify_flags = 1U << 2 /**< I modify flags. */ } arch_irn_flags_t; void arch_set_frame_offset(ir_node *irn, int bias); @@ -132,19 +134,6 @@ const arch_register_req_t *arch_get_register_req(const ir_node *irn, int pos); #define arch_get_register_req_out(irn) arch_get_register_req(irn, -1) -/** - * Get the number of allocatable registers concerning - * a register class for an operand of a node. - * @param irn The node. - * @param pos The position of the node's operand. - * @param bs The bitset all allocatable registers shall be put into. - * Note, that you can also pass NULL here. If you don't, - * make sure, the bitset is as large as the register class - * has registers. - * @return The amount of registers allocatable for that operand. - */ -int arch_get_allocatable_regs(const ir_node *irn, int pos, bitset_t *bs); - /** * Put all registers which shall not be ignored by the register * allocator in a bit set. @@ -162,6 +151,8 @@ extern void arch_put_non_ignore_regs(const arch_register_class_t *cls, bitset_t */ int arch_reg_is_allocatable(const ir_node *irn, int pos, const arch_register_t *reg); +#define arch_reg_out_is_allocatable(irn, reg) arch_reg_is_allocatable(irn, -1, reg) + /** * Get the register class of an operand of a node. * @param irn The node. @@ -171,12 +162,15 @@ int arch_reg_is_allocatable(const ir_node *irn, int pos, const arch_register_t * */ const arch_register_class_t *arch_get_irn_reg_class(const ir_node *irn, int pos); +#define arch_get_irn_reg_class_out(irn) arch_get_irn_reg_class(irn, -1) + /** * Get the register allocated at a certain output operand of a node. * @param irn The node. * @return The register allocated for this operand */ const arch_register_t *arch_get_irn_register(const ir_node *irn); +const arch_register_t *arch_irn_get_register(const ir_node *irn, int pos); /** * Set the register for a certain output operand. @@ -184,6 +178,7 @@ const arch_register_t *arch_get_irn_register(const ir_node *irn); * @param reg The register. */ void arch_set_irn_register(ir_node *irn, const arch_register_t *reg); +void arch_irn_set_register(ir_node *irn, int pos, const arch_register_t *reg); /** * Classify a node. @@ -201,13 +196,10 @@ arch_irn_class_t arch_irn_classify(const ir_node *irn); */ arch_irn_flags_t arch_irn_get_flags(const ir_node *irn); -#define arch_irn_is(irn, flag) ((arch_irn_get_flags(irn) & arch_irn_flags_ ## flag) != 0) +void arch_irn_set_flags(ir_node *node, arch_irn_flags_t flags); +void arch_irn_add_flags(ir_node *node, arch_irn_flags_t flags); -#define arch_irn_has_reg_class(irn, pos, cls) \ - ((cls) == arch_get_irn_reg_class(irn, pos)) - -#define arch_irn_consider_in_reg_alloc(cls, irn) \ - (arch_irn_has_reg_class(irn, -1, cls) && !arch_irn_is(irn, ignore)) +#define arch_irn_is(irn, flag) ((arch_irn_get_flags(irn) & arch_irn_flags_ ## flag) != 0) /** * Get the operations of an irn.