X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fbearch.h;h=ddb9c32761ff196f9e46a4eb46d4155afa155c9d;hb=38efd2ac16aa827ae9f07acc9ebfc7d74422290e;hp=a31def637085e4c832a6cd3d995da3c1fcd66326;hpb=dc932bff14044e8511d693085fce630cbf4b9dd3;p=libfirm diff --git a/ir/be/bearch.h b/ir/be/bearch.h index a31def637..ddb9c3276 100644 --- a/ir/be/bearch.h +++ b/ir/be/bearch.h @@ -1,86 +1,71 @@ -#ifndef _FIRM_BEARCH_H -#define _FIRM_BEARCH_H - -#include "firm_config.h" - -#ifdef WITH_LIBCORE -#include -#endif - -#include "irnode.h" -#include "irmode.h" - -#include "bitset.h" -#include "hashptr.h" -#include "fourcc.h" -#include "set.h" -#include "list.h" -#include "ident.h" - -#include "belistsched.h" - -typedef struct _arch_register_class_t arch_register_class_t; -typedef struct _arch_register_t arch_register_t; -typedef struct _arch_enum_t arch_enum_t; -typedef struct _arch_enum_member_t arch_enum_member_t; -typedef struct _arch_isa_if_t arch_isa_if_t; -typedef struct _arch_isa_t arch_isa_t; -typedef struct _arch_env_t arch_env_t; -typedef struct _arch_irn_ops_t arch_irn_ops_t; -typedef struct _arch_irn_handler_t arch_irn_handler_t; -typedef struct _arch_code_generator_t arch_code_generator_t; -typedef struct _arch_code_generator_if_t arch_code_generator_if_t; - -struct _be_node_factory_t; - -typedef enum _arch_register_type_t { - arch_register_type_none = 0, - arch_register_type_write_invariant, - arch_register_type_caller_saved, /**< The register must be saved by the caller - upon a function call. It thus can be overwritten - in the called function. */ - arch_register_type_callee_saved, /**< The register must be saved by the called function, - it thus survives a function call. */ - arch_register_type_ignore /**< Do not consider this register when allocating. */ -} arch_register_type_t; - -/** - * A register. +/* + * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved. + * + * This file is part of libFirm. + * + * This file may be distributed and/or modified under the terms of the + * GNU General Public License version 2 as published by the Free Software + * Foundation and appearing in the file LICENSE.GPL included in the + * packaging of this file. + * + * Licensees holding valid libFirm Professional Edition licenses may use + * this file in accordance with the libFirm Commercial License. + * Agreement provided with the Software. + * + * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE + * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE. */ -struct _arch_register_t { - const char *name; /**< The name of the register. */ - const arch_register_class_t *reg_class; /**< The class the register belongs to. */ - int index; /**< The index of the register in the class. */ - arch_register_type_t type; /**< The type of the register. */ - void *data; /**< Custom data. */ -}; - -static INLINE const arch_register_class_t * -_arch_register_get_class(const arch_register_t *reg) -{ - return reg->reg_class; -} - -static INLINE int _arch_register_get_index(const arch_register_t *reg) -{ - return reg->index; -} - -#define arch_register_get_class(reg) _arch_register_get_class(reg) -#define arch_register_get_index(reg) _arch_register_get_index(reg) -#define arch_register_get_name(reg) ((reg)->name) /** - * A class of registers. - * Like general purpose or floating point. + * @file + * @brief Processor architecture specification. + * @author Sebastian Hack + * @version $Id$ */ -struct _arch_register_class_t { - const char *name; /**< The name of the register class. */ - int n_regs; /**< Number of registers in this class. */ - const arch_register_t *regs; /**< The array of registers. */ -}; +#ifndef FIRM_BE_BEARCH_H +#define FIRM_BE_BEARCH_H -#define arch_register_class_n_regs(cls) ((cls)->n_regs) +#include "firm_types.h" +#include "bitset.h" +#include "be.h" +#include "obst.h" + +typedef struct arch_register_class_t arch_register_class_t; +typedef struct arch_register_req_t arch_register_req_t; +typedef struct arch_register_t arch_register_t; +typedef struct arch_flag_t arch_flag_t; +typedef struct arch_inverse_t arch_inverse_t; +typedef struct arch_isa_if_t arch_isa_if_t; +typedef struct arch_isa_t arch_isa_t; +typedef struct arch_env_t arch_env_t; +typedef struct arch_irn_ops_if_t arch_irn_ops_if_t; +typedef struct arch_irn_ops_t arch_irn_ops_t; +typedef struct arch_code_generator_t arch_code_generator_t; +typedef struct arch_code_generator_if_t arch_code_generator_if_t; + +typedef enum arch_register_class_flags_t { + arch_register_class_flag_none = 0, + arch_register_class_flag_manual_ra = 1, /**< don't do automatic register allocation for this class */ + arch_register_class_flag_state = 2 +} arch_register_class_flags_t; + +typedef enum arch_register_type_t { + arch_register_type_none = 0, + arch_register_type_caller_save = 1, /**< The register must be saved by the caller + upon a function call. It thus can be overwritten + in the called function. */ + arch_register_type_callee_save = 2, /**< The register must be saved by the caller + upon a function call. It thus can be overwritten + in the called function. */ + arch_register_type_ignore = 4, /**< Do not consider this register when allocating. */ + arch_register_type_joker = 8, /**< The emitter can choose an arbitrary register */ + arch_register_type_virtual = 16, /**< This is just a virtual register.Virtual registers have + nearly no constraints, it is a allowed to have multiple + definition for the same register at a point) */ + arch_register_type_state = 32, /**< The register represents a state that should be handled by + bestate code */ +} arch_register_type_t; /** * Put all registers in a class into a bitset. @@ -90,178 +75,87 @@ struct _arch_register_class_t { */ extern int arch_register_class_put(const arch_register_class_t *cls, bitset_t *bs); -static INLINE const arch_register_t * -_arch_register_for_index(const arch_register_class_t *cls, int idx) -{ - assert(0 <= idx && idx < cls->n_regs); - return &cls->regs[idx]; -} - -#define arch_register_for_index(cls, idx) \ - _arch_register_for_index(cls, idx) - -/** - * Get the register set for a register class. - * @param cls The register class. - * @return The set containing all registers in the class. - */ -#define arch_get_register_set_for_class(cls) ((cls)->set) - -/** - * An immediate. - */ -struct _arch_immediate_t { - const char *name; /**< The name of the immediate. */ - ir_mode *mode; /**< The mode of the immediate. */ -}; - -/** - * The member of an enum. - */ -struct _arch_enum_member_t { - arch_enum_t *enm; /**< The enum, this member belongs to. */ -}; - -/** - * An enumeration operand type. - * - * Enumeration operand types can be used to describe the variants - * of an instruction, like giving the cases for a compare (gt, lt, - * eq, ...) some other special attributes of an instruction. - */ -struct _arch_enum_t { - int n_members; /**< The number of members in this enum. */ - arch_enum_member_t *members[1]; /**< The array of members. */ -}; - -typedef enum _arch_operand_type_t { - arch_operand_type_invalid, - arch_operand_type_memory, - arch_operand_type_register, - arch_operand_type_immediate, - arch_operand_type_symconst, - arch_operand_type_last +typedef enum arch_operand_type_t { + arch_operand_type_invalid, + arch_operand_type_memory, + arch_operand_type_register, + arch_operand_type_immediate, + arch_operand_type_symconst, + arch_operand_type_last } arch_operand_type_t; /** * Different types of register allocation requirements. */ -typedef enum _arch_register_req_type_t { - arch_register_req_type_none = 0, /**< No register requirement. */ - - arch_register_req_type_normal = 1, /**< All registers in the class - are allowed. */ - - arch_register_req_type_limited = 2, /**< Only a real subset of - the class is allowed. */ - - arch_register_req_type_equal = 4, /**< The register must equal - another one at the node. */ - - arch_register_req_type_unequal = 8, /**< The register must be unequal - to some other at the node. */ - - arch_register_req_type_pair = 16 /**< The register is part of a - register pair. */ +typedef enum arch_register_req_type_t { + arch_register_req_type_none = 0, /**< No register requirement. */ + arch_register_req_type_normal = 1, /**< All registers in the class are allowed. */ + arch_register_req_type_limited = 2, /**< Only a real subset of the class is allowed. */ + arch_register_req_type_should_be_same = 4, /**< The register should be equal to another one at the node. */ + arch_register_req_type_should_be_different = 8, /**< The register must be unequal from some other at the node. */ } arch_register_req_type_t; -#define arch_register_req_is_constr(x) \ - ((x)->type & (arch_register_req_type_pair + arch_register_req_type_limited - 1) != 0) +extern const arch_register_req_t *arch_no_register_req; /** - * Expresses requirements to register allocation for an operand. + * Format a register requirements information into a string. + * @param buf The string where to put it to. + * @param len The size of @p buf. + * @param req The requirements structure to format. + * @return A pointer to buf. */ -typedef struct _arch_register_req_t { - arch_register_req_type_t type; /**< The type of the constraint. */ - const arch_register_class_t *cls; /**< The register class this - constraint belongs to. */ - union { - int (*limited)(const ir_node *irn, int pos, bitset_t *bs); - /**< In case of the 'limited' - constraint, this function - must put all allowable - registers in the bitset and - return the number of registers - in the bitset. */ - - int pos; /**< In case of the equal constraint, - this gives the position of the - operand to which the register of - this should be equal to. Same for - unequal. */ - } data; -} arch_register_req_t; +extern char *arch_register_req_format(char *buf, size_t len, const arch_register_req_t *req, const ir_node *node); /** - * Certain node classes which are relevent for the register allocator. + * Certain node classes which are relevant for the register allocator. */ -typedef enum _arch_irn_class_t { - arch_irn_class_normal, - arch_irn_class_spill, - arch_irn_class_reload, - arch_irn_class_copy, - arch_irn_class_perm, - arch_irn_class_branch +typedef enum arch_irn_class_t { + arch_irn_class_normal = 1 << 0, + arch_irn_class_spill = 1 << 1, + arch_irn_class_reload = 1 << 2, + arch_irn_class_copy = 1 << 3, + arch_irn_class_perm = 1 << 4, + arch_irn_class_branch = 1 << 5, + arch_irn_class_call = 1 << 6, + arch_irn_class_load = 1 << 7, + arch_irn_class_store = 1 << 8, + arch_irn_class_stackparam = 1 << 9, } arch_irn_class_t; /** * Some flags describing a node in more detail. */ -typedef enum _arch_irn_flags_t { - arch_irn_flags_spillable = 1, - arch_irn_flags_rematerializable = 2 +typedef enum arch_irn_flags_t { + arch_irn_flags_none = 0, /**< Node flags. */ + arch_irn_flags_dont_spill = 1, /**< This must not be spilled. */ + arch_irn_flags_rematerializable = 2, /**< This can be replicated instead of spilled/reloaded. */ + arch_irn_flags_ignore = 4, /**< Ignore node during register allocation. */ + arch_irn_flags_modify_sp = 8, /**< I modify the stack pointer. */ + arch_irn_flags_modify_flags = 16, /**< I modify flags. */ + arch_irn_flags_last = arch_irn_flags_modify_flags } arch_irn_flags_t; -struct _arch_irn_ops_t { - - /** - * Get the register requirements for a given operand. - * @param self The self pointer. - * @param irn The node. - * @param pos The operand's position - * (-1 for the result of the node, 0..n for the input - * operands). - * @return The register requirements for the selected operand. - * The pointer returned is never NULL. - */ - const arch_register_req_t *(*get_irn_reg_req)(const arch_irn_ops_t *self, - arch_register_req_t *req, const ir_node *irn, int pos); - - /** - * Set the register for an output operand. - * @param irn The node. - * @param reg The register allocated to that operand. - * @note If the operand is not a register operand, - * the call is ignored. - */ - void (*set_irn_reg)(const arch_irn_ops_t *self, ir_node *irn, const arch_register_t *reg); - - /** - * Get the register allocated for an output operand. - * @param irn The node. - * @return The register allocated at that operand. NULL, if - * the operand was no register operand or - * @c arch_register_invalid, if no register has yet been - * allocated for this node. - */ - const arch_register_t *(*get_irn_reg)(const arch_irn_ops_t *self, const ir_node *irn); - - /** - * Classify the node. - * @param irn The node. - * @return A classification. - */ - arch_irn_class_t (*classify)(const arch_irn_ops_t *self, const ir_node *irn); - - /** - * Get the flags of a node. - * @param self The irn ops themselves. - * @param irn The node. - * @return A set of flags. - */ - arch_irn_flags_t (*get_flags)(const arch_irn_ops_t *self, const ir_node *irn); - -}; +/** + * Get the string representation of a flag. + * This functions does not handle or'ed bitmasks of flags. + * @param flag The flag. + * @return The flag as a string. + */ +extern const char *arch_irn_flag_str(arch_irn_flags_t flag); + +extern const arch_irn_ops_t *arch_get_irn_ops(const arch_env_t *env, + const ir_node *irn); + +extern void arch_set_frame_offset(const arch_env_t *env, ir_node *irn, int bias); + +extern ir_entity *arch_get_frame_entity(const arch_env_t *env, const ir_node *irn); +extern void arch_set_frame_entity(const arch_env_t *env, ir_node *irn, ir_entity *ent); +extern int arch_get_sp_bias(const arch_env_t *env, ir_node *irn); + +extern int arch_get_op_estimated_cost(const arch_env_t *env, const ir_node *irn); +extern arch_inverse_t *arch_get_inverse(const arch_env_t *env, const ir_node *irn, int i, arch_inverse_t *inverse, struct obstack *obstack); +extern int arch_possible_memory_operand(const arch_env_t *env, const ir_node *irn, unsigned int i); +extern void arch_perform_memory_operand(const arch_env_t *env, ir_node *irn, ir_node *spill, unsigned int i); /** * Get the register requirements for a node. @@ -275,8 +169,7 @@ struct _arch_irn_ops_t { * operand was no register operand. */ extern const arch_register_req_t * -arch_get_register_req(const arch_env_t *env, arch_register_req_t *req, - const ir_node *irn, int pos); +arch_get_register_req(const arch_env_t *env, const ir_node *irn, int pos); /** * Check if an operand is a register operand. @@ -295,15 +188,22 @@ extern int arch_is_register_operand(const arch_env_t *env, * @param env The environment. * @param irn The node. * @param pos The postition of the node's operand. - * @param cls The register class. * @param bs The bitset all allocatable registers shall be put into. * Note, that you can also pass NULL here. If you don't, * make sure, the bitset is as large as the register class * has registers. * @return The amount of registers allocatable for that operand. */ -extern int arch_get_allocatable_regs(const arch_env_t *env, const ir_node *irn, - int pos, const arch_register_class_t *cls, bitset_t *bs); +extern int arch_get_allocatable_regs(const arch_env_t *env, const ir_node *irn, int pos, bitset_t *bs); + +/** + * Put all registers which shall not be ignored by the register + * allocator in a bit set. + * @param env The arch env. + * @param cls The register class to consider. + * @param bs The bit set to put the registers to. + */ +extern void arch_put_non_ignore_regs(const arch_env_t *env, const arch_register_class_t *cls, bitset_t *bs); /** * Check, if a register is assignable to an operand of a node. @@ -320,7 +220,7 @@ extern int arch_reg_is_allocatable(const arch_env_t *env, * Get the register class of an operand of a node. * @param env The architecture environment. * @param irn The node. - * @param pos The position of the operand. + * @param pos The position of the operand, -1 for the output. * @return The register class of the operand or NULL, if * operand is a non-register operand. */ @@ -329,7 +229,7 @@ arch_get_irn_reg_class(const arch_env_t *env, const ir_node *irn, int pos); /** * Get the register allocated at a certain output operand of a node. - * @param env The arch nvironment. + * @param env The arch environment. * @param irn The node. * @return The register allocated for this operand */ @@ -354,6 +254,8 @@ extern void arch_set_irn_register(const arch_env_t *env, ir_node *irn, */ extern arch_irn_class_t arch_irn_classify(const arch_env_t *env, const ir_node *irn); +#define arch_irn_class_is(env, irn, irn_class) ((arch_irn_classify(env, irn) & arch_irn_class_ ## irn_class) != 0) + /** * Get the flags of a node. * @param env The architecture environment. @@ -362,177 +264,42 @@ extern arch_irn_class_t arch_irn_classify(const arch_env_t *env, const ir_node * */ extern arch_irn_flags_t arch_irn_get_flags(const arch_env_t *env, const ir_node *irn); -#define arch_irn_has_reg_class(env, irn, pos, cls) \ - ((cls) == arch_get_irn_reg_class(env, irn, pos)) - -/** - * Somebody who can be asked about nodes. - */ -struct _arch_irn_handler_t { - - /** - * Get the operations of an irn. - * @param self The handler from which the method is invoked. - * @param irn Some node. - * @return Operations for that irn. - */ - const arch_irn_ops_t *(*get_irn_ops)(const arch_irn_handler_t *handler, - const ir_node *irn); - -}; - -/** - * The code generator. - */ -struct _arch_code_generator_if_t { - - /** - * Called, when the graph is being normalized. - */ - void (*prepare_graph)(void *self); - - /** - * Called before scheduling. - */ - void (*before_sched)(void *self); - - /** - * Called before register allocation. - */ - void (*before_ra)(void *self); - - /** - * Called after everything happened. - * The code generator must also be de-allocated here. - */ - void (*done)(void *self); - -}; - -#define _arch_cg_call(cg, func) \ -do { \ - if((cg)->impl->func) \ - (cg)->impl->func(cg); \ -} while(0) - -#define arch_code_generator_prepare_graph(cg) _arch_cg_call(cg, prepare_graph) -#define arch_code_generator_before_sched(cg) _arch_cg_call(cg, before_sched) -#define arch_code_generator_before_ra(cg) _arch_cg_call(cg, before_ra) -#define arch_code_generator_done(cg) _arch_cg_call(cg, done) +#define arch_irn_is(env, irn, flag) ((arch_irn_get_flags(env, irn) & arch_irn_flags_ ## flag) != 0) -/** - * Code generator base class. - */ -struct _arch_code_generator_t { - const arch_code_generator_if_t *impl; -}; - -/** - * ISA base class. - */ -struct _arch_isa_t { - const arch_isa_if_t *impl; -}; - -/** - * Architecture interface. - */ -struct _arch_isa_if_t { - -#ifdef WITH_LIBCORE - void (*register_options)(lc_opt_entry_t *grp); -#endif - - /** - * Initialize the isa interface. - */ - void *(*init)(FILE *file_handle); - - /** - * Free the isa instance. - */ - void (*done)(void *self); - - /** - * Get the the number of register classes in the isa. - * @return The number of register classes. - */ - int (*get_n_reg_class)(const void *self); - - /** - * Get the i-th register class. - * @param i The number of the register class. - * @return The register class. - */ - const arch_register_class_t *(*get_reg_class)(const void *self, int i); - - /** - * The irn handler for this architecture. - * The irn handler is registered by the Firm back end - * when the architecture is initialized. - * (May be NULL). - */ - const arch_irn_handler_t *(*get_irn_handler)(const void *self); - - /** - * Produce a new code generator. - * @param self The this pointer. - * @param irg The graph for which code shall be generated. - * @return A code generator. - */ - arch_code_generator_t *(*make_code_generator)(void *self, ir_graph *irg); - - /** - * Get the list scheduler to use. - * @param self The isa object. - * @return The list scheduler selector. - */ - const list_sched_selector_t *(*get_list_sched_selector)(const void *self); -}; - -#define arch_isa_get_n_reg_class(isa) ((isa)->impl->get_n_reg_class(isa)) -#define arch_isa_get_reg_class(isa,i) ((isa)->impl->get_reg_class(isa, i)) -#define arch_isa_get_irn_handler(isa) ((isa)->impl->get_irn_handler(isa)) -#define arch_isa_make_code_generator(isa,irg) ((isa)->impl->make_code_generator(isa, irg)) - -#define ARCH_MAX_HANDLERS 8 - -/** - * Environment for the architecture infrastructure. - * Keep this everywhere you're going. - */ -struct _arch_env_t { - const struct _be_node_factory_t *node_factory; /**< The node factory for be nodes. */ - arch_isa_t *isa; /**< The isa about which everything is. */ - - arch_irn_handler_t const *handlers[ARCH_MAX_HANDLERS]; /**< The handlers are organized as - a stack. */ +#define arch_irn_has_reg_class(env, irn, pos, cls) \ + ((cls) == arch_get_irn_reg_class(env, irn, pos)) - int handlers_tos; /**< The stack pointer of the handler - stack. */ -}; +#define arch_irn_consider_in_reg_alloc(env, cls, irn) \ + (arch_irn_has_reg_class(env, irn, -1, cls) && !arch_irn_is(env, irn, ignore)) /** - * Get the isa of an arch environment. - * @param env The environment. - * @return The isa with which the env was initialized with. + * Get the operations of an irn. + * @param self The handler from which the method is invoked. + * @param irn Some node. + * @return Operations for that irn. */ -#define arch_env_get_isa(env) ((env)->isa) +typedef const void *(arch_get_irn_ops_t)(const ir_node *irn); /** * Initialize the architecture environment struct. - * @param isa The isa which shall be put into the environment. + * @param isa The isa which shall be put into the environment. + * @param file_handle The file handle * @return The environment. */ -extern arch_env_t *arch_env_init(arch_env_t *env, const arch_isa_if_t *isa, FILE *file_handle); +extern arch_env_t *arch_env_init(arch_env_t *env, const arch_isa_if_t *isa, + FILE *file_handle, be_main_env_t *main_env); /** - * Add a node handler to the environment. + * Set the architectural node handler to the environment. * @param env The environment. - * @param handler A node handler. + * @param handler The node handler for the selected architecture. * @return The environment itself. */ -extern arch_env_t *arch_env_add_irn_handler(arch_env_t *env, - const arch_irn_handler_t *handler); +extern void arch_env_set_irn_handler(arch_env_t *env, arch_get_irn_ops_t *handler); + +/** + * Register an instruction set architecture + */ +void be_register_isa_if(const char *name, const arch_isa_if_t *isa); -#endif /* _FIRM_BEARCH_H */ +#endif /* FIRM_BE_BEARCH_H */