X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fbearch.h;h=c8bbac68d204c564d256dfb7604c89bbe21d7f88;hb=69ea35dad47322047ab3fc29f639d332d4f7c360;hp=4a4129fb51f3a1eb761ae40607ee57dd41f3fc2a;hpb=41dc42afc8d00e0f364711ed0c919e4e29cb20e4;p=libfirm diff --git a/ir/be/bearch.h b/ir/be/bearch.h index 4a4129fb5..c8bbac68d 100644 --- a/ir/be/bearch.h +++ b/ir/be/bearch.h @@ -21,7 +21,6 @@ * @file * @brief Processor architecture specification. * @author Sebastian Hack - * @version $Id$ */ #ifndef FIRM_BE_BEARCH_H #define FIRM_BE_BEARCH_H @@ -111,19 +110,6 @@ void arch_dump_register_req(FILE *F, const arch_register_req_t *req, void arch_dump_register_reqs(FILE *F, const ir_node *node); void arch_dump_reqs_and_registers(FILE *F, const ir_node *node); -/** - * Node classification. Used for statistics and for detecting reload nodes. - */ -typedef enum arch_irn_class_t { - arch_irn_class_none = 0, - arch_irn_class_spill = 1 << 0, - arch_irn_class_reload = 1 << 1, - arch_irn_class_remat = 1 << 2, - arch_irn_class_copy = 1 << 3, - arch_irn_class_perm = 1 << 4 -} arch_irn_class_t; -ENUM_BITSET(arch_irn_class_t) - void arch_set_frame_offset(ir_node *irn, int bias); ir_entity *arch_get_frame_entity(const ir_node *irn); @@ -226,20 +212,10 @@ static inline unsigned arch_get_irn_n_outs(const ir_node *node) } /** - * Classify a node. - * @param irn The node. - * @return A classification of the node. - */ -arch_irn_class_t arch_irn_classify(const ir_node *irn); - -/** - * Initialize the architecture environment struct. - * @param isa The isa which shall be put into the environment. - * @param file_handle The file handle - * @return The environment. + * Start codegeneration */ -extern arch_env_t *arch_env_init(const arch_isa_if_t *isa, - FILE *file_handle, be_main_env_t *main_env); +arch_env_t *arch_env_begin_codegeneration(const arch_isa_if_t *isa, + be_main_env_t *main_env); /** * Register an instruction set architecture @@ -254,11 +230,13 @@ struct arch_register_t { const arch_register_class_t *reg_class; /**< The class of the register */ unsigned short index; /**< The index of the register in the class. */ - unsigned short global_index; /** The global index this register - in the architecture. */ + unsigned short global_index; /**< The global index this + register in the architecture. */ arch_register_type_t type; /**< The type of the register. */ /** register constraint allowing just this register */ const arch_register_req_t *single_req; + /** register number in dwarf debugging format */ + unsigned short dwarf_number; }; static inline const arch_register_class_t *arch_register_get_class( @@ -331,14 +309,16 @@ struct arch_register_req_t { arch_register_req_type_t type; /**< The type of the constraint. */ const arch_register_class_t *cls; /**< The register class this constraint belongs to. */ - const unsigned *limited; /**< allowed register bitset */ - unsigned other_same; /**< Bitmask of ins which should use the - same register (should_be_same). */ - unsigned other_different; /**< Bitmask of ins which shall use a - different register - (must_be_different) */ - unsigned char width; /**< specifies how many sequential - registers are required */ + const unsigned *limited; /**< allowed register bitset + (in case of wide-values this is + only about the first register) */ + unsigned other_same; /**< Bitmask of ins which should use the + same register (should_be_same). */ + unsigned other_different; /**< Bitmask of ins which shall use a + different register + (must_be_different) */ + unsigned char width; /**< specifies how many sequential + registers are required */ }; static inline bool reg_reqs_equal(const arch_register_req_t *req1, @@ -347,19 +327,15 @@ static inline bool reg_reqs_equal(const arch_register_req_t *req1, if (req1 == req2) return true; - if (req1->type != req2->type - || req1->cls != req2->cls - || req1->other_same != req2->other_same - || req1->other_different != req2->other_different) + if (req1->type != req2->type || + req1->cls != req2->cls || + req1->other_same != req2->other_same || + req1->other_different != req2->other_different || + (req1->limited != NULL) != (req2->limited != NULL)) return false; if (req1->limited != NULL) { - size_t n_regs; - - if (req2->limited == NULL) - return false; - - n_regs = arch_register_class_n_regs(req1->cls); + size_t const n_regs = arch_register_class_n_regs(req1->cls); if (!rbitsets_equal(req1->limited, req2->limited, n_regs)) return false; } @@ -381,13 +357,6 @@ struct arch_inverse_t { struct arch_irn_ops_t { - /** - * Classify the node. - * @param irn The node. - * @return A classification. - */ - arch_irn_class_t (*classify)(const ir_node *irn); - /** * Get the entity on the stack frame this node depends on. * @param irn The node in question. @@ -467,11 +436,20 @@ struct arch_irn_ops_t { */ struct arch_isa_if_t { /** - * Initialize the isa interface. - * @param file_handle the file handle to write the output to - * @return a new isa instance + * Initializes the isa interface. This is necessary before calling any + * other functions from this interface. */ - arch_env_t *(*init)(FILE *file_handle); + void (*init)(void); + + /** + * Fress resources allocated by this isa interface. + */ + void (*finish)(void); + + /** + * Returns the frontend settings needed for this backend. + */ + const backend_params *(*get_params)(void); /** * lowers current program for target. See the documentation for @@ -480,89 +458,84 @@ struct arch_isa_if_t { void (*lower_for_target)(void); /** - * Free the isa instance. + * parse an assembler constraint part and set flags according to its nature + * advances the *c pointer to point to the last parsed character (so if you + * parse a single character don't advance c) */ - void (*done)(void *self); + asm_constraint_flags_t (*parse_asm_constraint)(const char **c); /** - * Called directly after initialization. Backend should handle all - * intrinsics here. + * returns true if the string is a valid clobbered (register) in this + * backend */ - void (*handle_intrinsics)(void); + int (*is_valid_clobber)(const char *clobber); /** - * Get the register class which shall be used to store a value of a given - * mode. - * @param self The this pointer. - * @param mode The mode in question. - * @return A register class which can hold values of the given mode. + * Start codegeneration + * @return a new isa instance */ - const arch_register_class_t *(*get_reg_class_for_mode)(const ir_mode *mode); + arch_env_t *(*begin_codegeneration)(const be_main_env_t *env); /** - * Get the ABI restrictions for procedure calls. - * @param self The this pointer. - * @param call_type The call type of the method (procedure) in question. - * @param p The array of parameter locations to be filled. + * Free the isa instance. */ - void (*get_call_abi)(const void *self, ir_type *call_type, - be_abi_call_t *abi); + void (*end_codegeneration)(void *self); /** - * Get the necessary alignment for storing a register of given class. - * @param self The isa object. - * @param cls The register class. - * @return The alignment in bytes. + * Initialize the code generator for a graph + * @param irg A graph */ - int (*get_reg_class_alignment)(const arch_register_class_t *cls); + void (*init_graph)(ir_graph *irg); /** - * A "static" function, returns the frontend settings - * needed for this backend. + * Get the ABI restrictions for procedure calls. + * @param call_type The call type of the method (procedure) in question. + * @param p The array of parameter locations to be filled. */ - const backend_params *(*get_params)(void); + void (*get_call_abi)(ir_type *call_type, be_abi_call_t *abi); /** - * Return an ordered list of irgs where code should be generated for. - * If NULL is returned, all irg will be taken into account and they will be - * generated in an arbitrary order. - * @param self The isa object. - * @param irgs A flexible array ARR_F of length 0 where the backend can - * append the desired irgs. - * @return A flexible array ARR_F containing all desired irgs in the - * desired order. + * mark node as rematerialized */ - ir_graph **(*get_backend_irg_list)(const void *self, ir_graph ***irgs); + void (*mark_remat)(ir_node *node); /** - * mark node as rematerialized + * return node used as base in pic code addresses */ - void (*mark_remat)(ir_node *node); + ir_node* (*get_pic_base)(ir_graph *irg); /** - * parse an assembler constraint part and set flags according to its nature - * advances the *c pointer to point to the last parsed character (so if you - * parse a single character don't advance c) + * Create a spill instruction. We assume that spill instructions + * do not need any additional registers and do not affect cpu-flags in any + * way. + * Construct a sequence of instructions after @p after (the resulting nodes + * are already scheduled). + * Returns a mode_M value which is used as input for a reload instruction. */ - asm_constraint_flags_t (*parse_asm_constraint)(const char **c); + ir_node *(*new_spill)(ir_node *value, ir_node *after); /** - * returns true if the string is a valid clobbered (register) in this - * backend + * Create a reload instruction. We assume that reload instructions do not + * need any additional registers and do not affect cpu-flags in any way. + * Constructs a sequence of instruction before @p before (the resulting + * nodes are already scheduled). A rewiring of users is not performed in + * this function. + * Returns a value representing the restored value. */ - int (*is_valid_clobber)(const char *clobber); + ir_node *(*new_reload)(ir_node *value, ir_node *spilled_value, + ir_node *before); /** - * Initialize the code generator. - * @param irg A graph - * @return A newly created code generator. + * Checks if the given register is callee/caller saved. + * @deprecated, only necessary if backend still uses beabi functions */ - void (*init_graph)(ir_graph *irg); + int (*register_saved_by)(const arch_register_t *reg, int callee); /** - * return node used as base in pic code addresses + * Called directly after initialization. Backend should handle all + * intrinsics here. */ - ir_node* (*get_pic_base)(ir_graph *irg); + void (*handle_intrinsics)(void); /** * Called before abi introduce. @@ -583,37 +556,28 @@ struct arch_isa_if_t { * Called directly before done is called. This should be the last place * where the irg is modified. */ - void (*finish)(ir_graph *irg); + void (*finish_graph)(ir_graph *irg); /** * Called after everything happened. This call should emit the final * assembly code but avoid changing the irg. - * The code generator must also be de-allocated here. */ void (*emit)(ir_graph *irg); - - /** - * Checks if the given register is callee/caller saved. - * @deprecated, only necessary if backend still uses beabi functions - */ - int (*register_saved_by)(const arch_register_t *reg, int callee); }; -#define arch_env_done(env) ((env)->impl->done(env)) +#define arch_env_end_codegeneration(env) ((env)->impl->end_codegeneration(env)) #define arch_env_handle_intrinsics(env) \ do { if((env)->impl->handle_intrinsics != NULL) (env)->impl->handle_intrinsics(); } while(0) -#define arch_env_get_reg_class_for_mode(env,mode) ((env)->impl->get_reg_class_for_mode((mode))) -#define arch_env_get_call_abi(env,tp,abi) ((env)->impl->get_call_abi((env), (tp), (abi))) -#define arch_env_get_reg_class_alignment(env,cls) ((env)->impl->get_reg_class_alignment((cls))) +#define arch_env_get_call_abi(env,tp,abi) ((env)->impl->get_call_abi((tp), (abi))) #define arch_env_get_params(env) ((env)->impl->get_params()) -#define arch_env_get_allowed_execution_units(env,irn) ((env)->impl->get_allowed_execution_units((irn))) -#define arch_env_get_machine(env) ((env)->impl->get_machine(env)) -#define arch_env_get_backend_irg_list(env,irgs) ((env)->impl->get_backend_irg_list((env), (irgs))) #define arch_env_parse_asm_constraint(env,c) ((env)->impl->parse_asm_constraint((c)) #define arch_env_is_valid_clobber(env,clobber) ((env)->impl->is_valid_clobber((clobber)) #define arch_env_mark_remat(env,node) \ do { if ((env)->impl->mark_remat != NULL) (env)->impl->mark_remat((node)); } while(0) +#define arch_env_new_spill(env,value,after) ((env)->impl->new_spill(value, after)) +#define arch_env_new_reload(env,value,spilled,before) ((env)->impl->new_reload(value, spilled, before)) + /** * ISA base class. */ @@ -657,29 +621,28 @@ static inline bool arch_irn_consider_in_reg_alloc( * are not marked as ignore. * Executes @p code for each definition. */ -#define be_foreach_definition_(node, cls, value, code) \ +#define be_foreach_definition_(node, ccls, value, code) \ do { \ if (get_irn_mode(node) == mode_T) { \ - const ir_edge_t *edge_; \ foreach_out_edge(node, edge_) { \ const arch_register_req_t *req_; \ value = get_edge_src_irn(edge_); \ req_ = arch_get_irn_register_req(value); \ - if (req_->cls != cls) \ + if (req_->cls != ccls) \ continue; \ code \ } \ } else { \ const arch_register_req_t *req_ = arch_get_irn_register_req(node); \ value = node; \ - if (req_->cls == cls) { \ + if (req_->cls == ccls) { \ code \ } \ } \ } while (0) -#define be_foreach_definition(node, cls, value, code) \ - be_foreach_definition_(node, cls, value, \ +#define be_foreach_definition(node, ccls, value, code) \ + be_foreach_definition_(node, ccls, value, \ if (req_->type & arch_register_req_type_ignore) \ continue; \ code \