X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Farm%2Fbearch_arm_t.h;h=32c819228cc258fc0aa20096f4e10e7b11e5a625;hb=a53a89cf59283fb4913bb66ba3860a14c9166dc5;hp=16e54fa6a072344dbd8af2adc54b4f20838e3b20;hpb=da48a7f7266cfe6274fc4d159d63bba245724222;p=libfirm

diff --git a/ir/be/arm/bearch_arm_t.h b/ir/be/arm/bearch_arm_t.h
index 16e54fa6a..32c819228 100644
--- a/ir/be/arm/bearch_arm_t.h
+++ b/ir/be/arm/bearch_arm_t.h
@@ -1,15 +1,37 @@
-#ifndef _BEARCH_ARM_T_H_
-#define _BEARCH_ARM_T_H_
+/*
+ * Copyright (C) 1995-2008 University of Karlsruhe.  All right reserved.
+ *
+ * This file is part of libFirm.
+ *
+ * This file may be distributed and/or modified under the terms of the
+ * GNU General Public License version 2 as published by the Free Software
+ * Foundation and appearing in the file LICENSE.GPL included in the
+ * packaging of this file.
+ *
+ * Licensees holding valid libFirm Professional Edition licenses may use
+ * this file in accordance with the libFirm Commercial License.
+ * Agreement provided with the Software.
+ *
+ * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
+ * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE.
+ */
+
+/**
+ * @file
+ * @brief   declarations for arm backend -- private header
+ * @author  Oliver Richter, Tobias Gneist
+ * @version $Id$
+ */
+#ifndef FIRM_BE_ARM_BEARCH_ARM_T_H
+#define FIRM_BE_ARM_BEARCH_ARM_T_H
 
 #include <stdio.h>
 
-#include "debug.h"
-#include "bearch_arm.h"
 #include "arm_nodes_attr.h"
-#include "../be.h"
-#include "set.h"
+#include "be.h"
 
-typedef struct _arm_isa_t arm_isa_t;
+typedef struct arm_isa_t arm_isa_t;
 
 /** The following bitmasks control CPU extensions:  */
 enum arm_cpu_extensions {
@@ -39,7 +61,7 @@ enum arm_cpu_extensions {
  * three more to cover cores prior to ARM6.  Finally, there are cores which
  * implement further extensions in the co-processor space.
  */
-enum arm_architectiures {
+enum arm_architectures {
 	ARM_ARCH_V1     = ARM_EXT_V1,
 	ARM_ARCH_V2     = ARM_ARCH_V1 | ARM_EXT_V2,
 	ARM_ARCH_V2S    = ARM_ARCH_V2 | ARM_EXT_V2S,
@@ -90,16 +112,18 @@ enum arm_fp_architectures {
 };
 
 /** Returns non-zero if FPA instructions should be issued. */
-#define USE_FPA(cg)	 ((cg)->fpu_arch & ARM_FPU_FPA_EXT_V1)
+#define USE_FPA(isa)     ((isa)->fpu_arch & ARM_FPU_FPA_EXT_V1)
 
 /** Returns non-zero if VFP instructions should be issued. */
-#define USE_VFP(cg)	 ((cg)->fpu_arch & ARM_FPU_VFP_EXT_V1xD)
+#define USE_VFP(isa)     ((isa)->fpu_arch & ARM_FPU_VFP_EXT_V1xD)
 
 /** Types of processor to generate code for. */
 enum arm_processor_types {
 	ARM_1      = ARM_ARCH_V1,
 	ARM_2      = ARM_ARCH_V2,
+	ARM_2a     = ARM_ARCH_V2,
 	ARM_3      = ARM_ARCH_V2S,
+	ARM_3G     = ARM_ARCH_V2S,
 	ARM_250    = ARM_ARCH_V2S,
 	ARM_6      = ARM_ARCH_V3,
 	ARM_7      = ARM_ARCH_V3,
@@ -108,38 +132,9 @@ enum arm_processor_types {
 	ARM_STRONG = ARM_ARCH_V4,
 };
 
-typedef struct _arm_code_gen_t {
-	const arch_code_generator_if_t *impl;           /**< implementation */
-	ir_graph                       *irg;            /**< current irg */
-	const arch_env_t               *arch_env;       /**< the arch env */
-	set                            *reg_set;        /**< set to memorize registers for FIRM nodes (e.g. phi) */
-	int                             emit_decls;     /**< flag indicating if decls were already emitted */
-	arm_isa_t                      *isa;            /**< the isa instance */
-	const be_irg_t                 *birg;           /**< The be-irg (contains additional information about the irg) */
-	ir_type                        *int_tp;         /**< the int type, needed for Call conversion */
-	int                             have_fp;        /**< non-zero, if fp hardware instructions are emitted */
-	DEBUG_ONLY(firm_dbg_module_t   *mod;)            /**< debugging module */
-} arm_code_gen_t;
-
-
-struct _arm_isa_t {
-	const arch_isa_if_t   *impl;
-	const arch_register_t *sp;            /**< The stack pointer register. */
-	const arch_register_t *bp;            /**< The base pointer register. */
-	const int              stack_dir;     /**< -1 for decreasing, 1 for increasing. */
-	int                    num_codegens;
-	int                    gen_reg_names; /**< use generic register names instead of SP, LR, PC */
-	arm_code_gen_t        *cg;            /**< current code generator */
-	FILE                  *out;           /**< output file */
-
-	int                   fpu_arch;      /**< FPU architecture */
+struct arm_isa_t {
+	arch_env_t     base;      /**< must be derived from arch_env_t */
+	int            fpu_arch;      /**< FPU architecture */
 };
 
-
-typedef struct _arm_irn_ops_t {
-	const arch_irn_ops_if_t *impl;
-	arm_code_gen_t     *cg;
-} arm_irn_ops_t;
-
-
-#endif /* _BEARCH_ARM_T_H_ */
+#endif