X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Farm%2Fbearch_arm.c;h=a92f56c57569de370e6a3ad910713e0ba255c61c;hb=1d146702bc5623a4b3e53fd128716c76dadd1528;hp=01f82d08d97d3bb260ce381dc1012ccdb6a6285a;hpb=8ccfe04ca59ff56fc32b2323b80cee2a5194694d;p=libfirm diff --git a/ir/be/arm/bearch_arm.c b/ir/be/arm/bearch_arm.c index 01f82d08d..a92f56c57 100644 --- a/ir/be/arm/bearch_arm.c +++ b/ir/be/arm/bearch_arm.c @@ -21,7 +21,6 @@ * @file * @brief The main arm backend driver file. * @author Matthias Braun, Oliver Richter, Tobias Gneist - * @version $Id$ */ #include "config.h" @@ -36,7 +35,7 @@ #include "irgopt.h" #include "iroptimize.h" #include "irdump.h" -#include "lowering.h" +#include "lower_calls.h" #include "error.h" #include "bitset.h" @@ -44,18 +43,19 @@ #include "array_t.h" #include "irtools.h" -#include "../bearch.h" -#include "../benode.h" -#include "../belower.h" -#include "../besched.h" +#include "bearch.h" +#include "benode.h" +#include "belower.h" +#include "besched.h" #include "be.h" -#include "../bemachine.h" -#include "../bemodule.h" -#include "../beirg.h" -#include "../bespillslots.h" -#include "../begnuas.h" -#include "../belistsched.h" -#include "../beflags.h" +#include "bemodule.h" +#include "beirg.h" +#include "bespillslots.h" +#include "bespillutil.h" +#include "begnuas.h" +#include "belistsched.h" +#include "beflags.h" +#include "bestack.h" #include "bearch_arm_t.h" @@ -66,13 +66,6 @@ #include "arm_emitter.h" #include "arm_map_regs.h" -static arch_irn_class_t arm_classify(const ir_node *irn) -{ - (void) irn; - /* TODO: we should mark reload/spill instructions and classify them here */ - return arch_irn_class_none; -} - static ir_entity *arm_get_frame_entity(const ir_node *irn) { const arm_attr_t *attr = get_arm_attr_const(irn); @@ -118,7 +111,6 @@ static int arm_get_sp_bias(const ir_node *irn) /* fill register allocator interface */ static const arch_irn_ops_t arm_irn_ops = { - arm_classify, arm_get_frame_entity, arm_set_stack_bias, arm_get_sp_bias, @@ -144,18 +136,48 @@ static void arm_prepare_graph(ir_graph *irg) place_code(irg); } -/** - * Called immediately before emit phase. - */ -static void arm_finish_irg(ir_graph *irg) +static void arm_collect_frame_entity_nodes(ir_node *node, void *data) { - /* do peephole optimizations and fix stack offsets */ - arm_peephole_optimization(irg); + be_fec_env_t *env = (be_fec_env_t*)data; + const ir_mode *mode; + int align; + ir_entity *entity; + const arm_load_store_attr_t *attr; + + if (be_is_Reload(node) && be_get_frame_entity(node) == NULL) { + mode = get_irn_mode(node); + align = get_mode_size_bytes(mode); + be_node_needs_frame_entity(env, node, mode, align); + return; + } + + switch (get_arm_irn_opcode(node)) { + case iro_arm_Ldf: + case iro_arm_Ldr: + break; + default: + return; + } + + attr = get_arm_load_store_attr_const(node); + entity = attr->entity; + mode = attr->load_store_mode; + align = get_mode_size_bytes(mode); + if (entity != NULL) + return; + if (!attr->is_frame_entity) + return; + be_node_needs_frame_entity(env, node, mode, align); } -static void arm_before_ra(ir_graph *irg) +static void arm_set_frame_entity(ir_node *node, ir_entity *entity) { - be_sched_fix_flags(irg, &arm_reg_classes[CLASS_arm_flags], NULL, NULL); + if (is_be_node(node)) { + be_node_set_frame_entity(node, entity); + } else { + arm_load_store_attr_t *attr = get_arm_load_store_attr(node); + attr->entity = entity; + } } static void transform_Reload(ir_node *node) @@ -223,51 +245,10 @@ static void arm_after_ra_walker(ir_node *block, void *data) } } -static void arm_collect_frame_entity_nodes(ir_node *node, void *data) -{ - be_fec_env_t *env = (be_fec_env_t*)data; - const ir_mode *mode; - int align; - ir_entity *entity; - const arm_load_store_attr_t *attr; - - if (be_is_Reload(node) && be_get_frame_entity(node) == NULL) { - mode = get_irn_mode(node); - align = get_mode_size_bytes(mode); - be_node_needs_frame_entity(env, node, mode, align); - return; - } - - switch (get_arm_irn_opcode(node)) { - case iro_arm_Ldf: - case iro_arm_Ldr: - break; - default: - return; - } - - attr = get_arm_load_store_attr_const(node); - entity = attr->entity; - mode = attr->load_store_mode; - align = get_mode_size_bytes(mode); - if (entity != NULL) - return; - if (!attr->is_frame_entity) - return; - be_node_needs_frame_entity(env, node, mode, align); -} - -static void arm_set_frame_entity(ir_node *node, ir_entity *entity) -{ - if (is_be_node(node)) { - be_node_set_frame_entity(node, entity); - } else { - arm_load_store_attr_t *attr = get_arm_load_store_attr(node); - attr->entity = entity; - } -} - -static void arm_after_ra(ir_graph *irg) +/** + * Called immediately before emit phase. + */ +static void arm_finish_irg(ir_graph *irg) { be_stack_layout_t *stack_layout = be_get_irg_stack_layout(irg); bool at_begin = stack_layout->sp_relative ? true : false; @@ -278,6 +259,18 @@ static void arm_after_ra(ir_graph *irg) be_free_frame_entity_coalescer(fec_env); irg_block_walk_graph(irg, NULL, arm_after_ra_walker, NULL); + + /* fix stack entity offsets */ + be_abi_fix_stack_nodes(irg); + be_abi_fix_stack_bias(irg); + + /* do peephole optimizations and fix stack offsets */ + arm_peephole_optimization(irg); +} + +static void arm_before_ra(ir_graph *irg) +{ + be_sched_fix_flags(irg, &arm_reg_classes[CLASS_arm_flags], NULL, NULL); } /** @@ -323,7 +316,6 @@ static void arm_handle_intrinsics(void) rt_iDiv.mem_proj_nr = pn_Div_M; rt_iDiv.regular_proj_nr = pn_Div_X_regular; rt_iDiv.exc_proj_nr = pn_Div_X_except; - rt_iDiv.exc_mem_proj_nr = pn_Div_M; rt_iDiv.res_proj_nr = pn_Div_res; add_entity_linkage(rt_iDiv.ent, IR_LINKAGE_CONSTANT); @@ -350,7 +342,6 @@ static void arm_handle_intrinsics(void) rt_uDiv.mem_proj_nr = pn_Div_M; rt_uDiv.regular_proj_nr = pn_Div_X_regular; rt_uDiv.exc_proj_nr = pn_Div_X_except; - rt_uDiv.exc_mem_proj_nr = pn_Div_M; rt_uDiv.res_proj_nr = pn_Div_res; set_entity_visibility(rt_uDiv.ent, ir_visibility_external); @@ -376,7 +367,6 @@ static void arm_handle_intrinsics(void) rt_iMod.mem_proj_nr = pn_Mod_M; rt_iMod.regular_proj_nr = pn_Mod_X_regular; rt_iMod.exc_proj_nr = pn_Mod_X_except; - rt_iMod.exc_mem_proj_nr = pn_Mod_M; rt_iMod.res_proj_nr = pn_Mod_res; set_entity_visibility(rt_iMod.ent, ir_visibility_external); @@ -402,7 +392,6 @@ static void arm_handle_intrinsics(void) rt_uMod.mem_proj_nr = pn_Mod_M; rt_uMod.regular_proj_nr = pn_Mod_X_regular; rt_uMod.exc_proj_nr = pn_Mod_X_except; - rt_uMod.exc_mem_proj_nr = pn_Mod_M; rt_uMod.res_proj_nr = pn_Mod_res; set_entity_visibility(rt_uMod.ent, ir_visibility_external); @@ -437,75 +426,44 @@ static arm_isa_t arm_isa_template = { ARM_FPU_ARCH_FPE, /* FPU architecture */ }; -/** - * Initializes the backend ISA and opens the output file. - */ -static arch_env_t *arm_init(FILE *file_handle) +static void arm_init(void) { - arm_isa_t *isa = XMALLOC(arm_isa_t); - *isa = arm_isa_template; - arm_register_init(); - be_emit_init(file_handle); - arm_create_opcodes(&arm_irn_ops); - arm_handle_intrinsics(); +} + +static void arm_finish(void) +{ + arm_free_opcodes(); +} + +static arch_env_t *arm_begin_codegeneration(const be_main_env_t *env) +{ + arm_isa_t *isa = XMALLOC(arm_isa_t); + *isa = arm_isa_template; be_gas_emit_types = false; + be_emit_init(env->file_handle); + be_gas_begin_compilation_unit(env); + return &isa->base; } - - /** * Closes the output file and frees the ISA structure. */ -static void arm_done(void *self) +static void arm_end_codegeneration(void *self) { arm_isa_t *isa = (arm_isa_t*)self; - be_gas_emit_decls(isa->base.main_env); + be_gas_end_compilation_unit(isa->base.main_env); be_emit_exit(); free(self); } -/** - * Get the register class which shall be used to store a value of a given mode. - * @param self The this pointer. - * @param mode The mode in question. - * @return A register class which can hold values of the given mode. - */ -static const arch_register_class_t *arm_get_reg_class_for_mode(const ir_mode *mode) -{ - if (mode_is_float(mode)) - return &arm_reg_classes[CLASS_arm_fpa]; - else - return &arm_reg_classes[CLASS_arm_gp]; -} - -/** - * Returns the necessary byte alignment for storing a register of given class. - */ -static int arm_get_reg_class_alignment(const arch_register_class_t *cls) -{ - (void) cls; - /* ARM is a 32 bit CPU, no need for other alignment */ - return 4; -} - -/** - * Return irp irgs in the desired order. - */ -static ir_graph **arm_get_irg_list(const void *self, ir_graph ***irg_list) -{ - (void) self; - (void) irg_list; - return NULL; -} - /** * Allows or disallows the creation of Psi nodes for the given Phi nodes. * @return 1 if allowed, 0 otherwise @@ -536,20 +494,20 @@ static void arm_lower_for_target(void) { size_t i, n_irgs = get_irp_n_irgs(); - lower_params_t params = { - 4, /* def_ptr_alignment */ - LF_COMPOUND_RETURN | LF_RETURN_HIDDEN, /* flags */ - ADD_HIDDEN_ALWAYS_IN_FRONT, /* hidden_params */ - NULL, /* find pointer type */ - NULL, /* ret_compound_in_regs */ - }; - /* lower compound param handling */ - lower_calls_with_compounds(¶ms); + lower_calls_with_compounds(LF_RETURN_HIDDEN); for (i = 0; i < n_irgs; ++i) { ir_graph *irg = get_irp_irg(i); - lower_switch(irg, 4, 256, true); + lower_switch(irg, 4, 256, false); + } + + for (i = 0; i < n_irgs; ++i) { + ir_graph *irg = get_irp_irg(i); + /* Turn all small CopyBs into loads/stores and all bigger CopyBs into + * memcpy calls. + * TODO: These constants need arm-specific tuning. */ + lower_CopyB(irg, 31, 32, false); } } @@ -571,11 +529,15 @@ static const backend_params *arm_get_libfirm_params(void) 0, /* don't support inline assembler yet */ 1, /* support Rotl nodes */ 1, /* big endian */ + 1, /* modulo shift efficient */ + 0, /* non-modulo shift not efficient */ &ad, /* will be set later */ arm_is_mux_allowed, /* allow_ifconv function */ 32, /* machine size */ NULL, /* float arithmetic mode (TODO) */ - 0, /* size of long double */ + NULL, /* long long type */ + NULL, /* unsigned long long type */ + NULL, /* long double type */ 0, /* no trampoline support: size 0 */ 0, /* no trampoline support: align 0 */ NULL, /* no trampoline support: no trampoline builder */ @@ -607,27 +569,28 @@ static const lc_opt_table_entry_t arm_options[] = { const arch_isa_if_t arm_isa_if = { arm_init, - arm_lower_for_target, - arm_done, - NULL, /* handle_intrinsics */ - arm_get_reg_class_for_mode, - NULL, - arm_get_reg_class_alignment, + arm_finish, arm_get_libfirm_params, - arm_get_irg_list, - NULL, /* mark remat */ + arm_lower_for_target, arm_parse_asm_constraint, arm_is_valid_clobber, + arm_begin_codegeneration, + arm_end_codegeneration, arm_init_graph, + NULL, /* get call abi */ + NULL, /* mark remat */ NULL, /* get_pic_base */ + be_new_spill, + be_new_reload, + NULL, /* register_saved_by */ + + arm_handle_intrinsics, /* handle_intrinsics */ NULL, /* before_abi */ arm_prepare_graph, arm_before_ra, - arm_after_ra, arm_finish_irg, arm_gen_routine, - NULL, /* register_saved_by */ }; BE_REGISTER_MODULE_CONSTRUCTOR(be_init_arch_arm)