X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Farm%2Fbearch_arm.c;h=65f9ebeb58b2f6578a8a3d0057ca530abcd06517;hb=226c238839ce84c2c310c8e7522838160c6f71af;hp=85d9b4a406bdebed0b1bb33dc95051229271c8b7;hpb=d9ebcc506768b24fb6378dc7cae91002be410eec;p=libfirm diff --git a/ir/be/arm/bearch_arm.c b/ir/be/arm/bearch_arm.c index 85d9b4a40..65f9ebeb5 100644 --- a/ir/be/arm/bearch_arm.c +++ b/ir/be/arm/bearch_arm.c @@ -1,27 +1,12 @@ /* - * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved. - * * This file is part of libFirm. - * - * This file may be distributed and/or modified under the terms of the - * GNU General Public License version 2 as published by the Free Software - * Foundation and appearing in the file LICENSE.GPL included in the - * packaging of this file. - * - * Licensees holding valid libFirm Professional Edition licenses may use - * this file in accordance with the libFirm Commercial License. - * Agreement provided with the Software. - * - * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE - * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE. + * Copyright (C) 2012 University of Karlsruhe. */ /** * @file * @brief The main arm backend driver file. * @author Matthias Braun, Oliver Richter, Tobias Gneist - * @version $Id$ */ #include "config.h" @@ -36,7 +21,7 @@ #include "irgopt.h" #include "iroptimize.h" #include "irdump.h" -#include "lowering.h" +#include "lower_calls.h" #include "error.h" #include "bitset.h" @@ -44,18 +29,19 @@ #include "array_t.h" #include "irtools.h" -#include "../bearch.h" -#include "../benode.h" -#include "../belower.h" -#include "../besched.h" +#include "bearch.h" +#include "benode.h" +#include "belower.h" +#include "besched.h" #include "be.h" -#include "../bemachine.h" -#include "../bemodule.h" -#include "../beirg.h" -#include "../bespillslots.h" -#include "../begnuas.h" -#include "../belistsched.h" -#include "../beflags.h" +#include "bemodule.h" +#include "beirg.h" +#include "bespillslots.h" +#include "bespillutil.h" +#include "begnuas.h" +#include "belistsched.h" +#include "beflags.h" +#include "bestack.h" #include "bearch_arm_t.h" @@ -66,20 +52,13 @@ #include "arm_emitter.h" #include "arm_map_regs.h" -static arch_irn_class_t arm_classify(const ir_node *irn) -{ - (void) irn; - /* TODO: we should mark reload/spill instructions and classify them here */ - return arch_irn_class_none; -} - static ir_entity *arm_get_frame_entity(const ir_node *irn) { const arm_attr_t *attr = get_arm_attr_const(irn); if (is_arm_FrameAddr(irn)) { - const arm_SymConst_attr_t *attr = get_arm_SymConst_attr_const(irn); - return attr->entity; + const arm_SymConst_attr_t *frame_attr = get_arm_SymConst_attr_const(irn); + return frame_attr->entity; } if (attr->is_load_store) { const arm_load_store_attr_t *load_store_attr @@ -118,11 +97,9 @@ static int arm_get_sp_bias(const ir_node *irn) /* fill register allocator interface */ static const arch_irn_ops_t arm_irn_ops = { - arm_classify, arm_get_frame_entity, arm_set_stack_bias, arm_get_sp_bias, - NULL, /* get_inverse */ NULL, /* get_op_estimated_cost */ NULL, /* possible_memory_operand */ NULL, /* perform_memory_operand */ @@ -144,37 +121,64 @@ static void arm_prepare_graph(ir_graph *irg) place_code(irg); } -/** - * Called immediately before emit phase. - */ -static void arm_finish_irg(ir_graph *irg) +static void arm_collect_frame_entity_nodes(ir_node *node, void *data) { - /* do peephole optimizations and fix stack offsets */ - arm_peephole_optimization(irg); + be_fec_env_t *env = (be_fec_env_t*)data; + const ir_mode *mode; + int align; + ir_entity *entity; + const arm_load_store_attr_t *attr; + + if (be_is_Reload(node) && be_get_frame_entity(node) == NULL) { + mode = get_irn_mode(node); + align = get_mode_size_bytes(mode); + be_node_needs_frame_entity(env, node, mode, align); + return; + } + + switch (get_arm_irn_opcode(node)) { + case iro_arm_Ldf: + case iro_arm_Ldr: + break; + default: + return; + } + + attr = get_arm_load_store_attr_const(node); + entity = attr->entity; + mode = attr->load_store_mode; + align = get_mode_size_bytes(mode); + if (entity != NULL) + return; + if (!attr->is_frame_entity) + return; + be_node_needs_frame_entity(env, node, mode, align); } -static void arm_before_ra(ir_graph *irg) +static void arm_set_frame_entity(ir_node *node, ir_entity *entity) { - be_sched_fix_flags(irg, &arm_reg_classes[CLASS_arm_flags], NULL, NULL); + if (is_be_node(node)) { + be_node_set_frame_entity(node, entity); + } else { + arm_load_store_attr_t *attr = get_arm_load_store_attr(node); + attr->entity = entity; + } } static void transform_Reload(ir_node *node) { ir_node *block = get_nodes_block(node); dbg_info *dbgi = get_irn_dbg_info(node); - ir_node *ptr = get_irn_n(node, be_pos_Reload_frame); - ir_node *mem = get_irn_n(node, be_pos_Reload_mem); + ir_node *ptr = get_irn_n(node, n_be_Reload_frame); + ir_node *mem = get_irn_n(node, n_be_Reload_mem); ir_mode *mode = get_irn_mode(node); ir_entity *entity = be_get_frame_entity(node); const arch_register_t *reg; ir_node *proj; ir_node *load; - ir_node *sched_point = sched_prev(node); - load = new_bd_arm_Ldr(dbgi, block, ptr, mem, mode, entity, false, 0, true); - sched_add_after(sched_point, load); - sched_remove(node); + sched_replace(node, load); proj = new_rd_Proj(dbgi, load, mode, pn_arm_Ldr_res); @@ -188,33 +192,26 @@ static void transform_Spill(ir_node *node) { ir_node *block = get_nodes_block(node); dbg_info *dbgi = get_irn_dbg_info(node); - ir_node *ptr = get_irn_n(node, be_pos_Spill_frame); + ir_node *ptr = get_irn_n(node, n_be_Spill_frame); ir_graph *irg = get_irn_irg(node); - ir_node *mem = new_r_NoMem(irg); - ir_node *val = get_irn_n(node, be_pos_Spill_val); + ir_node *mem = get_irg_no_mem(irg); + ir_node *val = get_irn_n(node, n_be_Spill_val); ir_mode *mode = get_irn_mode(val); ir_entity *entity = be_get_frame_entity(node); - ir_node *sched_point; ir_node *store; - sched_point = sched_prev(node); store = new_bd_arm_Str(dbgi, block, ptr, val, mem, mode, entity, false, 0, true); - - sched_remove(node); - sched_add_after(sched_point, store); + sched_replace(node, store); exchange(node, store); } static void arm_after_ra_walker(ir_node *block, void *data) { - ir_node *node, *prev; (void) data; - for (node = sched_last(block); !sched_is_begin(node); node = prev) { - prev = sched_prev(node); - + sched_foreach_reverse_safe(block, node) { if (be_is_Reload(node)) { transform_Reload(node); } else if (be_is_Spill(node)) { @@ -223,70 +220,34 @@ static void arm_after_ra_walker(ir_node *block, void *data) } } -static void arm_collect_frame_entity_nodes(ir_node *node, void *data) -{ - be_fec_env_t *env = (be_fec_env_t*)data; - const ir_mode *mode; - int align; - ir_entity *entity; - const arm_load_store_attr_t *attr; - - if (be_is_Reload(node) && be_get_frame_entity(node) == NULL) { - mode = get_irn_mode(node); - align = get_mode_size_bytes(mode); - be_node_needs_frame_entity(env, node, mode, align); - return; - } - - switch (get_arm_irn_opcode(node)) { - case iro_arm_Ldf: - case iro_arm_Ldr: - break; - default: - return; - } - - attr = get_arm_load_store_attr_const(node); - entity = attr->entity; - mode = attr->load_store_mode; - align = get_mode_size_bytes(mode); - if (entity != NULL) - return; - if (!attr->is_frame_entity) - return; - be_node_needs_frame_entity(env, node, mode, align); -} - -static void arm_set_frame_entity(ir_node *node, ir_entity *entity) -{ - if (is_be_node(node)) { - be_node_set_frame_entity(node, entity); - } else { - arm_load_store_attr_t *attr = get_arm_load_store_attr(node); - attr->entity = entity; - } -} - -static void arm_after_ra(ir_graph *irg) +/** + * Called immediately before emit phase. + */ +static void arm_finish_irg(ir_graph *irg) { - be_fec_env_t *fec_env = be_new_frame_entity_coalescer(irg); + be_stack_layout_t *stack_layout = be_get_irg_stack_layout(irg); + bool at_begin = stack_layout->sp_relative ? true : false; + be_fec_env_t *fec_env = be_new_frame_entity_coalescer(irg); irg_walk_graph(irg, NULL, arm_collect_frame_entity_nodes, fec_env); - be_assign_entities(fec_env, arm_set_frame_entity); + be_assign_entities(fec_env, arm_set_frame_entity, at_begin); be_free_frame_entity_coalescer(fec_env); irg_block_walk_graph(irg, NULL, arm_after_ra_walker, NULL); + + /* fix stack entity offsets */ + be_abi_fix_stack_nodes(irg); + be_abi_fix_stack_bias(irg); + + /* do peephole optimizations and fix stack offsets */ + arm_peephole_optimization(irg); } -/** - * Initializes the code generator. - */ -static void arm_init_graph(ir_graph *irg) +static void arm_before_ra(ir_graph *irg) { - (void) irg; + be_sched_fix_flags(irg, &arm_reg_classes[CLASS_arm_flags], NULL, NULL); } - /** * Maps all intrinsic calls that the backend support * and map all instructions the backend did not support @@ -321,7 +282,6 @@ static void arm_handle_intrinsics(void) rt_iDiv.mem_proj_nr = pn_Div_M; rt_iDiv.regular_proj_nr = pn_Div_X_regular; rt_iDiv.exc_proj_nr = pn_Div_X_except; - rt_iDiv.exc_mem_proj_nr = pn_Div_M; rt_iDiv.res_proj_nr = pn_Div_res; add_entity_linkage(rt_iDiv.ent, IR_LINKAGE_CONSTANT); @@ -348,7 +308,6 @@ static void arm_handle_intrinsics(void) rt_uDiv.mem_proj_nr = pn_Div_M; rt_uDiv.regular_proj_nr = pn_Div_X_regular; rt_uDiv.exc_proj_nr = pn_Div_X_except; - rt_uDiv.exc_mem_proj_nr = pn_Div_M; rt_uDiv.res_proj_nr = pn_Div_res; set_entity_visibility(rt_uDiv.ent, ir_visibility_external); @@ -374,7 +333,6 @@ static void arm_handle_intrinsics(void) rt_iMod.mem_proj_nr = pn_Mod_M; rt_iMod.regular_proj_nr = pn_Mod_X_regular; rt_iMod.exc_proj_nr = pn_Mod_X_except; - rt_iMod.exc_mem_proj_nr = pn_Mod_M; rt_iMod.res_proj_nr = pn_Mod_res; set_entity_visibility(rt_iMod.ent, ir_visibility_external); @@ -400,7 +358,6 @@ static void arm_handle_intrinsics(void) rt_uMod.mem_proj_nr = pn_Mod_M; rt_uMod.regular_proj_nr = pn_Mod_X_regular; rt_uMod.exc_proj_nr = pn_Mod_X_except; - rt_uMod.exc_mem_proj_nr = pn_Mod_M; rt_uMod.res_proj_nr = pn_Mod_res; set_entity_visibility(rt_uMod.ent, ir_visibility_external); @@ -418,96 +375,49 @@ static void arm_handle_intrinsics(void) extern const arch_isa_if_t arm_isa_if; static arm_isa_t arm_isa_template = { { - &arm_isa_if, /* isa interface */ + &arm_isa_if, /* isa interface */ N_ARM_REGISTERS, arm_registers, N_ARM_CLASSES, arm_reg_classes, &arm_registers[REG_SP], /* stack pointer */ &arm_registers[REG_R11], /* base pointer */ - &arm_reg_classes[CLASS_arm_gp], /* static link pointer class */ - -1, /* stack direction */ - 2, /* power of two stack alignment for calls, 2^2 == 4 */ - NULL, /* main environment */ - 7, /* spill costs */ - 5, /* reload costs */ - true, /* we do have custom abi handling */ + 2, /* power of two stack alignment for calls, 2^2 == 4 */ + 7, /* spill costs */ + 5, /* reload costs */ + true, /* we do have custom abi handling */ }, - ARM_FPU_ARCH_FPE, /* FPU architecture */ + ARM_FPU_ARCH_FPE, /* FPU architecture */ }; -/** - * Initializes the backend ISA and opens the output file. - */ -static arch_env_t *arm_init(FILE *file_handle) +static void arm_init(void) { - arm_isa_t *isa = XMALLOC(arm_isa_t); - memcpy(isa, &arm_isa_template, sizeof(*isa)); - arm_register_init(); - be_emit_init(file_handle); - arm_create_opcodes(&arm_irn_ops); - arm_handle_intrinsics(); - - be_gas_emit_types = false; - - /* needed for the debug support */ - be_gas_emit_switch_section(GAS_SECTION_TEXT); - be_emit_irprintf("%stext0:\n", be_gas_get_private_prefix()); - be_emit_write_line(); - - return &isa->base; } - - -/** - * Closes the output file and frees the ISA structure. - */ -static void arm_done(void *self) +static void arm_finish(void) { - arm_isa_t *isa = (arm_isa_t*)self; - - be_gas_emit_decls(isa->base.main_env); - - be_emit_exit(); - free(self); + arm_free_opcodes(); } -/** - * Get the register class which shall be used to store a value of a given mode. - * @param self The this pointer. - * @param mode The mode in question. - * @return A register class which can hold values of the given mode. - */ -static const arch_register_class_t *arm_get_reg_class_for_mode(const ir_mode *mode) +static arch_env_t *arm_begin_codegeneration(void) { - if (mode_is_float(mode)) - return &arm_reg_classes[CLASS_arm_fpa]; - else - return &arm_reg_classes[CLASS_arm_gp]; -} + arm_isa_t *isa = XMALLOC(arm_isa_t); + *isa = arm_isa_template; -/** - * Returns the necessary byte alignment for storing a register of given class. - */ -static int arm_get_reg_class_alignment(const arch_register_class_t *cls) -{ - (void) cls; - /* ARM is a 32 bit CPU, no need for other alignment */ - return 4; + be_gas_emit_types = false; + + return &isa->base; } /** - * Return irp irgs in the desired order. + * Closes the output file and frees the ISA structure. */ -static ir_graph **arm_get_irg_list(const void *self, ir_graph ***irg_list) +static void arm_end_codegeneration(void *self) { - (void) self; - (void) irg_list; - return NULL; + free(self); } /** @@ -538,12 +448,23 @@ static int arm_is_valid_clobber(const char *clobber) static void arm_lower_for_target(void) { - int i; - int n_irgs = get_irp_n_irgs(); + ir_mode *mode_gp = arm_reg_classes[CLASS_arm_gp].mode; + size_t i, n_irgs = get_irp_n_irgs(); + + /* lower compound param handling */ + lower_calls_with_compounds(LF_RETURN_HIDDEN); for (i = 0; i < n_irgs; ++i) { ir_graph *irg = get_irp_irg(i); - lower_switch(irg, 256, true); + lower_switch(irg, 4, 256, mode_gp); + } + + for (i = 0; i < n_irgs; ++i) { + ir_graph *irg = get_irp_irg(i); + /* Turn all small CopyBs into loads/stores and all bigger CopyBs into + * memcpy calls. + * TODO: These constants need arm-specific tuning. */ + lower_CopyB(irg, 31, 32, false); } } @@ -565,10 +486,15 @@ static const backend_params *arm_get_libfirm_params(void) 0, /* don't support inline assembler yet */ 1, /* support Rotl nodes */ 1, /* big endian */ - arm_lower_for_target, /* lowering function */ + 1, /* modulo shift efficient */ + 0, /* non-modulo shift not efficient */ &ad, /* will be set later */ arm_is_mux_allowed, /* allow_ifconv function */ + 32, /* machine size */ NULL, /* float arithmetic mode (TODO) */ + NULL, /* long long type */ + NULL, /* unsigned long long type */ + NULL, /* long double type */ 0, /* no trampoline support: size 0 */ 0, /* no trampoline support: align 0 */ NULL, /* no trampoline support: no trampoline builder */ @@ -600,28 +526,31 @@ static const lc_opt_table_entry_t arm_options[] = { const arch_isa_if_t arm_isa_if = { arm_init, - arm_done, - NULL, /* handle_intrinsics */ - arm_get_reg_class_for_mode, - NULL, - arm_get_reg_class_alignment, + arm_finish, arm_get_libfirm_params, - arm_get_irg_list, - NULL, /* mark remat */ + arm_lower_for_target, arm_parse_asm_constraint, arm_is_valid_clobber, - arm_init_graph, + arm_begin_codegeneration, + arm_end_codegeneration, + NULL, + NULL, /* get call abi */ + NULL, /* mark remat */ NULL, /* get_pic_base */ + be_new_spill, + be_new_reload, + NULL, /* register_saved_by */ + + arm_handle_intrinsics, /* handle_intrinsics */ NULL, /* before_abi */ arm_prepare_graph, arm_before_ra, - arm_after_ra, arm_finish_irg, arm_gen_routine, }; -BE_REGISTER_MODULE_CONSTRUCTOR(be_init_arch_arm); +BE_REGISTER_MODULE_CONSTRUCTOR(be_init_arch_arm) void be_init_arch_arm(void) { lc_opt_entry_t *be_grp = lc_opt_get_grp(firm_opt_get_root(), "be");