X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Farm%2Fbearch_arm.c;h=5e60e8e73c1a7503b20d5fde909a78f2f70db685;hb=f28b13d75052732f6fc377cb4eb7b3fe3c5f60bc;hp=cdc284b79e1329c6d625625b2509138d5ee65826;hpb=f367417f534bf889c72b7c0f97bb907e31674051;p=libfirm

diff --git a/ir/be/arm/bearch_arm.c b/ir/be/arm/bearch_arm.c
index cdc284b79..5e60e8e73 100644
--- a/ir/be/arm/bearch_arm.c
+++ b/ir/be/arm/bearch_arm.c
@@ -27,8 +27,8 @@
 #include "config.h"
 #endif
 
-#include <libcore/lc_opts.h>
-#include <libcore/lc_opts_enum.h>
+#include "lc_opts.h"
+#include "lc_opts_enum.h"
 
 #include "pseudo_irg.h"
 #include "irgwalk.h"
@@ -39,6 +39,7 @@
 #include "irgopt.h"
 #include "iroptimize.h"
 #include "lowering.h"
+#include "error.h"
 
 #include "bitset.h"
 #include "debug.h"
@@ -62,6 +63,7 @@
 #include "arm_new_nodes.h"           /* arm nodes interface */
 #include "gen_arm_regalloc_if.h"     /* the generated interface (register type and class defenitions) */
 #include "arm_transform.h"
+#include "arm_optimize.h"
 #include "arm_emitter.h"
 #include "arm_map_regs.h"
 
@@ -86,13 +88,11 @@ static set *cur_reg_set = NULL;
  * If the node returns a tuple (mode_T) then the proj's
  * will be asked for this information.
  */
-static const
-arch_register_req_t *arm_get_irn_reg_req(const void *self, const ir_node *node,
-                                         int pos)
+static const arch_register_req_t *arm_get_irn_reg_req(const ir_node *node,
+                                                      int pos)
 {
 	long               node_pos = pos == -1 ? 0 : pos;
 	ir_mode           *mode     = get_irn_mode(node);
-	(void) self;
 
 	if (is_Block(node) || mode == mode_X) {
 		return arch_no_register_req;
@@ -131,11 +131,9 @@ arch_register_req_t *arm_get_irn_reg_req(const void *self, const ir_node *node,
 	return arch_no_register_req;
 }
 
-static void arm_set_irn_reg(const void *self, ir_node *irn,
-                            const arch_register_t *reg)
+static void arm_set_irn_reg(ir_node *irn, const arch_register_t *reg)
 {
 	int pos = 0;
-	(void) self;
 
 	if (get_irn_mode(irn) == mode_X) {
 		return;
@@ -158,12 +156,10 @@ static void arm_set_irn_reg(const void *self, ir_node *irn,
 	}
 }
 
-static const arch_register_t *arm_get_irn_reg(const void *self,
-                                              const ir_node *irn)
+static const arch_register_t *arm_get_irn_reg(const ir_node *irn)
 {
 	int pos = 0;
 	const arch_register_t *reg = NULL;
-	(void) self;
 
 	if (is_Proj(irn)) {
 
@@ -187,9 +183,8 @@ static const arch_register_t *arm_get_irn_reg(const void *self,
 	return reg;
 }
 
-static arch_irn_class_t arm_classify(const void *self, const ir_node *irn)
+static arch_irn_class_t arm_classify(const ir_node *irn)
 {
-	(void) self;
 	irn = skip_Proj_const(irn);
 
 	if (is_cfop(irn)) {
@@ -202,59 +197,62 @@ static arch_irn_class_t arm_classify(const void *self, const ir_node *irn)
 	return 0;
 }
 
-static arch_irn_flags_t arm_get_flags(const void *self, const ir_node *irn)
+static arch_irn_flags_t arm_get_flags(const ir_node *irn)
 {
-	(void) self;
-	irn = skip_Proj_const(irn);
+	arch_irn_flags_t flags = arch_irn_flags_none;
 
-	if (is_arm_irn(irn)) {
-		return get_arm_flags(irn);
-	}
-	else if (is_Unknown(irn)) {
+	if(is_Unknown(irn)) {
 		return arch_irn_flags_ignore;
 	}
 
-	return 0;
+	if (is_Proj(irn) && mode_is_datab(get_irn_mode(irn))) {
+		ir_node *pred = get_Proj_pred(irn);
+		if (is_arm_irn(pred)) {
+			flags = get_arm_out_flags(pred, get_Proj_proj(irn));
+		}
+		irn = pred;
+	}
+
+	if (is_arm_irn(irn)) {
+		flags |= get_arm_flags(irn);
+	}
+
+	return flags;
 }
 
-static ir_entity *arm_get_frame_entity(const void *self, const ir_node *irn)
-{
-	(void) self;
+static ir_entity *arm_get_frame_entity(const ir_node *irn) {
+	/* we do NOT transform be_Spill or be_Reload nodes, so we never
+	   have frame access using ARM nodes. */
 	(void) irn;
-	/* TODO: return the entity assigned to the frame */
 	return NULL;
 }
 
-static void arm_set_frame_entity(const void *self, ir_node *irn, ir_entity *ent)
-{
-	(void) self;
+static void arm_set_frame_entity(ir_node *irn, ir_entity *ent) {
 	(void) irn;
 	(void) ent;
-	/* TODO: set the entity assigned to the frame */
+	panic("arm_set_frame_entity() called. This should not happen.");
 }
 
 /**
  * This function is called by the generic backend to correct offsets for
  * nodes accessing the stack.
  */
-static void arm_set_stack_bias(const void *self, ir_node *irn, int bias)
+static void arm_set_stack_bias(ir_node *irn, int bias)
 {
-	(void) self;
 	(void) irn;
 	(void) bias;
 	/* TODO: correct offset if irn accesses the stack */
 }
 
-static int arm_get_sp_bias(const void *self, const ir_node *irn)
+static int arm_get_sp_bias(const ir_node *irn)
 {
-	(void) self;
 	(void) irn;
 	return 0;
 }
 
 /* fill register allocator interface */
 
-static const arch_irn_ops_if_t arm_irn_ops_if = {
+static const arch_irn_ops_t arm_irn_ops = {
 	arm_get_irn_reg_req,
 	arm_set_irn_reg,
 	arm_get_irn_reg,
@@ -270,13 +268,6 @@ static const arch_irn_ops_if_t arm_irn_ops_if = {
 	NULL,    /* perform_memory_operand  */
 };
 
-arm_irn_ops_t arm_irn_ops = {
-	&arm_irn_ops_if,
-	NULL
-};
-
-
-
 /**************************************************
  *                _                         _  __
  *               | |                       (_)/ _|
@@ -316,10 +307,10 @@ static void arm_prepare_graph(void *self) {
  */
 static void arm_finish_irg(void *self)
 {
-	(void) self;
-	/* TODO: - fix offsets for nodes accessing stack
-			 - ...
-	*/
+	arm_code_gen_t *cg = self;
+
+	/* do peephole optimizations and fix stack offsets */
+	arm_peephole_optimization(cg);
 }
 
 
@@ -568,6 +559,7 @@ static void *arm_cg_init(be_irg_t *birg);
 
 static const arch_code_generator_if_t arm_code_gen_if = {
 	arm_cg_init,
+	NULL,               /* get_pic_base */
 	arm_before_abi,     /* before abi introduce */
 	arm_prepare_graph,
 	NULL,               /* spill */
@@ -583,7 +575,7 @@ static const arch_code_generator_if_t arm_code_gen_if = {
  */
 static void *arm_cg_init(be_irg_t *birg) {
 	static ir_type *int_tp = NULL;
-	arm_isa_t      *isa = (arm_isa_t *)birg->main_env->arch_env->isa;
+	arm_isa_t      *isa = (arm_isa_t *)birg->main_env->arch_env;
 	arm_code_gen_t *cg;
 
 	if (! int_tp) {
@@ -608,8 +600,6 @@ static void *arm_cg_init(be_irg_t *birg) {
 
 	cur_reg_set = cg->reg_set;
 
-	arm_irn_ops.cg = cg;
-
 	/* enter the current code generator */
 	isa->cg = cg;
 
@@ -759,6 +749,7 @@ static arm_isa_t arm_isa_template = {
 		&arm_gp_regs[REG_SP],  /* stack pointer */
 		&arm_gp_regs[REG_R11], /* base pointer */
 		-1,                    /* stack direction */
+		2,                     /* power of two stack alignment for calls, 2^2 == 4 */
 		NULL,                  /* main environment */
 		7,                     /* spill costs */
 		5,                     /* reload costs */
@@ -771,7 +762,7 @@ static arm_isa_t arm_isa_template = {
 /**
  * Initializes the backend ISA and opens the output file.
  */
-static void *arm_init(FILE *file_handle) {
+static arch_env_t *arm_init(FILE *file_handle) {
 	static int inited = 0;
 	arm_isa_t *isa;
 
@@ -786,7 +777,7 @@ static void *arm_init(FILE *file_handle) {
 	isa->cg  = NULL;
 	be_emit_init(file_handle);
 
-	arm_create_opcodes();
+	arm_create_opcodes(&arm_irn_ops);
 	arm_handle_intrinsics();
 
 	/* we mark referenced global entities, so we can only emit those which
@@ -796,7 +787,7 @@ static void *arm_init(FILE *file_handle) {
 	inc_master_type_visited();
 
 	inited = 1;
-	return isa;
+	return &isa->arch_env;
 }
 
 
@@ -807,7 +798,7 @@ static void *arm_init(FILE *file_handle) {
 static void arm_done(void *self) {
 	arm_isa_t *isa = self;
 
-	be_gas_emit_decls(isa->arch_isa.main_env, 1);
+	be_gas_emit_decls(isa->arch_env.main_env, 1);
 
 	be_emit_exit();
 	free(self);
@@ -880,7 +871,6 @@ static ir_type *arm_get_between_type(void *self) {
 typedef struct {
 	be_abi_call_flags_bits_t flags;
 	const arch_env_t *arch_env;
-	const arch_isa_t *isa;
 	ir_graph *irg;
 } arm_abi_env_t;
 
@@ -891,7 +881,6 @@ static void *arm_abi_init(const be_abi_call_t *call, const arch_env_t *arch_env,
 	env->flags    = fl.bits;
 	env->irg      = irg;
 	env->arch_env = arch_env;
-	env->isa      = arch_env->isa;
 	return env;
 }
 
@@ -899,7 +888,7 @@ static void arm_abi_dont_save_regs(void *self, pset *s)
 {
 	arm_abi_env_t *env = self;
 	if (env->flags.try_omit_fp)
-		pset_insert_ptr(s, env->isa->bp);
+		pset_insert_ptr(s, env->arch_env->bp);
 }
 
 
@@ -914,14 +903,14 @@ static const arch_register_t *arm_abi_prologue(void *self, ir_node **mem, pmap *
 	ir_node *block = get_irg_start_block(irg);
 	arch_register_class_t *gp = &arm_reg_classes[CLASS_arm_gp];
 
-	ir_node *fp = be_abi_reg_map_get(reg_map, env->isa->bp);
+	ir_node *fp = be_abi_reg_map_get(reg_map, env->arch_env->bp);
 	ir_node *ip = be_abi_reg_map_get(reg_map, &arm_gp_regs[REG_R12]);
-	ir_node *sp = be_abi_reg_map_get(reg_map, env->isa->sp);
+	ir_node *sp = be_abi_reg_map_get(reg_map, env->arch_env->sp);
 	ir_node *lr = be_abi_reg_map_get(reg_map, &arm_gp_regs[REG_LR]);
 	ir_node *pc = be_abi_reg_map_get(reg_map, &arm_gp_regs[REG_PC]);
 
 	if (env->flags.try_omit_fp)
-		return env->isa->sp;
+		return env->arch_env->sp;
 
 	ip = be_new_Copy(gp, irg, block, sp);
 	arch_set_irn_register(env->arch_env, ip, &arm_gp_regs[REG_R12]);
@@ -929,8 +918,8 @@ static const arch_register_t *arm_abi_prologue(void *self, ir_node **mem, pmap *
 
 	store = new_rd_arm_StoreStackM4Inc(NULL, irg, block, sp, fp, ip, lr, pc, *mem);
 
-	sp = new_r_Proj(irg, block, store, env->isa->sp->reg_class->mode, pn_arm_StoreStackM4Inc_ptr);
-	arch_set_irn_register(env->arch_env, sp, env->isa->sp);
+	sp = new_r_Proj(irg, block, store, env->arch_env->sp->reg_class->mode, pn_arm_StoreStackM4Inc_ptr);
+	arch_set_irn_register(env->arch_env, sp, env->arch_env->sp);
 	*mem = new_r_Proj(irg, block, store, mode_M, pn_arm_StoreStackM4Inc_M);
 
 	keep = be_new_CopyKeep_single(gp, irg, block, ip, sp, get_irn_mode(ip));
@@ -938,17 +927,16 @@ static const arch_register_t *arm_abi_prologue(void *self, ir_node **mem, pmap *
 	arch_set_irn_register(env->arch_env, keep, &arm_gp_regs[REG_R12]);
 	be_set_constr_single_reg(keep, BE_OUT_POS(0), &arm_gp_regs[REG_R12] );
 
-	fp = new_rd_arm_Sub_i(NULL, irg, block, keep, get_irn_mode(fp),
-	                      new_tarval_from_long(4, get_irn_mode(fp)));
-	arch_set_irn_register(env->arch_env, fp, env->isa->bp);
+	fp = new_rd_arm_Sub_i(NULL, irg, block, keep, get_irn_mode(fp), 4);
+	arch_set_irn_register(env->arch_env, fp, env->arch_env->bp);
 
-	be_abi_reg_map_set(reg_map, env->isa->bp, fp);
+	be_abi_reg_map_set(reg_map, env->arch_env->bp, fp);
 	be_abi_reg_map_set(reg_map, &arm_gp_regs[REG_R12], keep);
-	be_abi_reg_map_set(reg_map, env->isa->sp, sp);
+	be_abi_reg_map_set(reg_map, env->arch_env->sp, sp);
 	be_abi_reg_map_set(reg_map, &arm_gp_regs[REG_LR], lr);
 	be_abi_reg_map_set(reg_map, &arm_gp_regs[REG_PC], pc);
 
-	return env->isa->bp;
+	return env->arch_env->bp;
 }
 
 /**
@@ -956,14 +944,14 @@ static const arch_register_t *arm_abi_prologue(void *self, ir_node **mem, pmap *
  */
 static void arm_abi_epilogue(void *self, ir_node *bl, ir_node **mem, pmap *reg_map) {
 	arm_abi_env_t *env = self;
-	ir_node *curr_sp = be_abi_reg_map_get(reg_map, env->isa->sp);
-	ir_node *curr_bp = be_abi_reg_map_get(reg_map, env->isa->bp);
+	ir_node *curr_sp = be_abi_reg_map_get(reg_map, env->arch_env->sp);
+	ir_node *curr_bp = be_abi_reg_map_get(reg_map, env->arch_env->bp);
 	ir_node *curr_pc = be_abi_reg_map_get(reg_map, &arm_gp_regs[REG_PC]);
 	ir_node	*curr_lr = be_abi_reg_map_get(reg_map, &arm_gp_regs[REG_LR]);
 
 	// TODO: Activate Omit fp in epilogue
 	if (env->flags.try_omit_fp) {
-		curr_sp = be_new_IncSP(env->isa->sp, env->irg, bl, curr_sp, BE_STACK_FRAME_SIZE_SHRINK);
+		curr_sp = be_new_IncSP(env->arch_env->sp, env->irg, bl, curr_sp, BE_STACK_FRAME_SIZE_SHRINK, 0);
 		add_irn_dep(curr_sp, *mem);
 
 		curr_lr = be_new_CopyKeep_single(&arm_reg_classes[CLASS_arm_gp], env->irg, bl, curr_lr, curr_sp, get_irn_mode(curr_lr));
@@ -978,26 +966,25 @@ static void arm_abi_epilogue(void *self, ir_node *bl, ir_node **mem, pmap *reg_m
 	} else {
 		ir_node *sub12_node;
 		ir_node *load_node;
-		tarval *tv = new_tarval_from_long(12,mode_Iu);
-		sub12_node = new_rd_arm_Sub_i(NULL, env->irg, bl, curr_bp, mode_Iu, tv);
+		sub12_node = new_rd_arm_Sub_i(NULL, env->irg, bl, curr_bp, mode_Iu, 12);
 		// FIXME
 		//set_arm_req_out_all(sub12_node, sub12_req);
-		arch_set_irn_register(env->arch_env, sub12_node, env->isa->sp);
+		arch_set_irn_register(env->arch_env, sub12_node, env->arch_env->sp);
 		load_node = new_rd_arm_LoadStackM3( NULL, env->irg, bl, sub12_node, *mem );
 		// FIXME
 		//set_arm_req_out(load_node, &arm_default_req_arm_gp_r11, 0);
 		//set_arm_req_out(load_node, &arm_default_req_arm_gp_sp, 1);
 		//set_arm_req_out(load_node, &arm_default_req_arm_gp_pc, 2);
-		curr_bp = new_r_Proj(env->irg, bl, load_node, env->isa->bp->reg_class->mode, pn_arm_LoadStackM3_res0);
-		curr_sp = new_r_Proj(env->irg, bl, load_node, env->isa->sp->reg_class->mode, pn_arm_LoadStackM3_res1);
+		curr_bp = new_r_Proj(env->irg, bl, load_node, env->arch_env->bp->reg_class->mode, pn_arm_LoadStackM3_res0);
+		curr_sp = new_r_Proj(env->irg, bl, load_node, env->arch_env->sp->reg_class->mode, pn_arm_LoadStackM3_res1);
 		curr_pc = new_r_Proj(env->irg, bl, load_node, mode_Iu, pn_arm_LoadStackM3_res2);
 		*mem    = new_r_Proj(env->irg, bl, load_node, mode_M, pn_arm_LoadStackM3_M);
-		arch_set_irn_register(env->arch_env, curr_bp, env->isa->bp);
-		arch_set_irn_register(env->arch_env, curr_sp, env->isa->sp);
+		arch_set_irn_register(env->arch_env, curr_bp, env->arch_env->bp);
+		arch_set_irn_register(env->arch_env, curr_sp, env->arch_env->sp);
 		arch_set_irn_register(env->arch_env, curr_pc, &arm_gp_regs[REG_PC]);
 	}
-	be_abi_reg_map_set(reg_map, env->isa->sp, curr_sp);
-	be_abi_reg_map_set(reg_map, env->isa->bp, curr_bp);
+	be_abi_reg_map_set(reg_map, env->arch_env->sp, curr_sp);
+	be_abi_reg_map_set(reg_map, env->arch_env->bp, curr_bp);
 	be_abi_reg_map_set(reg_map, &arm_gp_regs[REG_LR], curr_lr);
 	be_abi_reg_map_set(reg_map, &arm_gp_regs[REG_PC], curr_pc);
 }
@@ -1023,21 +1010,18 @@ void arm_get_call_abi(const void *self, ir_type *method_type, be_abi_call_t *abi
 	ir_mode  *mode;
 	int       i;
 	int       n = get_method_n_params(method_type);
-	be_abi_call_flags_t flags = {
-		{
-			0, /* store from left to right */
-			0, /* store arguments sequential */
-			1, /* try to omit the frame pointer */
-			1, /* the function can use any register as frame pointer */
-			1, /* a call can take the callee's address as an immediate */
-			0, /* IRG is a leaf function */
-			0  /* Set to one, if there is already enough room on the stack for call args. */
-		}
-	};
+	be_abi_call_flags_t call_flags = be_abi_call_get_flags(abi);
 	(void) self;
 
+	/* set abi flags for calls */
+	call_flags.bits.left_to_right         = 0;
+	call_flags.bits.store_args_sequential = 0;
+	/* call_flags.bits.try_omit_fp     don't change this we can handle both */
+	call_flags.bits.fp_free               = 0;
+	call_flags.bits.call_has_imm          = 1;  /* IA32 calls can have immediate address */
+
 	/* set stack parameter passing style */
-	be_abi_call_set_flags(abi, flags, &arm_abi_callbacks);
+	be_abi_call_set_flags(abi, call_flags, &arm_abi_callbacks);
 
 	for (i = 0; i < n; i++) {
 		/* reg = get reg for param i;          */
@@ -1082,21 +1066,6 @@ void arm_get_call_abi(const void *self, ir_type *method_type, be_abi_call_t *abi
 	}
 }
 
-static const void *arm_get_irn_ops(const arch_irn_handler_t *self, const ir_node *irn) {
-	(void) self;
-	(void) irn;
-	return &arm_irn_ops;
-}
-
-const arch_irn_handler_t arm_irn_handler = {
-	arm_get_irn_ops
-};
-
-const arch_irn_handler_t *arm_get_irn_handler(const void *self) {
-	(void) self;
-	return &arm_irn_handler;
-}
-
 int arm_to_appear_in_schedule(void *block_env, const ir_node *irn) {
 	(void) block_env;
 	if(!is_arm_irn(irn))
@@ -1227,11 +1196,13 @@ static const backend_params *arm_get_libfirm_params(void) {
 	static backend_params p = {
 		1,     /* need dword lowering */
 		0,     /* don't support inline assembler yet */
+		0,     /* no immediate floating point mode. */
 		NULL,  /* no additional opcodes */
 		NULL,  /* will be set later */
 		NULL,  /* but yet no creator function */
 		NULL,  /* context for create_intrinsic_fkt */
 		NULL,  /* will be set below */
+		NULL   /* no immediate fp mode */
 	};
 
 	p.dep_param    = &ad;
@@ -1267,7 +1238,6 @@ const arch_isa_if_t arm_isa_if = {
 	arm_get_reg_class,
 	arm_get_reg_class_for_mode,
 	arm_get_call_abi,
-	arm_get_irn_handler,
 	arm_get_code_generator_if,
 	arm_get_list_sched_selector,
 	arm_get_ilp_sched_selector,