X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Farm%2Farm_transform.c;h=b2b219741418f03efa769dec4ec4a61d5c14d2d8;hb=ce6161a7e42a48f7422b7babcc64d8ace18e2687;hp=039dc863870867c47cb8671a9923c1569764cd8e;hpb=64a28ffcfdabd5111dda5705c65f5830e1fc3980;p=libfirm diff --git a/ir/be/arm/arm_transform.c b/ir/be/arm/arm_transform.c index 039dc8638..b2b219741 100644 --- a/ir/be/arm/arm_transform.c +++ b/ir/be/arm/arm_transform.c @@ -30,7 +30,6 @@ #include "irmode_t.h" #include "irgmod.h" #include "iredges.h" -#include "irvrfy.h" #include "ircons.h" #include "irprintf.h" #include "dbginfo.h" @@ -59,14 +58,12 @@ DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;) -/** hold the current code generator during transformation */ -static arm_code_gen_t *env_cg; - -static const arch_register_t *sp_reg = &arm_gp_regs[REG_SP]; +static const arch_register_t *sp_reg = &arm_registers[REG_SP]; static ir_mode *mode_gp; static ir_mode *mode_fp; static beabi_helper_env_t *abihelper; static calling_convention_t *cconv = NULL; +static arm_isa_t *isa; static pmap *node_to_stack; @@ -123,9 +120,9 @@ static ir_node *create_const_graph_value(dbg_info *dbgi, ir_node *block, */ static ir_node *create_const_graph(ir_node *irn, ir_node *block) { - tarval *tv = get_Const_tarval(irn); - ir_mode *mode = get_tarval_mode(tv); - unsigned value; + ir_tarval *tv = get_Const_tarval(irn); + ir_mode *mode = get_tarval_mode(tv); + unsigned value; if (mode_is_reference(mode)) { /* ARM is 32bit, so we can safely convert a reference tarval into Iu */ @@ -216,7 +213,7 @@ static ir_node *gen_Conv(ir_node *node) return new_op; if (mode_is_float(src_mode) || mode_is_float(dst_mode)) { - if (USE_FPA(env_cg->isa)) { + if (USE_FPA(isa)) { if (mode_is_float(src_mode)) { if (mode_is_float(dst_mode)) { /* from float to float */ @@ -233,7 +230,7 @@ static ir_node *gen_Conv(ir_node *node) return new_bd_arm_FltX(dbg, block, new_op, dst_mode); } } - } else if (USE_VFP(env_cg->isa)) { + } else if (USE_VFP(isa)) { panic("VFP not supported yet"); } else { panic("Softfloat not supported yet"); @@ -357,6 +354,7 @@ typedef enum { MATCH_SIZE_NEUTRAL = 1 << 2, MATCH_SKIP_NOT = 1 << 3, /**< skip Not on ONE input */ } match_flags_t; +ENUM_BITSET(match_flags_t) /** * possible binop constructors. @@ -439,6 +437,11 @@ static ir_node *gen_int_binop(ir_node *node, match_flags_t flags, attr->shift_modifier); } break; + case ARM_SHF_REG: + case ARM_SHF_RRX: + break; + case ARM_SHF_INVALID: + panic("invalid shift"); } } if ((flags & (MATCH_COMMUTATIVE|MATCH_REVERSE)) && is_arm_Mov(new_op1)) { @@ -446,7 +449,7 @@ static ir_node *gen_int_binop(ir_node *node, match_flags_t flags, int idx = flags & MATCH_REVERSE ? 1 : 0; switch (attr->shift_modifier) { - ir_node *mov_op, *mov_sft; + ir_node *mov_op, *mov_sft; case ARM_SHF_IMM: case ARM_SHF_ASR_IMM: @@ -471,6 +474,12 @@ static ir_node *gen_int_binop(ir_node *node, match_flags_t flags, attr->shift_modifier); } break; + + case ARM_SHF_REG: + case ARM_SHF_RRX: + break; + case ARM_SHF_INVALID: + panic("invalid shift"); } } return factory->new_binop_reg(dbgi, block, new_op1, new_op2); @@ -499,9 +508,9 @@ static ir_node *gen_Add(ir_node *node) dbg_info *dbgi = get_irn_dbg_info(node); ir_node *new_op1 = be_transform_node(op1); ir_node *new_op2 = be_transform_node(op2); - if (USE_FPA(env_cg->isa)) { + if (USE_FPA(isa)) { return new_bd_arm_Adf(dbgi, block, new_op1, new_op2, mode); - } else if (USE_VFP(env_cg->isa)) { + } else if (USE_VFP(isa)) { assert(mode != mode_E && "IEEE Extended FP not supported"); panic("VFP not supported yet"); } else { @@ -546,9 +555,9 @@ static ir_node *gen_Mul(ir_node *node) dbg_info *dbg = get_irn_dbg_info(node); if (mode_is_float(mode)) { - if (USE_FPA(env_cg->isa)) { + if (USE_FPA(isa)) { return new_bd_arm_Muf(dbg, block, new_op1, new_op2, mode); - } else if (USE_VFP(env_cg->isa)) { + } else if (USE_VFP(isa)) { assert(mode != mode_E && "IEEE Extended FP not supported"); panic("VFP not supported yet"); } else { @@ -571,9 +580,9 @@ static ir_node *gen_Quot(ir_node *node) assert(mode != mode_E && "IEEE Extended FP not supported"); - if (USE_FPA(env_cg->isa)) { + if (USE_FPA(isa)) { return new_bd_arm_Dvf(dbg, block, new_op1, new_op2, mode); - } else if (USE_VFP(env_cg->isa)) { + } else if (USE_VFP(isa)) { assert(mode != mode_E && "IEEE Extended FP not supported"); panic("VFP not supported yet"); } else { @@ -658,9 +667,9 @@ static ir_node *gen_Sub(ir_node *node) dbg_info *dbgi = get_irn_dbg_info(node); if (mode_is_float(mode)) { - if (USE_FPA(env_cg->isa)) { + if (USE_FPA(isa)) { return new_bd_arm_Suf(dbgi, block, new_op1, new_op2, mode); - } else if (USE_VFP(env_cg->isa)) { + } else if (USE_VFP(isa)) { assert(mode != mode_E && "IEEE Extended FP not supported"); panic("VFP not supported yet"); } else { @@ -709,7 +718,7 @@ static ir_node *make_shift(ir_node *node, match_flags_t flags, new_op1 = be_transform_node(op1); if (is_Const(op2)) { - tarval *tv = get_Const_tarval(op2); + ir_tarval *tv = get_Const_tarval(op2); unsigned int val = get_tarval_long(tv); assert(tarval_is_long(tv)); if (can_use_shift_constant(val, shift_modifier)) { @@ -782,10 +791,10 @@ static ir_node *gen_Rotl(ir_node *node) if (is_Add(op2)) { ir_node *right = get_Add_right(op2); if (is_Const(right)) { - tarval *tv = get_Const_tarval(right); - ir_mode *mode = get_irn_mode(node); - long bits = get_mode_size_bits(mode); - ir_node *left = get_Add_left(op2); + ir_tarval *tv = get_Const_tarval(right); + ir_mode *mode = get_irn_mode(node); + long bits = get_mode_size_bits(mode); + ir_node *left = get_Add_left(op2); if (is_Minus(left) && tarval_is_long(tv) && @@ -796,10 +805,10 @@ static ir_node *gen_Rotl(ir_node *node) } else if (is_Sub(op2)) { ir_node *left = get_Sub_left(op2); if (is_Const(left)) { - tarval *tv = get_Const_tarval(left); - ir_mode *mode = get_irn_mode(node); - long bits = get_mode_size_bits(mode); - ir_node *right = get_Sub_right(op2); + ir_tarval *tv = get_Const_tarval(left); + ir_mode *mode = get_irn_mode(node); + long bits = get_mode_size_bits(mode); + ir_node *right = get_Sub_right(op2); if (tarval_is_long(tv) && get_tarval_long(tv) == bits && @@ -807,9 +816,9 @@ static ir_node *gen_Rotl(ir_node *node) rotate = gen_Ror(node, op1, right); } } else if (is_Const(op2)) { - tarval *tv = get_Const_tarval(op2); - ir_mode *mode = get_irn_mode(node); - long bits = get_mode_size_bits(mode); + ir_tarval *tv = get_Const_tarval(op2); + ir_mode *mode = get_irn_mode(node); + long bits = get_mode_size_bits(mode); if (tarval_is_long(tv) && bits == 32) { ir_node *block = be_transform_node(get_nodes_block(node)); @@ -840,7 +849,7 @@ static ir_node *gen_Not(ir_node *node) const arm_shifter_operand_t *attr = get_arm_shifter_operand_attr_const(new_op); switch (attr->shift_modifier) { - ir_node *mov_op, *mov_sft; + ir_node *mov_op, *mov_sft; case ARM_SHF_IMM: case ARM_SHF_ASR_IMM: @@ -859,6 +868,12 @@ static ir_node *gen_Not(ir_node *node) mov_sft = get_irn_n(new_op, 1); return new_bd_arm_Mvn_reg_shift_reg(dbgi, block, mov_op, mov_sft, attr->shift_modifier); + + case ARM_SHF_REG: + case ARM_SHF_RRX: + break; + case ARM_SHF_INVALID: + panic("invalid shift"); } } @@ -874,9 +889,9 @@ static ir_node *gen_Minus(ir_node *node) ir_mode *mode = get_irn_mode(node); if (mode_is_float(mode)) { - if (USE_FPA(env_cg->isa)) { + if (USE_FPA(isa)) { return new_bd_arm_Mvf(dbgi, block, op, mode); - } else if (USE_VFP(env_cg->isa)) { + } else if (USE_VFP(isa)) { assert(mode != mode_E && "IEEE Extended FP not supported"); panic("VFP not supported yet"); } else { @@ -899,10 +914,10 @@ static ir_node *gen_Load(ir_node *node) ir_node *new_load = NULL; if (mode_is_float(mode)) { - if (USE_FPA(env_cg->isa)) { + if (USE_FPA(isa)) { new_load = new_bd_arm_Ldf(dbgi, block, new_ptr, new_mem, mode, NULL, 0, 0, false); - } else if (USE_VFP(env_cg->isa)) { + } else if (USE_VFP(isa)) { assert(mode != mode_E && "IEEE Extended FP not supported"); panic("VFP not supported yet"); } else { @@ -939,10 +954,10 @@ static ir_node *gen_Store(ir_node *node) ir_node *new_store = NULL; if (mode_is_float(mode)) { - if (USE_FPA(env_cg->isa)) { + if (USE_FPA(isa)) { new_store = new_bd_arm_Stf(dbgi, block, new_ptr, new_val, new_mem, mode, NULL, 0, 0, false); - } else if (USE_VFP(env_cg->isa)) { + } else if (USE_VFP(isa)) { assert(mode != mode_E && "IEEE Extended FP not supported"); panic("VFP not supported yet"); } else { @@ -1025,39 +1040,11 @@ static ir_node *gen_Cmp(ir_node *node) new_op2 = be_transform_node(op2); return new_bd_arm_Cmfe(dbgi, block, new_op1, new_op2, false); - - panic("FloatCmp NIY"); -#if 0 - ir_node *new_op2 = be_transform_node(op2); - /* floating point compare */ - pn_Cmp pnc = get_Proj_proj(selector); - - if (pnc & pn_Cmp_Uo) { - /* check for unordered, need cmf */ - return new_bd_arm_CmfBra(dbgi, block, new_op1, new_op2, pnc); - } - /* Hmm: use need cmfe */ - return new_bd_arm_CmfeBra(dbgi, block, new_op1, new_op2, pnc); -#endif } assert(get_irn_mode(op2) == cmp_mode); is_unsigned = !mode_is_signed(cmp_mode); - /* compare with 0 can be done with Tst */ - if (is_Const(op2) && is_Const_null(op2)) { - new_op1 = be_transform_node(op1); - new_op1 = gen_extension(dbgi, block, new_op1, cmp_mode); - return new_bd_arm_Tst_reg(dbgi, block, new_op1, new_op1, /*ins_permuted=*/false, - is_unsigned); - } - if (is_Const(op1) && is_Const_null(op1)) { - new_op2 = be_transform_node(op2); - new_op2 = gen_extension(dbgi, block, new_op2, cmp_mode); - return new_bd_arm_Tst_reg(dbgi, block, new_op2, new_op2, /*ins_permuted=*/true, - is_unsigned); - } - /* integer compare, TODO: use shifter_op in all its combinations */ new_op1 = be_transform_node(op1); new_op1 = gen_extension(dbgi, block, new_op1, cmp_mode); @@ -1084,10 +1071,10 @@ static ir_node *gen_Cond(ir_node *node) dbgi = get_irn_dbg_info(node); flag_node = be_transform_node(get_Proj_pred(selector)); - return new_bd_arm_B(dbgi, block, flag_node, get_Proj_proj(selector)); + return new_bd_arm_B(dbgi, block, flag_node, get_Proj_pn_cmp(selector)); } -static tarval *fpa_imm[3][fpa_max]; +static ir_tarval *fpa_imm[3][fpa_max]; #if 0 /** @@ -1130,12 +1117,12 @@ static ir_node *gen_Const(ir_node *node) dbg_info *dbg = get_irn_dbg_info(node); if (mode_is_float(mode)) { - if (USE_FPA(env_cg->isa)) { - tarval *tv = get_Const_tarval(node); - node = new_bd_arm_fConst(dbg, block, tv); + if (USE_FPA(isa)) { + ir_tarval *tv = get_Const_tarval(node); + node = new_bd_arm_fConst(dbg, block, tv); be_dep_on_frame(node); return node; - } else if (USE_VFP(env_cg->isa)) { + } else if (USE_VFP(isa)) { assert(mode != mode_E && "IEEE Extended FP not supported"); panic("VFP not supported yet"); } else { @@ -1165,7 +1152,7 @@ static ir_node *ints_to_double(dbg_info *dbgi, ir_node *block, ir_node *node0, * registers... */ ir_graph *irg = current_ir_graph; ir_node *stack = get_irg_frame(irg); - ir_node *nomem = new_NoMem(); + ir_node *nomem = new_r_NoMem(irg); ir_node *str0 = new_bd_arm_Str(dbgi, block, stack, node0, nomem, mode_gp, NULL, 0, 0, true); ir_node *str1 = new_bd_arm_Str(dbgi, block, stack, node1, nomem, mode_gp, @@ -1179,14 +1166,14 @@ static ir_node *ints_to_double(dbg_info *dbgi, ir_node *block, ir_node *node0, ldf = new_bd_arm_Ldf(dbgi, block, stack, sync, mode_D, NULL, 0, 0, true); set_irn_pinned(ldf, op_pin_state_floats); - return new_Proj(ldf, mode_fp, pn_arm_Ldf_res); + return new_r_Proj(ldf, mode_fp, pn_arm_Ldf_res); } static ir_node *int_to_float(dbg_info *dbgi, ir_node *block, ir_node *node) { ir_graph *irg = current_ir_graph; ir_node *stack = get_irg_frame(irg); - ir_node *nomem = new_NoMem(); + ir_node *nomem = new_r_NoMem(irg); ir_node *str = new_bd_arm_Str(dbgi, block, stack, node, nomem, mode_gp, NULL, 0, 0, true); ir_node *ldf; @@ -1195,14 +1182,14 @@ static ir_node *int_to_float(dbg_info *dbgi, ir_node *block, ir_node *node) ldf = new_bd_arm_Ldf(dbgi, block, stack, str, mode_F, NULL, 0, 0, true); set_irn_pinned(ldf, op_pin_state_floats); - return new_Proj(ldf, mode_fp, pn_arm_Ldf_res); + return new_r_Proj(ldf, mode_fp, pn_arm_Ldf_res); } static ir_node *float_to_int(dbg_info *dbgi, ir_node *block, ir_node *node) { ir_graph *irg = current_ir_graph; ir_node *stack = get_irg_frame(irg); - ir_node *nomem = new_NoMem(); + ir_node *nomem = new_r_NoMem(irg); ir_node *stf = new_bd_arm_Stf(dbgi, block, stack, node, nomem, mode_F, NULL, 0, 0, true); ir_node *ldr; @@ -1211,7 +1198,7 @@ static ir_node *float_to_int(dbg_info *dbgi, ir_node *block, ir_node *node) ldr = new_bd_arm_Ldr(dbgi, block, stack, stf, mode_gp, NULL, 0, 0, true); set_irn_pinned(ldr, op_pin_state_floats); - return new_Proj(ldr, mode_gp, pn_arm_Ldr_res); + return new_r_Proj(ldr, mode_gp, pn_arm_Ldr_res); } static void double_to_ints(dbg_info *dbgi, ir_node *block, ir_node *node, @@ -1219,7 +1206,7 @@ static void double_to_ints(dbg_info *dbgi, ir_node *block, ir_node *node, { ir_graph *irg = current_ir_graph; ir_node *stack = get_irg_frame(irg); - ir_node *nomem = new_NoMem(); + ir_node *nomem = new_r_NoMem(irg); ir_node *stf = new_bd_arm_Stf(dbgi, block, stack, node, nomem, mode_D, NULL, 0, 0, true); ir_node *ldr0, *ldr1; @@ -1230,8 +1217,8 @@ static void double_to_ints(dbg_info *dbgi, ir_node *block, ir_node *node, ldr1 = new_bd_arm_Ldr(dbgi, block, stack, stf, mode_gp, NULL, 0, 4, true); set_irn_pinned(ldr1, op_pin_state_floats); - *out_value0 = new_Proj(ldr0, mode_gp, pn_arm_Ldr_res); - *out_value1 = new_Proj(ldr1, mode_gp, pn_arm_Ldr_res); + *out_value0 = new_r_Proj(ldr0, mode_gp, pn_arm_Ldr_res); + *out_value1 = new_r_Proj(ldr1, mode_gp, pn_arm_Ldr_res); } static ir_node *gen_CopyB(ir_node *node) @@ -1441,7 +1428,7 @@ static ir_node *gen_Proj_Start(ir_node *node) return be_prolog_get_reg_value(abihelper, sp_reg); case pn_Start_P_tls: - return new_Bad(); + return new_r_Bad(get_irn_irg(node)); case pn_Start_max: break; @@ -1481,7 +1468,7 @@ static ir_node *gen_Proj_Proj_Start(ir_node *node) ir_node *ldr = new_bd_arm_Ldr(NULL, new_block, fp, mem, mode_gp, param->entity, 0, 0, true); - value1 = new_Proj(ldr, mode_gp, pn_arm_Ldr_res); + value1 = new_r_Proj(ldr, mode_gp, pn_arm_Ldr_res); } /* convert integer value to float */ @@ -1539,7 +1526,8 @@ static ir_node *gen_Proj_Proj_Call(ir_node *node) ir_node *call = get_Proj_pred(get_Proj_pred(node)); ir_node *new_call = be_transform_node(call); ir_type *function_type = get_Call_type(call); - calling_convention_t *cconv = arm_decide_calling_convention(function_type); + calling_convention_t *cconv + = arm_decide_calling_convention(NULL, function_type); const reg_or_stackslot_t *res = &cconv->results[pn]; ir_mode *mode; int regn; @@ -1624,7 +1612,7 @@ static ir_node *gen_Proj(ir_node *node) typedef ir_node *(*create_const_node_func)(dbg_info *db, ir_node *block); -static inline ir_node *create_const(ir_node **place, +static inline ir_node *create_const(ir_graph *irg, ir_node **place, create_const_node_func func, const arch_register_t* reg) { @@ -1633,7 +1621,7 @@ static inline ir_node *create_const(ir_node **place, if (*place != NULL) return *place; - block = get_irg_start_block(env_cg->irg); + block = get_irg_start_block(irg); res = func(NULL, block); arch_set_irn_register(res, reg); *place = res; @@ -1649,8 +1637,8 @@ static ir_node *gen_Unknown(ir_node *node) /* just produce a 0 */ ir_mode *mode = get_irn_mode(node); if (mode_is_float(mode)) { - tarval *tv = get_mode_null(mode); - ir_node *node = new_bd_arm_fConst(dbgi, new_block, tv); + ir_tarval *tv = get_mode_null(mode); + ir_node *node = new_bd_arm_fConst(dbgi, new_block, tv); be_dep_on_frame(node); return node; } else if (mode_needs_gp_reg(mode)) { @@ -1750,13 +1738,13 @@ static ir_node *gen_Start(ir_node *node) for (i = 0; i < get_method_n_params(function_type); ++i) { const reg_or_stackslot_t *param = &cconv->parameters[i]; if (param->reg0 != NULL) - be_prolog_add_reg(abihelper, param->reg0, 0); + be_prolog_add_reg(abihelper, param->reg0, arch_register_req_type_none); if (param->reg1 != NULL) - be_prolog_add_reg(abihelper, param->reg1, 0); + be_prolog_add_reg(abihelper, param->reg1, arch_register_req_type_none); } /* announce that we need the values of the callee save regs */ for (i = 0; i < (int) (sizeof(callee_saves)/sizeof(callee_saves[0])); ++i) { - be_prolog_add_reg(abihelper, callee_saves[i], 0); + be_prolog_add_reg(abihelper, callee_saves[i], arch_register_req_type_none); } start = be_prolog_create_start(abihelper, dbgi, new_block); @@ -1783,7 +1771,7 @@ static ir_node *get_stack_pointer_for(ir_node *node) } stack_pred_transformed = be_transform_node(stack_pred); - stack = pmap_get(node_to_stack, stack_pred); + stack = (ir_node*)pmap_get(node_to_stack, stack_pred); if (stack == NULL) { return get_stack_pointer_for(stack_pred); } @@ -1823,14 +1811,14 @@ static ir_node *gen_Return(ir_node *node) const reg_or_stackslot_t *slot = &cconv->results[i]; const arch_register_t *reg = slot->reg0; assert(slot->reg1 == NULL); - be_epilog_add_reg(abihelper, reg, 0, new_res_value); + be_epilog_add_reg(abihelper, reg, arch_register_req_type_none, new_res_value); } /* connect callee saves with their values at the function begin */ for (i = 0; i < n_callee_saves; ++i) { const arch_register_t *reg = callee_saves[i]; ir_node *value = be_prolog_get_reg_value(abihelper, reg); - be_epilog_add_reg(abihelper, reg, 0, value); + be_epilog_add_reg(abihelper, reg, arch_register_req_type_none, value); } /* create the barrier before the epilog code */ @@ -1858,7 +1846,7 @@ static ir_node *gen_Call(ir_node *node) ir_node *new_mem = be_transform_node(mem); dbg_info *dbgi = get_irn_dbg_info(node); ir_type *type = get_Call_type(node); - calling_convention_t *cconv = arm_decide_calling_convention(type); + calling_convention_t *cconv = arm_decide_calling_convention(NULL, type); int n_params = get_Call_n_params(node); int n_param_regs = sizeof(param_regs)/sizeof(param_regs[0]); /* max inputs: memory, callee, register arguments */ @@ -2012,7 +2000,7 @@ static ir_node *gen_Call(ir_node *node) pmap_insert(node_to_stack, node, incsp); } - set_arm_in_req_all(res, in_req); + arch_set_in_register_reqs(res, in_req); /* create output register reqs */ arch_set_out_register_req(res, 0, arch_no_register_req); @@ -2161,11 +2149,11 @@ static void arm_init_fpa_immediate(void) /** * Transform a Firm graph into an ARM graph. */ -void arm_transform_graph(arm_code_gen_t *cg) +void arm_transform_graph(ir_graph *irg) { static int imm_initialized = 0; - ir_graph *irg = cg->irg; ir_entity *entity = get_irg_entity(irg); + const arch_env_t *arch_env = be_get_irg_arch_env(irg); ir_type *frame_type; mode_gp = mode_Iu; @@ -2176,7 +2164,8 @@ void arm_transform_graph(arm_code_gen_t *cg) imm_initialized = 1; } arm_register_transformers(); - env_cg = cg; + + isa = (arm_isa_t*) arch_env; node_to_stack = pmap_create(); @@ -2184,10 +2173,10 @@ void arm_transform_graph(arm_code_gen_t *cg) abihelper = be_abihelper_prepare(irg); be_collect_stacknodes(abihelper); assert(cconv == NULL); - cconv = arm_decide_calling_convention(get_entity_type(entity)); + cconv = arm_decide_calling_convention(irg, get_entity_type(entity)); create_stacklayout(irg); - be_transform_graph(cg->irg, NULL); + be_transform_graph(irg, NULL); be_abihelper_finish(abihelper); abihelper = NULL;