X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Farm%2Farm_spec.pl;h=3adff66079a647db0a526722eb3da8baeef9a9a1;hb=fc2759fa267ba4b074c2ac570c1b9d47cc943612;hp=10d956d183af95ebd0b3d0c35ffa18c8f6621250;hpb=ede86ffb1270f07437edcc8ea3dd5d46530f93eb;p=libfirm diff --git a/ir/be/arm/arm_spec.pl b/ir/be/arm/arm_spec.pl index 10d956d18..3adff6607 100644 --- a/ir/be/arm/arm_spec.pl +++ b/ir/be/arm/arm_spec.pl @@ -28,10 +28,14 @@ $new_emit_syntax = 1; # comment => "any comment for constructor", # reg_req => { in => [ "reg_class|register" ], out => [ "reg_class|register|in_rX" ] }, # cmp_attr => "c source code for comparing node attributes", +# outs => { "out1", "out2" } # optional, creates pn_op_out1, ... consts +# ins => { "in1", "in2" } # optional, creates n_op_in1, ... consts +# mode => "mode_Iu" # optional, predefines the mode # emit => "emit code with templates", -# attr => "attitional attribute arguments for constructor" -# init_attr => "emit attribute initialization template" +# attr => "attitional attribute arguments for constructor", +# init_attr => "emit attribute initialization template", # rd_constructor => "c source code which constructs an ir_node" +# hash_func => "name of the hash function for this operation", # latency => "latency of this operation (can be float)" # attr_type => "name of the attribute struct", # }, @@ -106,33 +110,33 @@ $mode_gp = "mode_Iu"; $mode_fpa = "mode_E"; # register types: -# 0 - no special type -# 1 - caller save (register must be saved by the caller of a function) -# 2 - callee save (register must be saved by the called function) -# 4 - ignore (do not assign this register) -# 8 - emitter can choose an arbitrary register of this class -# 16 - the register is a virtual one -# 32 - register represents a state +$normal = 0; # no special type +$caller_save = 1; # caller save (register must be saved by the caller of a function) +$callee_save = 2; # callee save (register must be saved by the called function) +$ignore = 4; # ignore (do not assign this register) +$arbitrary = 8; # emitter can choose an arbitrary register of this class +$virtual = 16; # the register is a virtual one +$state = 32; # register represents a state # NOTE: Last entry of each class is the largest Firm-Mode a register can hold %reg_classes = ( gp => [ - { "name" => "r0", "type" => 1 }, - { "name" => "r1", "type" => 1 }, - { "name" => "r2", "type" => 1 }, - { "name" => "r3", "type" => 1 }, - { "name" => "r4", "type" => 2 }, - { "name" => "r5", "type" => 2 }, - { "name" => "r6", "type" => 2 }, - { "name" => "r7", "type" => 2 }, - { "name" => "r8", "type" => 2 }, - { "name" => "r9", "type" => 2 }, - { "name" => "r10", "type" => 2 }, - { "name" => "r11", "type" => 2 }, - { "name" => "r12", "type" => 4 | 2 }, # reserved for linker - { "name" => "sp", "type" => 4 | 2 }, # this is our stack pointer - { "name" => "lr", "type" => 2 | 1 }, # this is our return address - { "name" => "pc", "type" => 4 | 2 }, # this is our program counter - { name => "gp_UKNWN", type => 4 | 8 | 16 }, # we need a dummy register for Unknown nodes + { "name" => "r0", "type" => $caller_save }, + { "name" => "r1", "type" => $caller_save }, + { "name" => "r2", "type" => $caller_save }, + { "name" => "r3", "type" => $caller_save }, + { "name" => "r4", "type" => $callee_save }, + { "name" => "r5", "type" => $callee_save }, + { "name" => "r6", "type" => $callee_save }, + { "name" => "r7", "type" => $callee_save }, + { "name" => "r8", "type" => $callee_save }, + { "name" => "r9", "type" => $callee_save }, + { "name" => "r10", "type" => $callee_save }, + { "name" => "r11", "type" => $callee_save }, + { "name" => "r12", "type" => $ignore | $callee_save }, # reserved for linker + { "name" => "sp", "type" => $ignore | $callee_save }, # this is our stack pointer + { "name" => "lr", "type" => $callee_save | $caller_save }, # this is our return address + { "name" => "pc", "type" => $ignore | $callee_save }, # this is our program counter + { name => "gp_UKNWN", type => $ignore | $arbitrary | $virtual }, # we need a dummy register for Unknown nodes { "mode" => $mode_gp } ], fpa => [ @@ -445,25 +449,24 @@ Shl => { Shr => { irn_flags => "R", - comment => "construct Shr: Shr(a, b) = a >> b", - reg_req => { "in" => [ "gp", "gp" ], "out" => [ "in_r1" ] }, + comment => "construct Shr: Shr(a, b) = a >>u b", + reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] }, emit => '. mov %D0, %S0, lsr %S1' }, Shrs => { irn_flags => "R", - comment => "construct Shrs: Shrs(a, b) = a >> b", - reg_req => { "in" => [ "gp", "gp" ], "out" => [ "in_r1" ] }, + comment => "construct Shrs: Shrs(a, b) = a >>s b", + reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] }, emit => '. mov %D0, %S0, asr %S1' }, -#RotR => { -# irn_flags => "R", -# comment => "construct RotR: RotR(a, b) = a ROTR b", -# reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] }, -# emit => '. mov %D0, %S0, ror %S1 /* RotR(%S0, %S1) -> %D0, (%A1, %A2) */' -## emit => '. ror %S0, %S1, %D0' -#}, +Ror => { + irn_flags => "R", + comment => "construct Ror: Ror(a, b) = a <> b", + reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] }, + emit => '. mov %D0, %S0, ror %S1' +}, #RotL => { # irn_flags => "R", @@ -579,6 +582,17 @@ CmpBra => { attr_type => "arm_CondJmp_attr_t", }, +TstBra => { + op_flags => "L|X|Y", + state => "pinned", + comment => "construct conditional branch: TST A, B && JMPxx LABEL", + mode => "mode_T", + attr => "int proj_num", + init_attr => "\tset_arm_CondJmp_proj_num(res, proj_num);", + reg_req => { "in" => [ "gp", "gp" ], "out" => [ "none", "none"] }, + attr_type => "arm_CondJmp_attr_t", +}, + SwitchJmp => { op_flags => "L|X|Y", state => "pinned", @@ -677,7 +691,7 @@ StoreStackM4Inc => { op_flags => "L|F", irn_flags => "R", state => "exc_pinned", - comment => "construct Store: Store(ptr, val, mem) = ST ptr,val", + comment => "construct Store: Push 4 Registers = ST ptr,val", reg_req => { "in" => [ "sp", "gp", "gp", "gp", "gp", "none" ], "out" => [ "gp", "none" ] }, emit => '. stmfd %S0!, {%S1, %S2, %S3, %S4}', outs => [ "ptr", "M" ], @@ -716,7 +730,6 @@ fpaAdf => { }, fpaAdf_i => { - op_flags => "C", irn_flags => "R", comment => "construct FPA Add: Add(a, b) = Add(b, a) = a + b", attr => "long imm", @@ -735,7 +748,6 @@ fpaMuf => { }, fpaMuf_i => { - op_flags => "C", irn_flags => "R", comment => "construct FPA Mul: Mul(a, b) = Mul(b, a) = a * b", attr => "long imm", @@ -894,7 +906,7 @@ fpaMvf_i => { attr => "long imm", init_attr => 'ARM_SET_FPA_IMM(attr); attr->imm_value = imm;', reg_req => { "out" => [ "fpa" ] }, - emit => '. mvf %D0, %C', + emit => '. mvf%M %D0, %C', cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;' }, @@ -911,7 +923,7 @@ fpaMnf_i => { attr => "long imm", init_attr => 'ARM_SET_FPA_IMM(attr); attr->imm_value = imm;', reg_req => { "out" => [ "fpa" ] }, - emit => '. mnf %D0, %C', + emit => '. mnf%M %D0, %C', cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;' }, @@ -1024,9 +1036,9 @@ AddSP => { outs => [ "stack:I|S", "M" ], }, -SubSP => { +SubSPandCopy => { #irn_flags => "I", - comment => "construct Sub from stack pointer", + comment => "construct Sub from stack pointer and copy to Register", reg_req => { in => [ "sp", "gp", "none" ], out => [ "in_r1", "gp", "none" ] }, ins => [ "stack", "size", "mem" ], emit => ". sub %D0, %S0, %S1\n".