X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Farm%2Farm_new_nodes.c;h=4a0dd01f2e3ad39854a7d81ddf5a25932573b0c5;hb=44dd4365d606bc60bbbf97200b89c903d788ce45;hp=d8fda8cee858c156532631fac9032aefb625cfc1;hpb=95d3605c857bdb4b9eb11eb15c6ec328a4f9123d;p=libfirm diff --git a/ir/be/arm/arm_new_nodes.c b/ir/be/arm/arm_new_nodes.c index d8fda8cee..4a0dd01f2 100644 --- a/ir/be/arm/arm_new_nodes.c +++ b/ir/be/arm/arm_new_nodes.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved. + * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved. * * This file is part of libFirm. * @@ -25,9 +25,7 @@ * @author Oliver Richter, Tobias Gneist * @version $Id$ */ -#ifdef HAVE_CONFIG_H #include "config.h" -#endif #include @@ -38,16 +36,15 @@ #include "ircons_t.h" #include "iropt_t.h" #include "irop.h" -#include "firm_common_t.h" #include "irvrfy_t.h" #include "irprintf.h" #include "xmalloc.h" -#include "../bearch_t.h" +#include "../bearch.h" #include "arm_nodes_attr.h" #include "arm_new_nodes.h" -#include "gen_arm_regalloc_if_t.h" +#include "arm_optimize.h" #include "../beabi.h" #include "bearch_arm_t.h" @@ -56,10 +53,27 @@ * Returns the shift modifier string. */ const char *arm_shf_mod_name(arm_shift_modifier mod) { - static const char *names[] = { NULL, NULL, "asr", "lsl", "lsr", "ror", "rrx" }; + static const char *names[] = { NULL, NULL, "asr", "lsl", "lsr", "ror", "rrx" }; return names[mod]; } +/** + * Return the fpa immediate from the encoding. + */ +const char *arm_get_fpa_imm_name(long imm_value) { + static const char *fpa_imm[] = { + "0", + "1", + "2", + "3", + "4", + "5", + "10", + "0.5" + }; + return fpa_imm[imm_value]; +} + /*********************************************************************************** * _ _ _ __ * | | (_) | | / _| @@ -71,52 +85,6 @@ const char *arm_shf_mod_name(arm_shift_modifier mod) { * |_| ***********************************************************************************/ -/** - * Dumps the register requirements for either in or out. - */ -static void dump_reg_req(FILE *F, const ir_node *node, - const arch_register_req_t **reqs, int inout) { - char *dir = inout ? "out" : "in"; - int max = inout ? get_arm_n_res(node) : get_irn_arity(node); - char buf[1024]; - int i; - - memset(buf, 0, sizeof(buf)); - - if (reqs) { - for (i = 0; i < max; i++) { - fprintf(F, "%sreq #%d =", dir, i); - - if (reqs[i]->type == arch_register_req_type_none) { - fprintf(F, " n/a"); - } - - if (reqs[i]->type & arch_register_req_type_normal) { - fprintf(F, " %s", reqs[i]->cls->name); - } - - if (reqs[i]->type & arch_register_req_type_limited) { - fprintf(F, " %s", - arch_register_req_format(buf, sizeof(buf), reqs[i], node)); - } - - if (reqs[i]->type & arch_register_req_type_should_be_same) { - ir_fprintf(F, " same as %+F", get_irn_n(node, reqs[i]->other_same)); - } - - if (reqs[i]->type & arch_register_req_type_should_be_different) { - ir_fprintf(F, " different from %+F", get_irn_n(node, reqs[i]->other_different)); - } - - fprintf(F, "\n"); - } - - fprintf(F, "\n"); - } else { - fprintf(F, "%sreq = N/A\n", dir); - } -} - /** * Dumper interface for dumping arm nodes in vcg. * @param n the node to dump @@ -124,13 +92,10 @@ static void dump_reg_req(FILE *F, const ir_node *node, * @param reason indicates which kind of information should be dumped * @return 0 on success or != 0 on failure */ -static int arm_dump_node(ir_node *n, FILE *F, dump_reason_t reason) { +static int arm_dump_node(ir_node *n, FILE *F, dump_reason_t reason) +{ ir_mode *mode = NULL; - int bad = 0; - int i; arm_attr_t *attr = get_arm_attr(n); - const arch_register_req_t **reqs; - const arch_register_t **slots; arm_shift_modifier mod; switch (reason) { @@ -152,90 +117,35 @@ static int arm_dump_node(ir_node *n, FILE *F, dump_reason_t reason) { case dump_node_nodeattr_txt: mod = ARM_GET_SHF_MOD(attr); if (ARM_HAS_SHIFT(mod)) { - fprintf(F, "[%s #%ld]", arm_shf_mod_name(mod), get_tarval_long(attr->value)); + fprintf(F, "[%s #%ld]", arm_shf_mod_name(mod), attr->imm_value); } else if (mod == ARM_SHF_IMM) { /* immediate */ - fprintf(F, "[#0x%X]", arm_decode_imm_w_shift(attr->value)); + fprintf(F, "[#0x%X]", arm_decode_imm_w_shift(attr->imm_value)); } break; case dump_node_info_txt: - fprintf(F, "=== arm attr begin ===\n"); - - /* dump IN requirements */ - if (get_irn_arity(n) > 0) { - reqs = get_arm_in_req_all(n); - dump_reg_req(F, n, reqs, 0); - } - - /* dump OUT requirements */ - if (ARR_LEN(attr->slots) > 0) { - reqs = get_arm_out_req_all(n); - dump_reg_req(F, n, reqs, 1); - } - - /* dump assigned registers */ - slots = get_arm_slots(n); - if (slots && ARR_LEN(attr->slots) > 0) { - for (i = 0; i < ARR_LEN(attr->slots); i++) { - if (slots[i]) { - fprintf(F, "reg #%d = %s\n", i, slots[i]->name); - } - else { - fprintf(F, "reg #%d = n/a\n", i); - } - } - } - fprintf(F, "\n"); - - /* dump n_res */ - fprintf(F, "n_res = %d\n", get_arm_n_res(n)); - - /* dump flags */ - fprintf(F, "flags ="); - if (attr->flags == arch_irn_flags_none) { - fprintf(F, " none"); - } - else { - if (attr->flags & arch_irn_flags_dont_spill) { - fprintf(F, " unspillable"); - } - if (attr->flags & arch_irn_flags_rematerializable) { - fprintf(F, " remat"); - } - if (attr->flags & arch_irn_flags_ignore) { - fprintf(F, " ignore"); - } - } - fprintf(F, " (%d)\n", attr->flags); - - if (get_arm_value(n)) { - if (is_arm_CopyB(n)) { - fprintf(F, "size = %lu\n", get_tarval_long(get_arm_value(n))); + arch_dump_reqs_and_registers(F, n); + + if (is_arm_CopyB(n)) { + fprintf(F, "size = %lu\n", get_arm_imm_value(n)); + } else { + long v = get_arm_imm_value(n); + if (ARM_GET_FPA_IMM(attr)) { + fprintf(F, "immediate float value = %s\n", arm_get_fpa_imm_name(v)); } else { - if (mode_is_float(get_irn_mode(n))) { - fprintf(F, "float value = (%f)\n", (double) get_tarval_double(get_arm_value(n))); - } else if (mode_is_int(get_irn_mode(n))) { - long v = get_tarval_long(get_arm_value(n)); - fprintf(F, "long value = %ld (0x%08lx)\n", v, v); - } else if (mode_is_reference(get_irn_mode(n))) { - fprintf(F, "pointer\n"); - } else { - assert(0 && "unbehandelter Typ im const-Knoten"); - } + fprintf(F, "immediate value = %ld (0x%08lx)\n", v, v); } } - if (is_arm_CondJmp(n) && get_arm_CondJmp_proj_num(n) >= 0) { + + if (is_arm_CmpBra(n) && get_arm_CondJmp_proj_num(n) >= 0) { fprintf(F, "proj_num = (%d)\n", get_arm_CondJmp_proj_num(n)); } - /* TODO: dump all additional attributes */ - - fprintf(F, "=== arm attr end ===\n"); - /* end of: case dump_node_info_txt */ break; } - return bad; + + return 0; } @@ -275,6 +185,30 @@ const arm_SymConst_attr_t *get_arm_SymConst_attr_const(const ir_node *node) { return get_irn_generic_attr_const(node); } +static const arm_fpaConst_attr_t *get_arm_fpaConst_attr_const(const ir_node *node) { + const arm_attr_t *attr = get_arm_attr_const(node); + const arm_fpaConst_attr_t *fpa_attr = CONST_CAST_ARM_ATTR(arm_fpaConst_attr_t, attr); + + return fpa_attr; +} + +static arm_fpaConst_attr_t *get_arm_fpaConst_attr(ir_node *node) { + arm_attr_t *attr = get_arm_attr(node); + arm_fpaConst_attr_t *fpa_attr = CAST_ARM_ATTR(arm_fpaConst_attr_t, attr); + + return fpa_attr; +} + +#ifndef NDEBUG +static int is_arm_CondJmp(const ir_node *node) { + int code = get_arm_irn_opcode(node); + + return (code == iro_arm_CmpBra || code == iro_arm_fpaCmfBra || + code == iro_arm_fpaCnfBra || iro_arm_fpaCmfeBra || + code == iro_arm_fpaCnfeBra); +} +#endif + /* Returns the attributes of a CondJmp node. */ arm_CondJmp_attr_t *get_arm_CondJmp_attr(ir_node *node) { assert(is_arm_CondJmp(node)); @@ -305,14 +239,6 @@ const arch_register_req_t **get_arm_in_req_all(const ir_node *node) { return attr->in_req; } -/** - * Returns the result register requirements of an arm node. - */ -const arch_register_req_t **get_arm_out_req_all(const ir_node *node) { - const arm_attr_t *attr = get_arm_attr_const(node); - return attr->out_req; -} - /** * Returns the argument register requirement at position pos of an arm node. */ @@ -321,30 +247,6 @@ const arch_register_req_t *get_arm_in_req(const ir_node *node, int pos) { return attr->in_req[pos]; } -/** - * Returns the result register requirement at position pos of an arm node. - */ -const arch_register_req_t *get_arm_out_req(const ir_node *node, int pos) { - const arm_attr_t *attr = get_arm_attr_const(node); - return attr->out_req[pos]; -} - -/** - * Sets the OUT register requirements at position pos. - */ -void set_arm_req_out(ir_node *node, const arch_register_req_t *req, int pos) { - arm_attr_t *attr = get_arm_attr(node); - attr->out_req[pos] = req; -} - -/** - * Sets the complete OUT requirements of node. - */ -void set_arm_req_out_all(ir_node *node, const arch_register_req_t **reqs) { - arm_attr_t *attr = get_arm_attr(node); - attr->out_req = reqs; -} - /** * Sets the IN register requirements at position pos. */ @@ -354,107 +256,35 @@ void set_arm_req_in(ir_node *node, const arch_register_req_t *req, int pos) { } /** - * Returns the register flag of an arm node. - */ -arch_irn_flags_t get_arm_flags(const ir_node *node) { - const arm_attr_t *attr = get_arm_attr_const(node); - return attr->flags; -} - -/** - * Sets the register flag of an arm node. - */ -void set_arm_flags(ir_node *node, arch_irn_flags_t flags) { - arm_attr_t *attr = get_arm_attr(node); - attr->flags = flags; -} - -/** - * Returns the result register slots of an arm node. + * Returns the immediate value */ -const arch_register_t **get_arm_slots(const ir_node *node) { +long get_arm_imm_value(const ir_node *node) { const arm_attr_t *attr = get_arm_attr_const(node); - return attr->slots; + return attr->imm_value; } /** - * Returns the name of the OUT register at position pos. + * Sets the tarval value */ -const char *get_arm_out_reg_name(const ir_node *node, int pos) { - const arm_attr_t *attr = get_arm_attr_const(node); - - assert(is_arm_irn(node) && "Not an arm node."); - assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position."); - assert(attr->slots[pos] && "No register assigned"); - - return arch_register_get_name(attr->slots[pos]); -} - -/** - * Returns the index of the OUT register at position pos within its register class. - */ -int get_arm_out_regnr(const ir_node *node, int pos) { - const arm_attr_t *attr = get_arm_attr_const(node); - - assert(is_arm_irn(node) && "Not an arm node."); - assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position."); - assert(attr->slots[pos] && "No register assigned"); - - return arch_register_get_index(attr->slots[pos]); -} - -/** - * Returns the OUT register at position pos. - */ -const arch_register_t *get_arm_out_reg(const ir_node *node, int pos) { - const arm_attr_t *attr = get_arm_attr_const(node); - - assert(is_arm_irn(node) && "Not an arm node."); - assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position."); - assert(attr->slots[pos] && "No register assigned"); - - return attr->slots[pos]; -} - -/** - * Sets the flags for the n'th out. - */ -void set_arm_out_flags(ir_node *node, arch_irn_flags_t flags, int pos) { +void set_arm_imm_value(ir_node *node, long imm_value) { arm_attr_t *attr = get_arm_attr(node); - assert(pos < ARR_LEN(attr->out_flags) && "Invalid OUT position."); - attr->out_flags[pos] = flags; + attr->imm_value = imm_value; } /** - * Gets the flags for the n'th out. - */ -arch_irn_flags_t get_arm_out_flags(const ir_node *node, int pos) { - const arm_attr_t *attr = get_arm_attr_const(node); - assert(pos < ARR_LEN(attr->out_flags) && "Invalid OUT position."); - return attr->out_flags[pos]; -} - -/** - * Returns the number of results. - */ -int get_arm_n_res(const ir_node *node) { - const arm_attr_t *attr = get_arm_attr_const(node); - return ARR_LEN(attr->slots); -} -/** - * Returns the tarvalue + * Returns the fpaConst value */ -tarval *get_arm_value(const ir_node *node) { - const arm_attr_t *attr = get_arm_attr_const(node); - return attr->value; +tarval *get_fpaConst_value(const ir_node *node) { + const arm_fpaConst_attr_t *attr = get_arm_fpaConst_attr_const(node); + return attr->tv; } /** - * Sets the tarvalue + * Sets the tarval value */ -void set_arm_value(ir_node *node, tarval *tv) { - arm_attr_t *attr = get_arm_attr(node); - attr->value = tv; +void set_fpaConst_value(ir_node *node, tarval *tv) { + arm_fpaConst_attr_t *attr = get_arm_fpaConst_attr(node); + attr->tv = tv; } /** @@ -530,93 +360,24 @@ arm_shift_modifier get_arm_shift_modifier(const ir_node *node) { } /* Set the ARM machine node attributes to default values. */ -static void init_arm_attributes(ir_node *node, int flags, const arch_register_req_t ** in_reqs, - const arch_register_req_t ** out_reqs, const be_execution_unit_t ***execution_units, - int n_res, unsigned latency) { +static void init_arm_attributes(ir_node *node, int flags, + const arch_register_req_t ** in_reqs, + const be_execution_unit_t ***execution_units, + int n_res) { ir_graph *irg = get_irn_irg(node); struct obstack *obst = get_irg_obstack(irg); arm_attr_t *attr = get_arm_attr(node); + backend_info_t *info; + (void) execution_units; + arch_irn_set_flags(node, flags); attr->in_req = in_reqs; - attr->out_req = out_reqs; - attr->flags = flags; attr->instr_fl = (ARM_COND_AL << 3) | ARM_SHF_NONE; - attr->value = NULL; - - attr->out_flags = NEW_ARR_D(int, obst, n_res); - memset(attr->out_flags, 0, n_res * sizeof(attr->out_flags[0])); + attr->imm_value = 0; - attr->slots = NEW_ARR_D(const arch_register_t*, obst, n_res); - memset(attr->slots, 0, n_res * sizeof(attr->slots[0])); -} - -/*************************************************************************************** - * _ _ _ - * | | | | | | - * _ __ ___ __| | ___ ___ ___ _ __ ___| |_ _ __ _ _ ___| |_ ___ _ __ ___ - * | '_ \ / _ \ / _` |/ _ \ / __/ _ \| '_ \/ __| __| '__| | | |/ __| __/ _ \| '__/ __| - * | | | | (_) | (_| | __/ | (_| (_) | | | \__ \ |_| | | |_| | (__| || (_) | | \__ \ - * |_| |_|\___/ \__,_|\___| \___\___/|_| |_|___/\__|_| \__,_|\___|\__\___/|_| |___/ - * - ***************************************************************************************/ - -#ifdef BIT -#undef BIT -#endif -#define BIT(x) (1 << (x % 32)) - -static unsigned arm_req_sp_limited[] = { BIT(REG_SP) }; -static const arch_register_req_t _arm_req_sp = { - arch_register_req_type_limited, - &arm_reg_classes[CLASS_arm_gp], - arm_req_sp_limited, - -1, - -1 -}; - -/* construct Store: Store(ptr, val, mem) = ST ptr,val */ -ir_node *new_r_arm_StoreStackMInc(ir_graph *irg, ir_node *block, ir_node *mem, - ir_node *sp, int n_regs, ir_node **regs, - ir_mode *mode) { - ir_node *res; - ir_node *in[16]; - int flags = 0; - static const arch_register_req_t *_in_req_arm_StoreStackM4Inc[] = - { - &arm_StoreStackM4Inc_reg_req_in_0, - &arm_StoreStackM4Inc_reg_req_in_1, - &arm_StoreStackM4Inc_reg_req_in_2, - &arm_StoreStackM4Inc_reg_req_in_2, - &arm_StoreStackM4Inc_reg_req_in_2, - &arm_StoreStackM4Inc_reg_req_in_2, - &arm_StoreStackM4Inc_reg_req_in_2, - &arm_StoreStackM4Inc_reg_req_in_2, - &arm_StoreStackM4Inc_reg_req_in_2, - &arm_StoreStackM4Inc_reg_req_in_2, - &arm_StoreStackM4Inc_reg_req_in_2, - &arm_StoreStackM4Inc_reg_req_in_2, - &arm_StoreStackM4Inc_reg_req_in_2, - &arm_StoreStackM4Inc_reg_req_in_2, - &arm_StoreStackM4Inc_reg_req_in_2, - &arm_StoreStackM4Inc_reg_req_in_2, - &arm_StoreStackM4Inc_reg_req_in_2, - }; - - assert(n_regs <= 15); - - in[0] = mem; - in[1] = sp; - memcpy(&in[2], regs, n_regs * sizeof(in[0])); - res = new_ir_node(NULL, irg, block, op_arm_StoreStackM4Inc, mode, 2 + n_regs, in); - flags |= arch_irn_flags_rematerializable; /* op can be easily recalculated */ - - /* init node attributes */ - init_arm_attributes(res, flags, _in_req_arm_StoreStackM4Inc, NULL, NULL, 0, 1); - - res = optimize_node(res); - irn_vrfy_irg(res, irg); - - return res; + info = be_get_info(node); + info->out_infos = NEW_ARR_D(reg_out_info_t, obst, n_res); + memset(info->out_infos, 0, n_res * sizeof(info->out_infos[0])); } /************************************************ @@ -667,60 +428,69 @@ void arm_set_optimizers(void) { */ } -static int cmp_attr_arm_SymConst(ir_node *a, ir_node *b) { - const arm_SymConst_attr_t *attr_a = get_irn_generic_attr_const(a); - const arm_SymConst_attr_t *attr_b = get_irn_generic_attr_const(b); - return attr_a->symconst_id != attr_b->symconst_id; -} - static int cmp_attr_arm(ir_node *a, ir_node *b) { arm_attr_t *attr_a = get_irn_generic_attr(a); arm_attr_t *attr_b = get_irn_generic_attr(b); - return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value); + return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->imm_value != attr_b->imm_value); +} + +static int cmp_attr_arm_SymConst(ir_node *a, ir_node *b) { + const arm_SymConst_attr_t *attr_a; + const arm_SymConst_attr_t *attr_b; + + if (cmp_attr_arm(a, b)) + return 1; + + attr_a = get_irn_generic_attr_const(a); + attr_b = get_irn_generic_attr_const(b); + return attr_a->symconst_id != attr_b->symconst_id; } static int cmp_attr_arm_CondJmp(ir_node *a, ir_node *b) { + (void) a; + (void) b; /* never identical */ return 1; } static int cmp_attr_arm_SwitchJmp(ir_node *a, ir_node *b) { + (void) a; + (void) b; /* never identical */ return 1; } +static int cmp_attr_arm_fpaConst(ir_node *a, ir_node *b) { + const arm_fpaConst_attr_t *attr_a; + const arm_fpaConst_attr_t *attr_b; + + if (cmp_attr_arm(a, b)) + return 1; + + attr_a = get_arm_fpaConst_attr_const(a); + attr_b = get_arm_fpaConst_attr_const(b); + + return attr_a->tv != attr_b->tv; +} + /** copies the ARM attributes of a node. */ static void arm_copy_attr(const ir_node *old_node, ir_node *new_node) { ir_graph *irg = get_irn_irg(new_node); struct obstack *obst = get_irg_obstack(irg); const arm_attr_t *attr_old = get_arm_attr_const(old_node); arm_attr_t *attr_new = get_arm_attr(new_node); + backend_info_t *old_info = be_get_info(old_node); + backend_info_t *new_info = be_get_info(new_node); /* copy the attributes */ memcpy(attr_new, attr_old, get_op_attr_size(get_irn_op(old_node))); /* copy out flags */ - attr_new->out_flags = - DUP_ARR_D(int, obst, attr_old->out_flags); - /* copy register assignments */ - attr_new->slots = - DUP_ARR_D(arch_register_t*, obst, attr_old->slots); + new_info->out_infos = + DUP_ARR_D(reg_out_info_t, obst, old_info->out_infos); } /* Include the generated constructor functions */ #include "gen_arm_new_nodes.c.inl" - -/** - * Registers the arm_copy_attr function for all ARM opcodes. - */ -void arm_register_copy_attr_func(void) { - int i; - - for (i = get_irp_n_opcodes() - 1; i >= 0; --i) { - ir_op *op = get_irp_opcode(i); - if (is_arm_op(op)) - op->ops.copy_attr = arm_copy_attr; - } -}