X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Farm%2Farm_emitter.c;h=3ae15746b52d0c9a3e6d5a2551093ddf167a4bfd;hb=880f870d54e4e61ea5b87c0ed73b791e789fd613;hp=4fba74f223341612c263c5f98071d21c5434f6fd;hpb=b24c359be385d38d535efe35df5a937a8ee9cc0c;p=libfirm diff --git a/ir/be/arm/arm_emitter.c b/ir/be/arm/arm_emitter.c index 4fba74f22..3ae15746b 100644 --- a/ir/be/arm/arm_emitter.c +++ b/ir/be/arm/arm_emitter.c @@ -21,7 +21,6 @@ * @file * @brief arm emitter * @author Oliver Richter, Tobias Gneist, Michael Beck - * @version $Id$ */ #include "config.h" @@ -42,11 +41,11 @@ #include "raw_bitset.h" #include "dbginfo.h" -#include "../besched.h" -#include "../beblocksched.h" -#include "../beirg.h" -#include "../begnuas.h" -#include "../be_dbgout.h" +#include "besched.h" +#include "beblocksched.h" +#include "beirg.h" +#include "begnuas.h" +#include "bedwarf.h" #include "arm_emitter.h" #include "arm_optimize.h" @@ -56,97 +55,31 @@ #include "arm_map_regs.h" #include "gen_arm_regalloc_if.h" -#include "../benode.h" - -#define SNPRINTF_BUF_LEN 128 +#include "benode.h" DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;) static set *sym_or_tv; static arm_isa_t *isa; -/** - * Returns the register at in position pos. - */ -static const arch_register_t *get_in_reg(const ir_node *irn, int pos) -{ - ir_node *op; - const arch_register_t *reg = NULL; - - assert(get_irn_arity(irn) > pos && "Invalid IN position"); - - /* The out register of the operator at position pos is the - in register we need. */ - op = get_irn_n(irn, pos); - - reg = arch_get_irn_register(op); - - assert(reg && "no in register found"); - - /* in case of a joker register: just return a valid register */ - if (arch_register_type_is(reg, joker)) { - const arch_register_req_t *req = arch_get_register_req(irn, pos); - - if (arch_register_req_is(req, limited)) { - /* in case of limited requirements: get the first allowed register */ - unsigned idx = rbitset_next(req->limited, 0, 1); - reg = arch_register_for_index(req->cls, idx); - } else { - /* otherwise get first register in class */ - reg = arch_register_for_index(req->cls, 0); - } - } - return reg; -} - - -/** - * Returns the register at out position pos. - */ -static const arch_register_t *get_out_reg(const ir_node *node, int pos) +static void arm_emit_register(const arch_register_t *reg) { - ir_node *proj; - const arch_register_t *reg = NULL; - - /* 1st case: irn is not of mode_T, so it has only */ - /* one OUT register -> good */ - /* 2nd case: irn is of mode_T -> collect all Projs and ask the */ - /* Proj with the corresponding projnum for the register */ - - if (get_irn_mode(node) != mode_T) { - reg = arch_get_irn_register(node); - } else if (is_arm_irn(node)) { - reg = arch_irn_get_register(node, pos); - } else { - const ir_edge_t *edge; - - foreach_out_edge(node, edge) { - proj = get_edge_src_irn(edge); - assert(is_Proj(proj) && "non-Proj from mode_T node"); - if (get_Proj_proj(proj) == pos) { - reg = arch_get_irn_register(proj); - break; - } - } - } - - assert(reg && "no out register found"); - return reg; + be_emit_string(reg->name); } -void arm_emit_source_register(const ir_node *node, int pos) +static void arm_emit_source_register(const ir_node *node, int pos) { - const arch_register_t *reg = get_in_reg(node, pos); - be_emit_string(arch_register_get_name(reg)); + const arch_register_t *reg = arch_get_irn_register_in(node, pos); + arm_emit_register(reg); } -void arm_emit_dest_register(const ir_node *node, int pos) +static void arm_emit_dest_register(const ir_node *node, int pos) { - const arch_register_t *reg = get_out_reg(node, pos); - be_emit_string(arch_register_get_name(reg)); + const arch_register_t *reg = arch_get_irn_register_out(node, pos); + arm_emit_register(reg); } -void arm_emit_offset(const ir_node *node) +static void arm_emit_offset(const ir_node *node) { const arm_load_store_attr_t *attr = get_arm_load_store_attr_const(node); assert(attr->base.is_load_store); @@ -169,19 +102,19 @@ static void arm_emit_fpa_postfix(const ir_mode *mode) be_emit_char(c); } -void arm_emit_float_load_store_mode(const ir_node *node) +static void arm_emit_float_load_store_mode(const ir_node *node) { const arm_load_store_attr_t *attr = get_arm_load_store_attr_const(node); arm_emit_fpa_postfix(attr->load_store_mode); } -void arm_emit_float_arithmetic_mode(const ir_node *node) +static void arm_emit_float_arithmetic_mode(const ir_node *node) { const arm_farith_attr_t *attr = get_arm_farith_attr_const(node); arm_emit_fpa_postfix(attr->mode); } -void arm_emit_symconst(const ir_node *node) +static void arm_emit_symconst(const ir_node *node) { const arm_SymConst_attr_t *symconst = get_arm_SymConst_attr_const(node); ir_entity *entity = symconst->entity; @@ -191,7 +124,7 @@ void arm_emit_symconst(const ir_node *node) /* TODO do something with offset */ } -void arm_emit_load_mode(const ir_node *node) +static void arm_emit_load_mode(const ir_node *node) { const arm_load_store_attr_t *attr = get_arm_load_store_attr_const(node); ir_mode *mode = attr->load_store_mode; @@ -206,7 +139,7 @@ void arm_emit_load_mode(const ir_node *node) } } -void arm_emit_store_mode(const ir_node *node) +static void arm_emit_store_mode(const ir_node *node) { const arm_load_store_attr_t *attr = get_arm_load_store_attr_const(node); ir_mode *mode = attr->load_store_mode; @@ -245,9 +178,9 @@ static void emit_shf_mod_name(arm_shift_modifier_t mod) panic("can't emit this shf_mod_name %d", (int) mod); } -void arm_emit_shifter_operand(const ir_node *node) +static void arm_emit_shifter_operand(const ir_node *node) { - const arm_shifter_operand_t *attr = get_irn_generic_attr_const(node); + const arm_shifter_operand_t *attr = get_arm_shifter_operand_attr_const(node); switch (attr->shift_modifier) { case ARM_SHF_REG: @@ -296,7 +229,7 @@ void arm_emit_shifter_operand(const ir_node *node) typedef struct sym_or_tv_t { union { ir_entity *entity; /**< An entity. */ - tarval *tv; /**< A tarval. */ + ir_tarval *tv; /**< A tarval. */ const void *generic; /**< For generic compare. */ } u; unsigned label; /**< the associated label. */ @@ -317,6 +250,150 @@ static void emit_constant_name(const sym_or_tv_t *entry) be_emit_irprintf("%sC%u", be_gas_get_private_prefix(), entry->label); } +/** + * Returns the target block for a control flow node. + */ +static ir_node *get_cfop_target_block(const ir_node *irn) +{ + return (ir_node*)get_irn_link(irn); +} + +/** + * Emit the target label for a control flow node. + */ +static void arm_emit_cfop_target(const ir_node *irn) +{ + ir_node *block = get_cfop_target_block(irn); + + be_gas_emit_block_name(block); +} + +void arm_emitf(const ir_node *node, const char *format, ...) +{ + va_list ap; + va_start(ap, format); + be_emit_char('\t'); + for (;;) { + const char *start = format; + while (*format != '%' && *format != '\n' && *format != '\0') + ++format; + be_emit_string_len(start, format - start); + + if (*format == '\0') + break; + + if (*format == '\n') { + ++format; + be_emit_char('\n'); + be_emit_write_line(); + be_emit_char('\t'); + continue; + } + + ++format; + + switch (*format++) { + case '%': + be_emit_char('%'); + break; + + case 'S': { + if (*format < '0' || '9' <= *format) + goto unknown; + unsigned const pos = *format++ - '0'; + arm_emit_source_register(node, pos); + break; + } + + case 'D': { + if (*format < '0' || '9' <= *format) + goto unknown; + unsigned const pos = *format++ - '0'; + arm_emit_dest_register(node, pos); + break; + } + + case 'I': + arm_emit_symconst(node); + break; + + case 'o': + arm_emit_offset(node); + break; + + case 'O': + arm_emit_shifter_operand(node); + break; + + case 'C': { + const sym_or_tv_t *name = va_arg(ap, const sym_or_tv_t*); + emit_constant_name(name); + break; + } + + case 'm': { + ir_mode *mode = va_arg(ap, ir_mode*); + arm_emit_fpa_postfix(mode); + break; + } + + case 'M': + switch (*format++) { + case 'L': arm_emit_load_mode(node); break; + case 'S': arm_emit_store_mode(node); break; + case 'A': arm_emit_float_arithmetic_mode(node); break; + case 'F': arm_emit_float_load_store_mode(node); break; + default: + --format; + goto unknown; + } + break; + + case 'X': { + int num = va_arg(ap, int); + be_emit_irprintf("%X", num); + break; + } + + case 'u': { + unsigned num = va_arg(ap, unsigned); + be_emit_irprintf("%u", num); + break; + } + + case 'd': { + int num = va_arg(ap, int); + be_emit_irprintf("%d", num); + break; + } + + case 's': { + const char *string = va_arg(ap, const char *); + be_emit_string(string); + break; + } + + case 'r': { + arch_register_t *reg = va_arg(ap, arch_register_t*); + arm_emit_register(reg); + break; + } + + case 't': { + const ir_node *n = va_arg(ap, const ir_node*); + arm_emit_cfop_target(n); + break; + } + + default: +unknown: + panic("unknown format conversion"); + } + } + va_end(ap); + be_emit_finish_line_gas(node); +} + /** * Emit a SymConst. */ @@ -324,37 +401,24 @@ static void emit_arm_SymConst(const ir_node *irn) { const arm_SymConst_attr_t *attr = get_arm_SymConst_attr_const(irn); sym_or_tv_t key, *entry; - unsigned label; key.u.entity = attr->entity; key.is_entity = true; key.label = 0; - entry = (sym_or_tv_t *)set_insert(sym_or_tv, &key, sizeof(key), HASH_PTR(key.u.generic)); + entry = set_insert(sym_or_tv_t, sym_or_tv, &key, sizeof(key), hash_ptr(key.u.generic)); if (entry->label == 0) { /* allocate a label */ entry->label = get_unique_label(); } - label = entry->label; /* load the symbol indirect */ - be_emit_cstring("\tldr "); - arm_emit_dest_register(irn, 0); - be_emit_cstring(", "); - emit_constant_name(entry); - be_emit_finish_line_gas(irn); + arm_emitf(irn, "ldr %D0, %C", entry); } static void emit_arm_FrameAddr(const ir_node *irn) { - const arm_SymConst_attr_t *attr = get_irn_generic_attr_const(irn); - - be_emit_cstring("\tadd "); - arm_emit_dest_register(irn, 0); - be_emit_cstring(", "); - arm_emit_source_register(irn, 0); - be_emit_cstring(", "); - be_emit_irprintf("#0x%X", attr->fp_offset); - be_emit_finish_line_gas(irn); + const arm_SymConst_attr_t *attr = get_arm_SymConst_attr_const(irn); + arm_emitf(irn, "add %D0, %S0, #0x%X", attr->fp_offset); } /** @@ -362,30 +426,20 @@ static void emit_arm_FrameAddr(const ir_node *irn) */ static void emit_arm_fConst(const ir_node *irn) { - sym_or_tv_t key, *entry; - unsigned label; - ir_mode *mode; + sym_or_tv_t key; key.u.tv = get_fConst_value(irn); key.is_entity = false; key.label = 0; - entry = (sym_or_tv_t *)set_insert(sym_or_tv, &key, sizeof(key), HASH_PTR(key.u.generic)); + sym_or_tv_t *entry = set_insert(sym_or_tv_t, sym_or_tv, &key, sizeof(key), hash_ptr(key.u.generic)); if (entry->label == 0) { /* allocate a label */ entry->label = get_unique_label(); } - label = entry->label; /* load the tarval indirect */ - mode = get_irn_mode(irn); - be_emit_cstring("\tldf"); - arm_emit_fpa_postfix(mode); - be_emit_char(' '); - - arm_emit_dest_register(irn, 0); - be_emit_cstring(", "); - emit_constant_name(entry); - be_emit_finish_line_gas(irn); + ir_mode *mode = get_irn_mode(irn); + arm_emitf(irn, "ldf%m %D0, %C", mode, entry); } /** @@ -393,25 +447,7 @@ static void emit_arm_fConst(const ir_node *irn) */ static ir_node *sched_next_block(const ir_node *block) { - return get_irn_link(block); -} - -/** - * Returns the target block for a control flow node. - */ -static ir_node *get_cfop_target_block(const ir_node *irn) -{ - return get_irn_link(irn); -} - -/** - * Emit the target label for a control flow node. - */ -static void arm_emit_cfop_target(const ir_node *irn) -{ - ir_node *block = get_cfop_target_block(irn); - - be_gas_emit_block_name(block); + return (ir_node*)get_irn_link(block); } /** @@ -419,15 +455,14 @@ static void arm_emit_cfop_target(const ir_node *irn) */ static void emit_arm_B(const ir_node *irn) { - const ir_edge_t *edge; const ir_node *proj_true = NULL; const ir_node *proj_false = NULL; const ir_node *block; const ir_node *next_block; ir_node *op1 = get_irn_n(irn, 0); const char *suffix; - pn_Cmp pnc = get_arm_CondJmp_pnc(irn); - const arm_cmp_attr_t *cmp_attr = get_irn_generic_attr_const(op1); + ir_relation relation = get_arm_CondJmp_relation(irn); + const arm_cmp_attr_t *cmp_attr = get_arm_cmp_attr_const(op1); bool is_signed = !cmp_attr->is_unsigned; assert(is_arm_Cmp(op1) || is_arm_Tst(op1)); @@ -443,7 +478,7 @@ static void emit_arm_B(const ir_node *irn) } if (cmp_attr->ins_permuted) { - pnc = get_mirrored_pnc(pnc); + relation = get_inversed_relation(relation); } /* for now, the code works for scheduled and non-schedules blocks */ @@ -452,8 +487,8 @@ static void emit_arm_B(const ir_node *irn) /* we have a block schedule */ next_block = sched_next_block(block); - assert(pnc != pn_Cmp_False); - assert(pnc != pn_Cmp_True); + assert(relation != ir_relation_false); + assert(relation != ir_relation_true); if (get_cfop_target_block(proj_true) == next_block) { /* exchange both proj's so the second one can be omitted */ @@ -461,42 +496,37 @@ static void emit_arm_B(const ir_node *irn) proj_true = proj_false; proj_false = t; - pnc = get_negated_pnc(pnc, mode_Iu); + relation = get_negated_relation(relation); } - switch (pnc) { - case pn_Cmp_Eq: suffix = "eq"; break; - case pn_Cmp_Lt: suffix = is_signed ? "lt" : "lo"; break; - case pn_Cmp_Le: suffix = is_signed ? "le" : "ls"; break; - case pn_Cmp_Gt: suffix = is_signed ? "gt" : "hi"; break; - case pn_Cmp_Ge: suffix = is_signed ? "ge" : "hs"; break; - case pn_Cmp_Lg: suffix = "ne"; break; - case pn_Cmp_Leg: suffix = "al"; break; - default: panic("Cmp has unsupported pnc"); + switch (relation & (ir_relation_less_equal_greater)) { + case ir_relation_equal: suffix = "eq"; break; + case ir_relation_less: suffix = is_signed ? "lt" : "lo"; break; + case ir_relation_less_equal: suffix = is_signed ? "le" : "ls"; break; + case ir_relation_greater: suffix = is_signed ? "gt" : "hi"; break; + case ir_relation_greater_equal: suffix = is_signed ? "ge" : "hs"; break; + case ir_relation_less_greater: suffix = "ne"; break; + case ir_relation_less_equal_greater: suffix = "al"; break; + default: panic("Cmp has unsupported relation"); } /* emit the true proj */ - be_emit_irprintf("\tb%s ", suffix); - arm_emit_cfop_target(proj_true); - be_emit_finish_line_gas(proj_true); + arm_emitf(irn, "b%s %t", suffix, proj_true); if (get_cfop_target_block(proj_false) == next_block) { - be_emit_cstring("\t/* fallthrough to "); - arm_emit_cfop_target(proj_false); - be_emit_cstring(" */"); - be_emit_finish_line_gas(proj_false); + if (be_options.verbose_asm) { + arm_emitf(irn, "/* fallthrough to %t */", proj_false); + } } else { - be_emit_cstring("\tb "); - arm_emit_cfop_target(proj_false); - be_emit_finish_line_gas(proj_false); + arm_emitf(irn, "b %t", proj_false); } } /** Sort register in ascending order. */ static int reg_cmp(const void *a, const void *b) { - const arch_register_t * const *ra = a; - const arch_register_t * const *rb = b; + const arch_register_t * const *ra = (const arch_register_t**)a; + const arch_register_t * const *rb = (const arch_register_t**)b; return *ra < *rb ? -1 : (*ra != *rb); } @@ -506,44 +536,23 @@ static int reg_cmp(const void *a, const void *b) */ static void emit_arm_CopyB(const ir_node *irn) { - const arm_CopyB_attr_t *attr = get_irn_generic_attr_const(irn); + const arm_CopyB_attr_t *attr = get_arm_CopyB_attr_const(irn); unsigned size = attr->size; - - const char *tgt = arch_register_get_name(get_in_reg(irn, 0)); - const char *src = arch_register_get_name(get_in_reg(irn, 1)); - const char *t0, *t1, *t2, *t3; - const arch_register_t *tmpregs[4]; /* collect the temporary registers and sort them, we need ascending order */ - tmpregs[0] = get_in_reg(irn, 2); - tmpregs[1] = get_in_reg(irn, 3); - tmpregs[2] = get_in_reg(irn, 4); + tmpregs[0] = arch_get_irn_register_in(irn, 2); + tmpregs[1] = arch_get_irn_register_in(irn, 3); + tmpregs[2] = arch_get_irn_register_in(irn, 4); tmpregs[3] = &arm_registers[REG_R12]; /* Note: R12 is always the last register because the RA did not assign higher ones */ qsort((void *)tmpregs, 3, sizeof(tmpregs[0]), reg_cmp); - /* need ascending order */ - t0 = arch_register_get_name(tmpregs[0]); - t1 = arch_register_get_name(tmpregs[1]); - t2 = arch_register_get_name(tmpregs[2]); - t3 = arch_register_get_name(tmpregs[3]); - - be_emit_cstring("/* MemCopy ("); - be_emit_string(src); - be_emit_cstring(")->("); - arm_emit_source_register(irn, 0); - be_emit_irprintf(" [%u bytes], Uses ", size); - be_emit_string(t0); - be_emit_cstring(", "); - be_emit_string(t1); - be_emit_cstring(", "); - be_emit_string(t2); - be_emit_cstring(", and "); - be_emit_string(t3); - be_emit_cstring("*/"); - be_emit_finish_line_gas(NULL); + if (be_options.verbose_asm) { + arm_emitf(irn, "/* MemCopy (%S1)->(%S0) [%u bytes], Uses %r, %r, %r and %r */", + size, tmpregs[0], tmpregs[1], tmpregs[2], tmpregs[3]); + } assert(size > 0 && "CopyB needs size > 0" ); @@ -557,170 +566,32 @@ static void emit_arm_CopyB(const ir_node *irn) case 0: break; case 1: - be_emit_cstring("\tldr "); - be_emit_string(t3); - be_emit_cstring(", ["); - be_emit_string(src); - be_emit_cstring(", #0]"); - be_emit_finish_line_gas(NULL); - - be_emit_cstring("\tstr "); - be_emit_string(t3); - be_emit_cstring(", ["); - be_emit_string(tgt); - be_emit_cstring(", #0]"); - be_emit_finish_line_gas(irn); + arm_emitf(irn, "ldr %r, [%S1, #0]", tmpregs[3]); + arm_emitf(irn, "str %r, [%S0, #0]", tmpregs[3]); break; case 2: - be_emit_cstring("\tldmia "); - be_emit_string(src); - be_emit_cstring("!, {"); - be_emit_string(t0); - be_emit_cstring(", "); - be_emit_string(t1); - be_emit_char('}'); - be_emit_finish_line_gas(NULL); - - be_emit_cstring("\tstmia "); - be_emit_string(tgt); - be_emit_cstring("!, {"); - be_emit_string(t0); - be_emit_cstring(", "); - be_emit_string(t1); - be_emit_char('}'); - be_emit_finish_line_gas(irn); + arm_emitf(irn, "ldmia %S1!, {%r, %r}", tmpregs[0], tmpregs[1]); + arm_emitf(irn, "stmia %S0!, {%r, %r}", tmpregs[0], tmpregs[1]); break; case 3: - be_emit_cstring("\tldmia "); - be_emit_string(src); - be_emit_cstring("!, {"); - be_emit_string(t0); - be_emit_cstring(", "); - be_emit_string(t1); - be_emit_cstring(", "); - be_emit_string(t2); - be_emit_char('}'); - be_emit_finish_line_gas(NULL); - - be_emit_cstring("\tstmia "); - be_emit_string(tgt); - be_emit_cstring("!, {"); - be_emit_string(t0); - be_emit_cstring(", "); - be_emit_string(t1); - be_emit_cstring(", "); - be_emit_string(t2); - be_emit_char('}'); - be_emit_finish_line_gas(irn); + arm_emitf(irn, "ldmia %S1!, {%r, %r, %r}", tmpregs[0], tmpregs[1], tmpregs[2]); + arm_emitf(irn, "stmia %S0!, {%r, %r, %r}", tmpregs[0], tmpregs[1], tmpregs[2]); break; } size >>= 2; while (size) { - be_emit_cstring("\tldmia "); - be_emit_string(src); - be_emit_cstring("!, {"); - be_emit_string(t0); - be_emit_cstring(", "); - be_emit_string(t1); - be_emit_cstring(", "); - be_emit_string(t2); - be_emit_cstring(", "); - be_emit_string(t3); - be_emit_char('}'); - be_emit_finish_line_gas(NULL); - - be_emit_cstring("\tstmia "); - be_emit_string(tgt); - be_emit_cstring("!, {"); - be_emit_string(t0); - be_emit_cstring(", "); - be_emit_string(t1); - be_emit_cstring(", "); - be_emit_string(t2); - be_emit_cstring(", "); - be_emit_string(t3); - be_emit_char('}'); - be_emit_finish_line_gas(irn); + arm_emitf(irn, "ldmia %S1!, {%r, %r, %r}", tmpregs[0], tmpregs[1], tmpregs[2], tmpregs[3]); + arm_emitf(irn, "stmia %S0!, {%r, %r, %r}", tmpregs[0], tmpregs[1], tmpregs[2], tmpregs[3]); --size; } } static void emit_arm_SwitchJmp(const ir_node *irn) { - const ir_edge_t *edge; - ir_node *proj; - int i; - ir_node **projs; - int n_projs; - int block_nr; - ir_node *default_proj = NULL; + const arm_SwitchJmp_attr_t *attr = get_arm_SwitchJmp_attr_const(irn); + arm_emitf(irn, "ldrls pc, [pc, %S0, asl #2]"); - block_nr = get_irn_node_nr(irn); - n_projs = get_arm_SwitchJmp_n_projs(irn); - - projs = XMALLOCNZ(ir_node*, n_projs); - - foreach_out_edge(irn, edge) { - proj = get_edge_src_irn(edge); - assert(is_Proj(proj) && "Only proj allowed at SwitchJmp"); - - if (get_Proj_proj(proj) == get_arm_SwitchJmp_default_proj_num(irn)) - default_proj = proj; - - projs[get_Proj_proj(proj)] = proj; - } - assert(default_proj != NULL && "SwitchJmp should have a Default Proj"); - - /* - CMP %1S, n_projs - 1 - BHI default - */ - - be_emit_cstring("\tcmp "); - arm_emit_source_register(irn, 0); - be_emit_irprintf(", #%u", n_projs - 1); - be_emit_finish_line_gas(irn); - - be_emit_cstring("\tbhi "); - arm_emit_cfop_target(default_proj); - be_emit_finish_line_gas(default_proj); - - /* - LDR %r12, .TABLE_X_START - ADD %r12, %r12, [%1S, LSL #2] - LDR %r15, %r12 - */ - - be_emit_irprintf("\tldr %%r12, TABLE_%d_START", block_nr); - be_emit_finish_line_gas(NULL); - - be_emit_irprintf("\tadd %%r12, %%r12, "); - arm_emit_source_register(irn, 0); - be_emit_cstring(", LSL #2"); - be_emit_finish_line_gas(NULL); - - be_emit_cstring("\tldr %r15, [%r12, #0]"); - be_emit_finish_line_gas(NULL); - - be_emit_irprintf("TABLE_%d_START:\n\t.word\tTABLE_%d", block_nr, block_nr); - be_emit_finish_line_gas(NULL); - be_emit_irprintf("\t.align 2"); - be_emit_finish_line_gas(NULL); - be_emit_irprintf("TABLE_%d:", block_nr); - be_emit_finish_line_gas(NULL); - - for (i = 0; i < n_projs; ++i) { - proj = projs[i]; - if (proj == NULL) { - proj = projs[get_arm_SwitchJmp_default_proj_num(irn)]; - } - be_emit_cstring("\t.word\t"); - arm_emit_cfop_target(proj); - be_emit_finish_line_gas(proj); - } - be_emit_irprintf("\t.align 2\n"); - be_emit_finish_line_gas(NULL); - xfree(projs); + be_emit_jump_table(irn, attr->table, NULL, get_cfop_target_block); } /** Emit an IncSP node */ @@ -728,80 +599,45 @@ static void emit_be_IncSP(const ir_node *irn) { int offs = -be_get_IncSP_offset(irn); - if (offs != 0) { - if (offs < 0) { - be_emit_cstring("\tsub "); - offs = -offs; - } else { - be_emit_cstring("\tadd "); - } - arm_emit_dest_register(irn, 0); - be_emit_cstring(", "); - arm_emit_source_register(irn, 0); - be_emit_irprintf(", #0x%X", offs); - } else { - /* omitted IncSP(0) */ + if (offs == 0) return; + + const char *op = "add"; + if (offs < 0) { + op = "sub"; + offs = -offs; } - be_emit_finish_line_gas(irn); + arm_emitf(irn, "%s %D0, %S0, #0x%X", op, offs); } static void emit_be_Copy(const ir_node *irn) { ir_mode *mode = get_irn_mode(irn); - if (get_in_reg(irn, 0) == get_out_reg(irn, 0)) { + if (arch_get_irn_register_in(irn, 0) == arch_get_irn_register_out(irn, 0)) { /* omitted Copy */ return; } if (mode_is_float(mode)) { if (USE_FPA(isa)) { - be_emit_cstring("\tmvf"); - be_emit_char(' '); - arm_emit_dest_register(irn, 0); - be_emit_cstring(", "); - arm_emit_source_register(irn, 0); - be_emit_finish_line_gas(irn); + arm_emitf(irn, "mvf %D0, %S0"); } else { - panic("emit_be_Copy: move not supported for this mode"); + panic("move not supported for this mode"); } } else if (mode_is_data(mode)) { - be_emit_cstring("\tmov "); - arm_emit_dest_register(irn, 0); - be_emit_cstring(", "); - arm_emit_source_register(irn, 0); - be_emit_finish_line_gas(irn); + arm_emitf(irn, "mov %D0, %S0"); } else { - panic("emit_be_Copy: move not supported for this mode"); + panic("move not supported for this mode"); } } static void emit_be_Perm(const ir_node *irn) { - be_emit_cstring("\teor "); - arm_emit_source_register(irn, 0); - be_emit_cstring(", "); - arm_emit_source_register(irn, 0); - be_emit_cstring(", "); - arm_emit_source_register(irn, 1); - be_emit_finish_line_gas(NULL); - - be_emit_cstring("\teor "); - arm_emit_source_register(irn, 1); - be_emit_cstring(", "); - arm_emit_source_register(irn, 0); - be_emit_cstring(", "); - arm_emit_source_register(irn, 1); - be_emit_finish_line_gas(NULL); - - be_emit_cstring("\teor "); - arm_emit_source_register(irn, 0); - be_emit_cstring(", "); - arm_emit_source_register(irn, 0); - be_emit_cstring(", "); - arm_emit_source_register(irn, 1); - be_emit_finish_line_gas(irn); + arm_emitf(irn, + "eor %S0, %S0, %S1\n" + "eor %S1, %S0, %S1\n" + "eor %S0, %S0, %S1"); } static void emit_be_MemPerm(const ir_node *node) @@ -818,39 +654,50 @@ static void emit_be_MemPerm(const ir_node *node) panic("memperm with more than 12 inputs not supported yet"); for (i = 0; i < memperm_arity; ++i) { - int offset; - ir_entity *entity = be_get_MemPerm_in_entity(node, i); - /* spill register */ - be_emit_irprintf("\tstr r%d, [sp, #-4]!", i); - be_emit_finish_line_gas(node); + arm_emitf(node, "str r%d, [sp, #-4]!", i); sp_change += 4; /* load from entity */ - offset = get_entity_offset(entity) + sp_change; - be_emit_irprintf("\tldr r%d, [sp, #%d]", i, offset); - be_emit_finish_line_gas(node); + ir_entity *entity = be_get_MemPerm_in_entity(node, i); + int offset = get_entity_offset(entity) + sp_change; + arm_emitf(node, "ldr r%d, [sp, #%d]", i, offset); } for (i = memperm_arity-1; i >= 0; --i) { - int offset; - ir_entity *entity = be_get_MemPerm_out_entity(node, i); - /* store to new entity */ - offset = get_entity_offset(entity) + sp_change; - be_emit_irprintf("\tstr r%d, [sp, #%d]", i, offset); - be_emit_finish_line_gas(node); + ir_entity *entity = be_get_MemPerm_out_entity(node, i); + int offset = get_entity_offset(entity) + sp_change; + arm_emitf(node, "str r%d, [sp, #%d]", i, offset); /* restore register */ - be_emit_irprintf("\tldr r%d, [sp], #4", i); + arm_emitf(node, "ldr r%d, [sp], #4", i); sp_change -= 4; - be_emit_finish_line_gas(node); } assert(sp_change == 0); } +static void emit_be_Start(const ir_node *node) +{ + ir_graph *irg = get_irn_irg(node); + ir_type *frame_type = get_irg_frame_type(irg); + unsigned size = get_type_size_bytes(frame_type); + + /* allocate stackframe */ + if (size > 0) { + arm_emitf(node, "sub sp, sp, #0x%X", size); + } +} + static void emit_be_Return(const ir_node *node) { - be_emit_cstring("\tmov pc, lr"); - be_emit_finish_line_gas(node); + ir_graph *irg = get_irn_irg(node); + ir_type *frame_type = get_irg_frame_type(irg); + unsigned size = get_type_size_bytes(frame_type); + + /* deallocate stackframe */ + if (size > 0) { + arm_emitf(node, "add sp, sp, #0x%X", size); + } + arm_emitf(node, "mov pc, lr"); } @@ -864,32 +711,12 @@ static void emit_arm_Jmp(const ir_node *node) /* we have a block schedule */ next_block = sched_next_block(block); if (get_cfop_target_block(node) != next_block) { - be_emit_cstring("\tb "); - arm_emit_cfop_target(node); + arm_emitf(node, "b %t", node); } else { - be_emit_cstring("\t/* fallthrough to "); - arm_emit_cfop_target(node); - be_emit_cstring(" */"); + if (be_options.verbose_asm) { + arm_emitf(node, "/* fallthrough to %t */", node); + } } - be_emit_finish_line_gas(node); -} - -static void emit_nothing(const ir_node *irn) -{ - (void) irn; -} - -/** - * The type of a emitter function. - */ -typedef void (emit_func)(const ir_node *irn); - -/** - * Set a node emitter. Make it a bit more type safe. - */ -static inline void set_emitter(ir_op *op, emit_func arm_emit_node) -{ - op->ops.generic = (op_func)arm_emit_node; } /** @@ -899,48 +726,30 @@ static inline void set_emitter(ir_op *op, emit_func arm_emit_node) static void arm_register_emitters(void) { /* first clear the generic function pointer for all ops */ - clear_irp_opcodes_generic_func(); + ir_clear_opcodes_generic_func(); /* register all emitter functions defined in spec */ arm_register_spec_emitters(); /* custom emitter */ - set_emitter(op_arm_B, emit_arm_B); - set_emitter(op_arm_CopyB, emit_arm_CopyB); - set_emitter(op_arm_fConst, emit_arm_fConst); - set_emitter(op_arm_FrameAddr, emit_arm_FrameAddr); - set_emitter(op_arm_Jmp, emit_arm_Jmp); - set_emitter(op_arm_SwitchJmp, emit_arm_SwitchJmp); - set_emitter(op_arm_SymConst, emit_arm_SymConst); - set_emitter(op_be_Copy, emit_be_Copy); - set_emitter(op_be_CopyKeep, emit_be_Copy); - set_emitter(op_be_IncSP, emit_be_IncSP); - set_emitter(op_be_MemPerm, emit_be_MemPerm); - set_emitter(op_be_Perm, emit_be_Perm); - set_emitter(op_be_Return, emit_be_Return); + be_set_emitter(op_arm_B, emit_arm_B); + be_set_emitter(op_arm_CopyB, emit_arm_CopyB); + be_set_emitter(op_arm_FrameAddr, emit_arm_FrameAddr); + be_set_emitter(op_arm_Jmp, emit_arm_Jmp); + be_set_emitter(op_arm_SwitchJmp, emit_arm_SwitchJmp); + be_set_emitter(op_arm_SymConst, emit_arm_SymConst); + be_set_emitter(op_arm_fConst, emit_arm_fConst); + be_set_emitter(op_be_Copy, emit_be_Copy); + be_set_emitter(op_be_CopyKeep, emit_be_Copy); + be_set_emitter(op_be_IncSP, emit_be_IncSP); + be_set_emitter(op_be_MemPerm, emit_be_MemPerm); + be_set_emitter(op_be_Perm, emit_be_Perm); + be_set_emitter(op_be_Return, emit_be_Return); + be_set_emitter(op_be_Start, emit_be_Start); /* no need to emit anything for the following nodes */ - set_emitter(op_Phi, emit_nothing); - set_emitter(op_be_Keep, emit_nothing); - set_emitter(op_be_Start, emit_nothing); - set_emitter(op_be_Barrier, emit_nothing); -} - -/** - * Emits code for a node. - */ -static void arm_emit_node(const ir_node *irn) -{ - ir_op *op = get_irn_op(irn); - - if (op->ops.generic) { - emit_func *emit = (emit_func *)op->ops.generic; - be_dbg_set_dbg_info(get_irn_dbg_info(irn)); - (*emit)(irn); - } else { - panic("Error: No emit handler for node %+F (graph %+F)\n", - irn, current_ir_graph); - } + be_set_emitter(op_Phi, be_emit_nothing); + be_set_emitter(op_be_Keep, be_emit_nothing); } /** @@ -948,13 +757,9 @@ static void arm_emit_node(const ir_node *irn) */ static void arm_emit_block_header(ir_node *block, ir_node *prev) { - int n_cfgpreds; - int need_label; - int i, arity; - ir_graph *irg = get_irn_irg(block); - ir_exec_freq *exec_freq = be_get_irg_exec_freq(irg); + bool need_label = false; + int n_cfgpreds; - need_label = 0; n_cfgpreds = get_Block_n_cfgpreds(block); if (n_cfgpreds == 1) { ir_node *pred = get_Block_cfgpred(block, 0); @@ -962,40 +767,14 @@ static void arm_emit_block_header(ir_node *block, ir_node *prev) /* we don't need labels for fallthrough blocks, however switch-jmps * are no fallthroughs */ - if (pred_block == prev && - !(is_Proj(pred) && is_arm_SwitchJmp(get_Proj_pred(pred)))) { - need_label = 0; - } else { - need_label = 1; - } + need_label = + pred_block != prev || + (is_Proj(pred) && is_arm_SwitchJmp(get_Proj_pred(pred))); } else { - need_label = 1; + need_label = true; } - if (need_label) { - be_gas_emit_block_name(block); - be_emit_char(':'); - - be_emit_pad_comment(); - be_emit_cstring(" /* preds:"); - - /* emit list of pred blocks in comment */ - arity = get_irn_arity(block); - for (i = 0; i < arity; ++i) { - ir_node *predblock = get_Block_cfgpred_block(block, i); - be_emit_irprintf(" %d", get_irn_node_nr(predblock)); - } - } else { - be_emit_cstring("\t/* "); - be_gas_emit_block_name(block); - be_emit_cstring(": "); - } - if (exec_freq != NULL) { - be_emit_irprintf(" freq: %f", - get_block_execfreq(exec_freq, block)); - } - be_emit_cstring(" */\n"); - be_emit_write_line(); + be_gas_begin_block(block, need_label); } /** @@ -1004,12 +783,10 @@ static void arm_emit_block_header(ir_node *block, ir_node *prev) */ static void arm_gen_block(ir_node *block, ir_node *prev_block) { - ir_node *irn; - arm_emit_block_header(block, prev_block); - be_dbg_set_dbg_info(get_irn_dbg_info(block)); + be_dwarf_location(get_irn_dbg_info(block)); sched_foreach(block, irn) { - arm_emit_node(irn); + be_emit_node(irn); } } @@ -1034,8 +811,8 @@ static void arm_gen_labels(ir_node *block, void *env) */ static int cmp_sym_or_tv(const void *elt, const void *key, size_t size) { - const sym_or_tv_t *p1 = elt; - const sym_or_tv_t *p2 = key; + const sym_or_tv_t *p1 = (const sym_or_tv_t*)elt; + const sym_or_tv_t *p2 = (const sym_or_tv_t*)key; (void) size; /* as an identifier NEVER can point to a tarval, it's enough @@ -1049,7 +826,7 @@ void arm_gen_routine(ir_graph *irg) ir_entity *entity = get_irg_entity(irg); const arch_env_t *arch_env = be_get_irg_arch_env(irg); ir_node **blk_sched; - int i, n; + size_t i, n; isa = (arm_isa_t*) arch_env; sym_or_tv = new_set(cmp_sym_or_tv, 8); @@ -1058,12 +835,10 @@ void arm_gen_routine(ir_graph *irg) arm_register_emitters(); - be_dbg_method_begin(entity); - /* create the block schedule */ blk_sched = be_create_block_schedule(irg); - be_gas_emit_function_prolog(entity, 4); + be_gas_emit_function_prolog(entity, 4, NULL); irg_block_walk_graph(irg, arm_gen_labels, NULL, NULL); @@ -1083,11 +858,9 @@ void arm_gen_routine(ir_graph *irg) /* emit SymConst values */ if (set_count(sym_or_tv) > 0) { - sym_or_tv_t *entry; - be_emit_cstring("\t.align 2\n"); - foreach_set(sym_or_tv, entry) { + foreach_set(sym_or_tv, sym_or_tv_t, entry) { emit_constant_name(entry); be_emit_cstring(":\n"); be_emit_write_line(); @@ -1098,17 +871,18 @@ void arm_gen_routine(ir_graph *irg) be_emit_char('\n'); be_emit_write_line(); } else { - tarval *tv = entry->u.tv; - int i, size = get_mode_size_bytes(get_tarval_mode(tv)); - unsigned v; + ir_tarval *tv = entry->u.tv; + int vi; + int size = get_mode_size_bytes(get_tarval_mode(tv)); /* beware: ARM fpa uses big endian format */ - for (i = ((size + 3) & ~3) - 4; i >= 0; i -= 4) { + for (vi = ((size + 3) & ~3) - 4; vi >= 0; vi -= 4) { /* get 32 bits */ - v = get_tarval_sub_bits(tv, i+3); - v = (v << 8) | get_tarval_sub_bits(tv, i+2); - v = (v << 8) | get_tarval_sub_bits(tv, i+1); - v = (v << 8) | get_tarval_sub_bits(tv, i+0); + unsigned v; + v = get_tarval_sub_bits(tv, vi+3); + v = (v << 8) | get_tarval_sub_bits(tv, vi+2); + v = (v << 8) | get_tarval_sub_bits(tv, vi+1); + v = (v << 8) | get_tarval_sub_bits(tv, vi+0); be_emit_irprintf("\t.word\t%u\n", v); be_emit_write_line(); } @@ -1120,7 +894,6 @@ void arm_gen_routine(ir_graph *irg) del_set(sym_or_tv); be_gas_emit_function_epilog(entity); - be_dbg_method_end(); } void arm_init_emitter(void)