X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Famd64%2Famd64_spec.pl;h=9a11e7bc2fbfc2eb7b6e440767999412cdfbb9bf;hb=49bec3440763fcbac6bee60638cc8d699b12af11;hp=18099591be944bbc137533f95daadb7520c7555e;hpb=3cda66b832f2864ac65f6fe2637920d7967e723d;p=libfirm diff --git a/ir/be/amd64/amd64_spec.pl b/ir/be/amd64/amd64_spec.pl index 18099591b..9a11e7bc2 100644 --- a/ir/be/amd64/amd64_spec.pl +++ b/ir/be/amd64/amd64_spec.pl @@ -1,6 +1,3 @@ -# Creation: 2006/02/13 -# $Id: amd64_spec.pl 26673 2009-10-01 16:43:13Z matze $ - # the cpu architecture (ia32, ia64, mips, sparc, ppc, ...) $arch = "amd64"; @@ -54,53 +51,54 @@ $arch = "amd64"; # comment: OPTIONAL comment for the node constructor # # register types: -# 0 - no special type -# 1 - caller save (register must be saved by the caller of a function) -# 2 - callee save (register must be saved by the called function) -# 4 - ignore (do not assign this register) +$normal = 0; # no special type +$ignore = 1; # ignore (do not assign this register) +$arbitrary = 2; # emitter can choose an arbitrary register of this class +$virtual = 4; # the register is a virtual one +$state = 8; # register represents a state # NOTE: Last entry of each class is the largest Firm-Mode a register can hold %reg_classes = ( gp => [ - { name => "rax", type => 1 }, - { name => "rcx", type => 1 }, - { name => "rdx", type => 1 }, - { name => "rsi", type => 1 }, - { name => "rdi", type => 1 }, - { name => "rbx", type => 2 }, - { name => "rbp", type => 2 }, - { name => "rsp", type => 4 }, # stackpointer? - { name => "r8", type => 1 }, - { name => "r9", type => 1 }, - { name => "r10", type => 1 }, - { name => "r11", type => 1 }, - { name => "r12", type => 2 }, - { name => "r13", type => 2 }, - { name => "r14", type => 2 }, - { name => "r15", type => 2 }, -# { name => "gp_NOREG", type => 4 }, # we need a dummy register for NoReg nodes + { name => "rax", dwarf => 0 }, + { name => "rcx", dwarf => 2 }, + { name => "rdx", dwarf => 1 }, + { name => "rsi", dwarf => 4 }, + { name => "rdi", dwarf => 5 }, + { name => "rbx", dwarf => 3 }, + { name => "rbp", dwarf => 6 }, + { name => "rsp", dwarf => 7, type => $ignore }, # stackpointer? + { name => "r8", dwarf => 8 }, + { name => "r9", dwarf => 9 }, + { name => "r10", dwarf => 10 }, + { name => "r11", dwarf => 11 }, + { name => "r12", dwarf => 12 }, + { name => "r13", dwarf => 13 }, + { name => "r14", dwarf => 14 }, + { name => "r15", dwarf => 15 }, +# { name => "gp_NOREG", type => $ignore }, # we need a dummy register for NoReg nodes { mode => "mode_Lu" } ], # fp => [ -# { name => "xmm0", type => 1 }, -# { name => "xmm1", type => 1 }, -# { name => "xmm2", type => 1 }, -# { name => "xmm3", type => 1 }, -# { name => "xmm4", type => 1 }, -# { name => "xmm5", type => 1 }, -# { name => "xmm6", type => 1 }, -# { name => "xmm7", type => 1 }, -# { name => "xmm8", type => 1 }, -# { name => "xmm9", type => 1 }, -# { name => "xmm10", type => 1 }, -# { name => "xmm11", type => 1 }, -# { name => "xmm12", type => 1 }, -# { name => "xmm13", type => 1 }, -# { name => "xmm14", type => 1 }, -# { name => "xmm15", type => 1 }, +# { name => "xmm0", dwarf => 17 }, +# { name => "xmm1", dwarf => 18 }, +# { name => "xmm2", dwarf => 19 }, +# { name => "xmm3", dwarf => 20 }, +# { name => "xmm4", dwarf => 21 }, +# { name => "xmm5", dwarf => 22 }, +# { name => "xmm6", dwarf => 23 }, +# { name => "xmm7", dwarf => 24 }, +# { name => "xmm8", dwarf => 25 }, +# { name => "xmm9", dwarf => 26 }, +# { name => "xmm10", dwarf => 27 }, +# { name => "xmm11", dwarf => 28 }, +# { name => "xmm12", dwarf => 29 }, +# { name => "xmm13", dwarf => 30 }, +# { name => "xmm14", dwarf => 31 }, +# { name => "xmm15", dwarf => 32 }, # { mode => "mode_D" } # ] flags => [ - { name => "eflags", type => 0 }, + { name => "eflags", dwarf => 49 }, { mode => "mode_Iu", flags => "manual_ra" } ], ); @@ -115,7 +113,7 @@ sub amd64_custom_init_attr { my $res = ""; if(defined($node->{modified_flags})) { - $res .= "\tarch_irn_add_flags(res, arch_irn_flags_modify_flags);\n"; + $res .= "\tarch_add_irn_flags(res, arch_irn_flags_modify_flags);\n"; } return $res; } @@ -123,31 +121,14 @@ $custom_init_attr_func = \&amd64_custom_init_attr; $default_copy_attr = "amd64_copy_attr"; -%emit_templates = ( - S1 => "${arch}_emit_source_register(node, 0);", - S2 => "${arch}_emit_source_register(node, 1);", - S3 => "${arch}_emit_source_register(node, 2);", - S4 => "${arch}_emit_source_register(node, 3);", - S5 => "${arch}_emit_source_register(node, 4);", - S6 => "${arch}_emit_source_register(node, 5);", - D1 => "${arch}_emit_dest_register(node, 0);", - D2 => "${arch}_emit_dest_register(node, 1);", - D3 => "${arch}_emit_dest_register(node, 2);", - D4 => "${arch}_emit_dest_register(node, 3);", - D5 => "${arch}_emit_dest_register(node, 4);", - D6 => "${arch}_emit_dest_register(node, 5);", - C => "${arch}_emit_immediate(node);", - O => "${arch}_emit_fp_offset(node);", -); - %init_attr = ( amd64_attr_t => - "\tinit_amd64_attributes(res, flags, in_reqs, exec_units, n_res);", + "\tinit_amd64_attributes(res, irn_flags_, in_reqs, n_res);", amd64_SymConst_attr_t => - "\tinit_amd64_attributes(res, flags, in_reqs, exec_units, n_res);" + "\tinit_amd64_attributes(res, irn_flags_, in_reqs, n_res);" . "\tinit_amd64_SymConst_attributes(res, entity);", amd64_condcode_attr_t => - "\tinit_amd64_attributes(res, flags, in_reqs, exec_units, n_res);" + "\tinit_amd64_attributes(res, irn_flags_, in_reqs, n_res);" . "\tinit_amd64_condcode_attributes(res, pnc);", ); @@ -162,23 +143,25 @@ Push => { state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "gp", "rsp" ], out => [ "rsp:I|S", "none" ] }, ins => [ "base", "index", "mem", "val", "stack" ], - emit => '. push %S1', + emit => 'push %S0', outs => [ "stack", "M" ], am => "source,unary", latency => 2, # units => [ "GP" ], }, + Add => { op_flags => [ "commutative" ], irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] }, - in => [ "left", "right" ], + ins => [ "left", "right" ], outs => [ "res" ], mode => $mode_gp, modified_flags => 1, }, + Mul => { # we should not rematrialize this node. It produces 2 results and has # very strict constraints @@ -186,40 +169,44 @@ Mul => { reg_req => { in => [ "rax", "gp" ], out => [ "rax rdx" ] }, ins => [ "left", "right" ], - emit => '. mul %S2', + emit => 'mul %S1', outs => [ "res" ], mode => $mode_gp, am => "source,binary", modified_flags => $status_flags }, + Sub => { irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] }, - in => [ "left", "right" ], + ins => [ "left", "right" ], outs => [ "res" ], mode => $mode_gp, modified_flags => 1, }, + Neg => { irn_flags => [ "rematerializable" ], reg_req => { in => [ "gp" ], out => [ "in_r1", "flags" ] }, - emit => '. neg %S1', + emit => 'neg %S0', ins => [ "val" ], outs => [ "res", "flags" ], mode => $mode_gp, modified_flags => $status_flags }, + Immediate => { op_flags => [ "constlike" ], attr => "unsigned imm_value", init_attr => "attr->ext.imm_value = imm_value;", reg_req => { out => [ "gp" ] }, - emit => '. mov %C, %D1', + emit => 'mov %C, %D0', mode => $mode_gp, }, + SymConst => { op_flags => [ "constlike" ], irn_flags => [ "rematerializable" ], @@ -229,6 +216,7 @@ SymConst => { outs => [ "res" ], mode => $mode_gp, }, + Conv => { state => "exc_pinned", attr => "ir_mode *smaller_mode", @@ -238,12 +226,14 @@ Conv => { outs => [ "res" ], mode => $mode_gp, }, + Jmp => { state => "pinned", op_flags => [ "cfopcode" ], reg_req => { out => [ "none" ] }, mode => "mode_X", }, + Cmp => { irn_flags => [ "rematerializable" ], state => "exc_pinned", @@ -251,25 +241,27 @@ Cmp => { out => [ "flags" ] }, ins => [ "left", "right" ], outs => [ "eflags" ], - emit => '. cmp %S1, %S2', + emit => 'cmp %S0, %S1', attr => "int ins_permuted, int cmp_unsigned", init_attr => "attr->data.ins_permuted = ins_permuted;\n". "\tattr->data.cmp_unsigned = cmp_unsigned;\n", mode => $mode_flags, modified_flags => 1, }, + Jcc => { state => "pinned", - op_flags => [ "labeled", "cfopcode", "forking" ], + op_flags => [ "cfopcode", "forking" ], reg_req => { in => [ "eflags" ], out => [ "none", "none" ] }, ins => [ "eflags" ], outs => [ "false", "true" ], - attr => "pn_Cmp pnc", - init_attr => "attr->ext.pnc = pnc;", + attr => "ir_relation relation", + init_attr => "attr->ext.relation = relation;", mode => "mode_T", }, + Load => { - op_flags => [ "labeled", "fragile" ], + op_flags => [ "uses_memory" ], state => "exc_pinned", reg_req => { in => [ "gp", "none" ], out => [ "gp", "none" ] }, @@ -277,8 +269,9 @@ Load => { outs => [ "res", "M" ], attr => "ir_entity *entity", attr_type => "amd64_SymConst_attr_t", - emit => ". mov %O(%S1), %D1" + emit => "mov %O(%S0), %D0" }, + FrameAddr => { op_flags => [ "constlike" ], irn_flags => [ "rematerializable" ], @@ -288,8 +281,9 @@ FrameAddr => { attr_type => "amd64_SymConst_attr_t", mode => $mode_gp, }, + Store => { - op_flags => [ "labeled", "fragile" ], + op_flags => [ "uses_memory" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] }, ins => [ "ptr", "val", "mem" ], @@ -297,12 +291,12 @@ Store => { attr => "ir_entity *entity", attr_type => "amd64_SymConst_attr_t", mode => "mode_M", - emit => ". mov %S2, %O(%S1)" + emit => "mov %S1, %O(%S0)" }, #NoReg_GP => { # state => "pinned", -# op_flags => [ "constlike", "dump_noblcok", "dump_noinput" ], +# op_flags => [ "constlike", "dump_noblcok" ], # reg_req => { out => [ "gp_NOREG:I" ] }, # units => [], # emit => "",