X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Famd64%2Famd64_emitter.c;h=232e70a9cf1dc98b693934e4f416c384112d9f2a;hb=df2faee01a5832057bb3ca0ba5f67e979c916e19;hp=88b8ecd9a1a542ea0c9ac7b4eb13b3edafa36905;hpb=ce6161a7e42a48f7422b7babcc64d8ace18e2687;p=libfirm diff --git a/ir/be/amd64/amd64_emitter.c b/ir/be/amd64/amd64_emitter.c index 88b8ecd9a..232e70a9c 100644 --- a/ir/be/amd64/amd64_emitter.c +++ b/ir/be/amd64/amd64_emitter.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved. + * Copyright (C) 1995-2011 University of Karlsruhe. All right reserved. * * This file is part of libFirm. * @@ -20,12 +20,13 @@ /** * @file * @brief emit assembler for a backend graph - * @version $Id: amd64_emitter.c 26746 2009-11-27 08:53:15Z matze $ */ #include "config.h" #include +#include "be_t.h" +#include "error.h" #include "xmalloc.h" #include "tv.h" #include "iredges.h" @@ -36,10 +37,9 @@ #include "irargs_t.h" #include "irprog.h" -#include "../besched.h" -#include "../begnuas.h" -#include "../beblocksched.h" -#include "../be_dbgout.h" +#include "besched.h" +#include "begnuas.h" +#include "beblocksched.h" #include "amd64_emitter.h" #include "gen_amd64_emitter.h" @@ -47,116 +47,141 @@ #include "amd64_nodes_attr.h" #include "amd64_new_nodes.h" -#define SNPRINTF_BUF_LEN 128 +#include "benode.h" -#include "../benode.h" +/************************************************************* + * _ _ __ _ _ + * (_) | | / _| | | | | + * _ __ _ __ _ _ __ | |_| |_ | |__ ___| |_ __ ___ _ __ + * | '_ \| '__| | '_ \| __| _| | '_ \ / _ \ | '_ \ / _ \ '__| + * | |_) | | | | | | | |_| | | | | | __/ | |_) | __/ | + * | .__/|_| |_|_| |_|\__|_| |_| |_|\___|_| .__/ \___|_| + * | | | | + * |_| |_| + *************************************************************/ /** - * Returns the register at in position pos. + * Returns the target block for a control flow node. */ -static const arch_register_t *get_in_reg(const ir_node *node, int pos) +static ir_node *get_cfop_target_block(const ir_node *irn) +{ + return (ir_node*)get_irn_link(irn); +} + +void amd64_emitf(ir_node const *const node, char const *fmt, ...) { - ir_node *op; - const arch_register_t *reg = NULL; + va_list ap; + va_start(ap, fmt); - assert(get_irn_arity(node) > pos && "Invalid IN position"); + be_emit_char('\t'); + for (;;) { + char const *start = fmt; - /* The out register of the operator at position pos is the - in register we need. */ - op = get_irn_n(node, pos); + while (*fmt != '%' && *fmt != '\n' && *fmt != '\0') + ++fmt; + if (fmt != start) { + be_emit_string_len(start, fmt - start); + } - reg = arch_get_irn_register(op); + if (*fmt == '\n') { + be_emit_char('\n'); + be_emit_write_line(); + be_emit_char('\t'); + ++fmt; + continue; + } - assert(reg && "no in register found"); - return reg; -} + if (*fmt == '\0') + break; -/** - * Returns the register at out position pos. - */ -static const arch_register_t *get_out_reg(const ir_node *node, int pos) -{ - ir_node *proj; - const arch_register_t *reg = NULL; - - /* 1st case: irn is not of mode_T, so it has only */ - /* one OUT register -> good */ - /* 2nd case: irn is of mode_T -> collect all Projs and ask the */ - /* Proj with the corresponding projnum for the register */ - - if (get_irn_mode(node) != mode_T) { - reg = arch_get_irn_register(node); - } else if (is_amd64_irn(node)) { - reg = arch_irn_get_register(node, pos); - } else { - const ir_edge_t *edge; + ++fmt; - foreach_out_edge(node, edge) { - proj = get_edge_src_irn(edge); - assert(is_Proj(proj) && "non-Proj from mode_T node"); - if (get_Proj_proj(proj) == pos) { - reg = arch_get_irn_register(proj); + switch (*fmt++) { + arch_register_t const *reg; + + case '%': + be_emit_char('%'); + break; + + case 'C': { + amd64_attr_t const *const attr = get_amd64_attr_const(node); + be_emit_irprintf("$0x%X", attr->ext.imm_value); break; } - } - } - assert(reg && "no out register found"); - return reg; -} + case 'D': + if (*fmt < '0' || '9' <= *fmt) + goto unknown; + reg = arch_get_irn_register_out(node, *fmt++ - '0'); + goto emit_R; -/************************************************************* - * _ _ __ _ _ - * (_) | | / _| | | | | - * _ __ _ __ _ _ __ | |_| |_ | |__ ___| |_ __ ___ _ __ - * | '_ \| '__| | '_ \| __| _| | '_ \ / _ \ | '_ \ / _ \ '__| - * | |_) | | | | | | | |_| | | | | | __/ | |_) | __/ | - * | .__/|_| |_|_| |_|\__|_| |_| |_|\___|_| .__/ \___|_| - * | | | | - * |_| |_| - *************************************************************/ + case 'E': { + ir_entity const *const ent = va_arg(ap, ir_entity const*); + be_gas_emit_entity(ent); + break; + } -void amd64_emit_register(const arch_register_t *reg) -{ - be_emit_char('%'); - be_emit_string(arch_register_get_name(reg)); -} + case 'L': { + ir_node *const block = get_cfop_target_block(node); + be_gas_emit_block_name(block); + break; + } -void amd64_emit_immediate(const ir_node *node) -{ - const amd64_attr_t *attr = get_amd64_attr_const (node); - be_emit_char('$'); - be_emit_irprintf("0x%X", attr->ext.imm_value); -} + case 'O': { + amd64_SymConst_attr_t const *const attr = get_amd64_SymConst_attr_const(node); + if (attr->fp_offset) + be_emit_irprintf("%d", attr->fp_offset); + break; + } -void amd64_emit_fp_offset(const ir_node *node) -{ - const amd64_SymConst_attr_t *attr = get_amd64_SymConst_attr_const(node); - if (attr->fp_offset) - be_emit_irprintf("%d", attr->fp_offset); -} + case 'R': + reg = va_arg(ap, arch_register_t const*); +emit_R: + be_emit_char('%'); + be_emit_string(reg->name); + break; -void amd64_emit_source_register(const ir_node *node, int pos) -{ - amd64_emit_register(get_in_reg(node, pos)); -} + case 'S': { + int pos; + if ('0' <= *fmt && *fmt <= '9') { + pos = *fmt++ - '0'; + } else if (*fmt == '*') { + ++fmt; + pos = va_arg(ap, int); + } else { + goto unknown; + } + reg = arch_get_irn_register_in(node, pos); + goto emit_R; + } -void amd64_emit_dest_register(const ir_node *node, int pos) -{ - amd64_emit_register(get_out_reg(node, pos)); -} + case 'd': { + int const num = va_arg(ap, int); + be_emit_irprintf("%d", num); + break; + } -/** - * Returns the target label for a control flow node. - */ -/* -static void amd64_emit_cfop_target(const ir_node *node) -{ - ir_node *block = get_irn_link(node); + case 's': { + char const *const str = va_arg(ap, char const*); + be_emit_string(str); + break; + } - be_emit_irprintf("BLOCK_%ld", get_irn_node_nr(block)); + case 'u': { + unsigned const num = va_arg(ap, unsigned); + be_emit_irprintf("%u", num); + break; + } + + default: +unknown: + panic("unknown format conversion"); + } + } + + be_emit_finish_line_gas(node); + va_end(ap); } -*/ /*********************************************************************************** * _ __ _ @@ -168,14 +193,6 @@ static void amd64_emit_cfop_target(const ir_node *node) * ***********************************************************************************/ -/** - * Default emitter for anything that we don't want to generate code for. - */ -static void emit_nothing(const ir_node *node) -{ - (void) node; -} - /** * Emit a SymConst. */ @@ -189,7 +206,7 @@ static void emit_amd64_SymConst(const ir_node *irn) key.u.id = get_entity_ld_ident(attr->entity); key.is_ident = 1; key.label = 0; - entry = (sym_or_tv_t *)set_insert(sym_or_tv, &key, sizeof(key), HASH_PTR(key.u.generic)); + entry = set_insert(sym_or_tv_t, sym_or_tv, &key, sizeof(key), hash_ptr(key.u.generic)); if (entry->label == 0) { /* allocate a label */ entry->label = get_unique_label(); @@ -197,11 +214,7 @@ static void emit_amd64_SymConst(const ir_node *irn) label = entry->label; #endif - be_emit_cstring("\tmov $"); - be_gas_emit_entity(attr->entity); - be_emit_cstring(", "); - amd64_emit_dest_register(irn, 0); - be_emit_finish_line_gas(irn); + amd64_emitf(irn, "mov $%E, %D0", attr->entity); } /** @@ -209,11 +222,7 @@ static void emit_amd64_SymConst(const ir_node *irn) */ static void emit_amd64_Conv(const ir_node *irn) { - be_emit_cstring("\tmov "); - amd64_emit_source_register(irn, 0); - be_emit_cstring(", "); - amd64_emit_dest_register(irn, 0); - be_emit_finish_line_gas(irn); + amd64_emitf(irn, "mov %S0, %D0"); } @@ -225,24 +234,6 @@ static ir_node *sched_next_block(const ir_node *block) return (ir_node*)get_irn_link(block); } -/** - * Returns the target block for a control flow node. - */ -static ir_node *get_cfop_target_block(const ir_node *irn) -{ - return (ir_node*)get_irn_link(irn); -} - -/** - * Emit the target label for a control flow node. - */ -static void amd64_emit_cfop_target(const ir_node *irn) -{ - ir_node *block = get_cfop_target_block(irn); - - be_gas_emit_block_name(block); -} - /** * Emit a Jmp. */ @@ -256,14 +247,10 @@ static void emit_amd64_Jmp(const ir_node *node) /* we have a block schedule */ next_block = sched_next_block(block); if (get_cfop_target_block(node) != next_block) { - be_emit_cstring("\tjmp "); - amd64_emit_cfop_target(node); - } else { - be_emit_cstring("\t/* fallthrough to "); - amd64_emit_cfop_target(node); - be_emit_cstring(" */"); + amd64_emitf(node, "jmp %L"); + } else if (be_options.verbose_asm) { + amd64_emitf(node, "/* fallthrough to %L */"); } - be_emit_finish_line_gas(node); } /** @@ -271,17 +258,16 @@ static void emit_amd64_Jmp(const ir_node *node) */ static void emit_amd64_Jcc(const ir_node *irn) { - const ir_edge_t *edge; - const ir_node *proj_true = NULL; - const ir_node *proj_false = NULL; - const ir_node *block; - const ir_node *next_block; - const char *suffix; - const amd64_attr_t *attr = get_amd64_attr_const(irn); - int proj_num = attr->ext.pnc; - ir_node *op1 = get_irn_n(irn, 0); - const amd64_attr_t *cmp_attr = get_amd64_attr_const(op1); - bool is_signed = !cmp_attr->data.cmp_unsigned; + const ir_node *proj_true = NULL; + const ir_node *proj_false = NULL; + const ir_node *block; + const ir_node *next_block; + const char *suffix; + const amd64_attr_t *attr = get_amd64_attr_const(irn); + ir_relation relation = attr->ext.relation; + ir_node *op1 = get_irn_n(irn, 0); + const amd64_attr_t *cmp_attr = get_amd64_attr_const(op1); + bool is_signed = !cmp_attr->data.cmp_unsigned; assert(is_amd64_Cmp(op1)); @@ -296,7 +282,7 @@ static void emit_amd64_Jcc(const ir_node *irn) } if (cmp_attr->data.ins_permuted) { - proj_num = get_mirrored_pnc(proj_num); + relation = get_inversed_relation(relation); } /* for now, the code works for scheduled and non-schedules blocks */ @@ -305,8 +291,8 @@ static void emit_amd64_Jcc(const ir_node *irn) /* we have a block schedule */ next_block = sched_next_block(block); - assert(proj_num != pn_Cmp_False); - assert(proj_num != pn_Cmp_True); + assert(relation != ir_relation_false); + assert(relation != ir_relation_true); if (get_cfop_target_block(proj_true) == next_block) { /* exchange both proj's so the second one can be omitted */ @@ -314,34 +300,27 @@ static void emit_amd64_Jcc(const ir_node *irn) proj_true = proj_false; proj_false = t; - proj_num = get_negated_pnc(proj_num, mode_Lu); + relation = get_negated_relation(relation); } - switch (proj_num) { - case pn_Cmp_Eq: suffix = "e"; break; - case pn_Cmp_Lt: suffix = is_signed ? "l" : "b"; break; - case pn_Cmp_Le: suffix = is_signed ? "le" : "be"; break; - case pn_Cmp_Gt: suffix = is_signed ? "g" : "a"; break; - case pn_Cmp_Ge: suffix = is_signed ? "ge" : "ae"; break; - case pn_Cmp_Lg: suffix = "ne"; break; - case pn_Cmp_Leg: suffix = "mp"; break; + switch (relation & ir_relation_less_equal_greater) { + case ir_relation_equal: suffix = "e"; break; + case ir_relation_less: suffix = is_signed ? "l" : "b"; break; + case ir_relation_less_equal: suffix = is_signed ? "le" : "be"; break; + case ir_relation_greater: suffix = is_signed ? "g" : "a"; break; + case ir_relation_greater_equal: suffix = is_signed ? "ge" : "ae"; break; + case ir_relation_less_greater: suffix = "ne"; break; + case ir_relation_less_equal_greater: suffix = "mp"; break; default: panic("Cmp has unsupported pnc"); } /* emit the true proj */ - be_emit_irprintf("\tj%s ", suffix); - amd64_emit_cfop_target(proj_true); - be_emit_finish_line_gas(proj_true); - - if (get_cfop_target_block(proj_false) == next_block) { - be_emit_cstring("\t/* fallthrough to "); - amd64_emit_cfop_target(proj_false); - be_emit_cstring(" */"); - be_emit_finish_line_gas(proj_false); - } else { - be_emit_cstring("\tjmp "); - amd64_emit_cfop_target(proj_false); - be_emit_finish_line_gas(proj_false); + amd64_emitf(proj_true, "j%s %L", suffix); + + if (get_cfop_target_block(proj_false) != next_block) { + amd64_emitf(proj_false, "jmp %L"); + } else if (be_options.verbose_asm) { + amd64_emitf(proj_false, "/* fallthrough to %L */"); } } @@ -356,14 +335,11 @@ static void emit_be_Call(const ir_node *node) * variable argument counts */ if (get_method_variadicity (be_Call_get_type((ir_node *) node))) { /* But this still is a hack... */ - be_emit_cstring("\txor %rax, %rax"); - be_emit_finish_line_gas(node); + amd64_emitf(node, "xor %%rax, %%rax"); } if (entity) { - be_emit_cstring("\tcall "); - be_gas_emit_entity (be_Call_get_entity(node)); - be_emit_finish_line_gas(node); + amd64_emitf(node, "call %E", entity); } else { be_emit_pad_comment(); be_emit_cstring("/* FIXME: call NULL entity?! */\n"); @@ -377,42 +353,31 @@ static void emit_be_Copy(const ir_node *irn) { ir_mode *mode = get_irn_mode(irn); - if (get_in_reg(irn, 0) == get_out_reg(irn, 0)) { + if (arch_get_irn_register_in(irn, 0) == arch_get_irn_register_out(irn, 0)) { /* omitted Copy */ return; } if (mode_is_float(mode)) { - panic("emit_be_Copy: move not supported for FP"); + panic("move not supported for FP"); } else if (mode_is_data(mode)) { - be_emit_cstring("\tmov "); - amd64_emit_source_register(irn, 0); - be_emit_cstring(", "); - amd64_emit_dest_register(irn, 0); - be_emit_finish_line_gas(irn); + amd64_emitf(irn, "mov %S0, %D0"); } else { - panic("emit_be_Copy: move not supported for this mode"); + panic("move not supported for this mode"); } } static void emit_be_Perm(const ir_node *node) { const arch_register_t *in0, *in1; - const arch_register_class_t *cls0, *cls1; in0 = arch_get_irn_register(get_irn_n(node, 0)); in1 = arch_get_irn_register(get_irn_n(node, 1)); - cls0 = arch_register_get_class(in0); - cls1 = arch_register_get_class(in1); + arch_register_class_t const* const cls0 = in0->reg_class; + assert(cls0 == in1->reg_class && "Register class mismatch at Perm"); - assert(cls0 == cls1 && "Register class mismatch at Perm"); - - be_emit_cstring("\txchg "); - amd64_emit_register (in0); - be_emit_cstring(", "); - amd64_emit_register (in1); - be_emit_finish_line_gas(node); + amd64_emitf(node, "xchg %R, %R", in0, in1); if (cls0 != &amd64_reg_classes[CLASS_amd64_gp]) { panic("unexpected register class in be_Perm (%+F)", node); @@ -424,17 +389,8 @@ static void emit_amd64_FrameAddr(const ir_node *irn) const amd64_SymConst_attr_t *attr = (const amd64_SymConst_attr_t*) get_amd64_attr_const(irn); - be_emit_cstring("\tmov "); - amd64_emit_source_register(irn, 0); - be_emit_cstring(", "); - amd64_emit_dest_register(irn, 0); - be_emit_finish_line_gas(irn); - - be_emit_cstring("\tadd "); - be_emit_irprintf("$0x%X", attr->fp_offset); - be_emit_cstring(", "); - amd64_emit_dest_register(irn, 0); - be_emit_finish_line_gas(irn); + amd64_emitf(irn, "mov %S0, %D0"); + amd64_emitf(irn, "add $%u, %D0", attr->fp_offset); } /** @@ -448,15 +404,9 @@ static void emit_be_IncSP(const ir_node *node) return; if (offs > 0) { - be_emit_irprintf("\tsub "); - be_emit_irprintf("$%u, ", offs); - amd64_emit_dest_register(node, 0); - be_emit_finish_line_gas(node); + amd64_emitf(node, "sub, $%d, %D0", offs); } else { - be_emit_irprintf("\tadd "); - be_emit_irprintf("$%u, ", -offs); - amd64_emit_dest_register(node, 0); - be_emit_finish_line_gas(node); + amd64_emitf(node, "add, $%d, %D0", -offs); } } @@ -473,23 +423,11 @@ static void emit_be_Return(const ir_node *node) static void emit_amd64_binop_op(const ir_node *irn, int second_op) { if (irn->op == op_amd64_Add) { - be_emit_cstring("\tadd "); - amd64_emit_source_register(irn, second_op); - be_emit_cstring(", "); - amd64_emit_dest_register(irn, 0); - be_emit_finish_line_gas(irn); + amd64_emitf(irn, "add %S*, %D0", second_op); } else if (irn->op == op_amd64_Sub) { - be_emit_cstring("\tneg "); - amd64_emit_source_register(irn, second_op); - be_emit_finish_line_gas(irn); - be_emit_cstring("\tadd "); - amd64_emit_source_register(irn, second_op); - be_emit_cstring(", "); - amd64_emit_dest_register(irn, 0); - be_emit_finish_line_gas(irn); - be_emit_cstring("\tneg "); - amd64_emit_source_register(irn, second_op); - be_emit_finish_line_gas(irn); + amd64_emitf(irn, "neg %S*", second_op); + amd64_emitf(irn, "add %S*, %D0", second_op); + amd64_emitf(irn, "neg %S*", second_op); } } @@ -499,41 +437,22 @@ static void emit_amd64_binop_op(const ir_node *irn, int second_op) */ static void emit_amd64_binop(const ir_node *irn) { - const arch_register_t *reg_s1 = get_in_reg(irn, 0); - const arch_register_t *reg_s2 = get_in_reg(irn, 1); - const arch_register_t *reg_d1 = get_out_reg(irn, 0); + const arch_register_t *reg_s1 = arch_get_irn_register_in(irn, 0); + const arch_register_t *reg_s2 = arch_get_irn_register_in(irn, 1); + const arch_register_t *reg_d1 = arch_get_irn_register_out(irn, 0); int second_op = 0; if (reg_d1 != reg_s1 && reg_d1 != reg_s2) { - be_emit_cstring("\tmov "); - amd64_emit_register(reg_s1); - be_emit_cstring(", "); - amd64_emit_register(reg_d1); - be_emit_finish_line_gas(irn); + amd64_emitf(irn, "mov %R, %R", reg_s1, reg_d1); second_op = 1; - } else if (reg_d1 == reg_s2 && reg_d1 != reg_s1) { second_op = 0; - } emit_amd64_binop_op(irn, second_op); } -/** - * The type of a emitter function. - */ -typedef void (emit_func)(const ir_node *irn); - -/** - * Set a node emitter. Make it a bit more type safe. - */ -static inline void set_emitter(ir_op *op, emit_func arm_emit_node) -{ - op->ops.generic = (op_func)arm_emit_node; -} - /** * Enters the emitter functions for handled nodes into the generic * pointer of an opcode. @@ -541,46 +460,27 @@ static inline void set_emitter(ir_op *op, emit_func arm_emit_node) static void amd64_register_emitters(void) { /* first clear the generic function pointer for all ops */ - clear_irp_opcodes_generic_func(); + ir_clear_opcodes_generic_func(); /* register all emitter functions defined in spec */ amd64_register_spec_emitters(); - set_emitter(op_amd64_SymConst, emit_amd64_SymConst); - set_emitter(op_amd64_Jmp, emit_amd64_Jmp); - set_emitter(op_amd64_Jcc, emit_amd64_Jcc); - set_emitter(op_amd64_Conv, emit_amd64_Conv); - set_emitter(op_amd64_FrameAddr, emit_amd64_FrameAddr); - set_emitter(op_be_Return, emit_be_Return); - set_emitter(op_be_Call, emit_be_Call); - set_emitter(op_be_Copy, emit_be_Copy); - set_emitter(op_be_IncSP, emit_be_IncSP); - set_emitter(op_be_Perm, emit_be_Perm); - - set_emitter(op_amd64_Add, emit_amd64_binop); - set_emitter(op_amd64_Sub, emit_amd64_binop); - - set_emitter(op_be_Start, emit_nothing); - set_emitter(op_be_Keep, emit_nothing); - set_emitter(op_be_Barrier, emit_nothing); - set_emitter(op_Phi, emit_nothing); -} - -typedef void (*emit_func_ptr) (const ir_node *); - -/** - * Emits code for a node. - */ -static void amd64_emit_node(const ir_node *node) -{ - ir_op *op = get_irn_op(node); - - if (op->ops.generic) { - emit_func_ptr func = (emit_func_ptr) op->ops.generic; - (*func) (node); - } else { - ir_fprintf(stderr, "No emitter for node %+F\n", node); - } + be_set_emitter(op_amd64_Add, emit_amd64_binop); + be_set_emitter(op_amd64_Conv, emit_amd64_Conv); + be_set_emitter(op_amd64_FrameAddr, emit_amd64_FrameAddr); + be_set_emitter(op_amd64_Jcc, emit_amd64_Jcc); + be_set_emitter(op_amd64_Jmp, emit_amd64_Jmp); + be_set_emitter(op_amd64_Sub, emit_amd64_binop); + be_set_emitter(op_amd64_SymConst, emit_amd64_SymConst); + be_set_emitter(op_be_Call, emit_be_Call); + be_set_emitter(op_be_Copy, emit_be_Copy); + be_set_emitter(op_be_IncSP, emit_be_IncSP); + be_set_emitter(op_be_Perm, emit_be_Perm); + be_set_emitter(op_be_Return, emit_be_Return); + + be_set_emitter(op_Phi, be_emit_nothing); + be_set_emitter(op_be_Keep, be_emit_nothing); + be_set_emitter(op_be_Start, be_emit_nothing); } /** @@ -589,19 +489,15 @@ static void amd64_emit_node(const ir_node *node) */ static void amd64_gen_block(ir_node *block, void *data) { - ir_node *node; (void) data; if (! is_Block(block)) return; - be_gas_emit_block_name(block); - be_emit_char(':'); - - be_emit_write_line(); + be_gas_begin_block(block, true); sched_foreach(block, node) { - amd64_emit_node(node); + be_emit_node(node); } } @@ -629,15 +525,14 @@ void amd64_gen_routine(ir_graph *irg) { ir_entity *entity = get_irg_entity(irg); ir_node **blk_sched; - int i, n; + size_t i, n; /* register all emitter functions */ amd64_register_emitters(); blk_sched = be_create_block_schedule(irg); - be_dbg_method_begin(entity); - be_gas_emit_function_prolog(entity, 4); + be_gas_emit_function_prolog(entity, 4, NULL); irg_block_walk_graph(irg, amd64_gen_labels, NULL, NULL); @@ -656,7 +551,4 @@ void amd64_gen_routine(ir_graph *irg) } be_gas_emit_function_epilog(entity); - be_dbg_method_end(); - be_emit_char('\n'); - be_emit_write_line(); }