X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2FTEMPLATE%2Fbearch_TEMPLATE.c;h=34d200a21198265298885f6ff323f28f978eae11;hb=1140301fc5c11fef75f583bc4d94082cfd450fbc;hp=859ede86e3c432b6dd7c52b2778a346cda810d2b;hpb=f9df6c120d304b504dc55fdd7219d2bcf24d354d;p=libfirm diff --git a/ir/be/TEMPLATE/bearch_TEMPLATE.c b/ir/be/TEMPLATE/bearch_TEMPLATE.c index 859ede86e..34d200a21 100644 --- a/ir/be/TEMPLATE/bearch_TEMPLATE.c +++ b/ir/be/TEMPLATE/bearch_TEMPLATE.c @@ -1,8 +1,29 @@ -#ifdef HAVE_CONFIG_H +/* + * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved. + * + * This file is part of libFirm. + * + * This file may be distributed and/or modified under the terms of the + * GNU General Public License version 2 as published by the Free Software + * Foundation and appearing in the file LICENSE.GPL included in the + * packaging of this file. + * + * Licensees holding valid libFirm Professional Edition licenses may use + * this file in accordance with the libFirm Commercial License. + * Agreement provided with the Software. + * + * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE + * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE. + */ + +/** + * @file + * @brief The main TEMPLATE backend driver file. + * @version $Id$ + */ #include "config.h" -#endif -#include "pseudo_irg.h" #include "irgwalk.h" #include "irprog.h" #include "irprintf.h" @@ -12,412 +33,192 @@ #include "bitset.h" #include "debug.h" -#include "../bearch.h" /* the general register allocator interface */ -#include "../benode_t.h" +#include "be.h" +#include "../bearch.h" +#include "../benode.h" #include "../belower.h" -#include "../besched_t.h" +#include "../besched.h" +#include "../beabi.h" +#include "../bemodule.h" +#include "../begnuas.h" +#include "../belistsched.h" + #include "bearch_TEMPLATE_t.h" -#include "TEMPLATE_new_nodes.h" /* TEMPLATE nodes interface */ -#include "gen_TEMPLATE_regalloc_if.h" /* the generated interface (register type and class defenitions) */ -#include "TEMPLATE_gen_decls.h" /* interface declaration emitter */ +#include "TEMPLATE_new_nodes.h" +#include "gen_TEMPLATE_regalloc_if.h" #include "TEMPLATE_transform.h" #include "TEMPLATE_emitter.h" -#include "TEMPLATE_map_regs.h" -#define DEBUG_MODULE "firm.be.TEMPLATE.isa" +DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;) -/* TODO: ugly, but we need it to get access to the registers assigned to Phi nodes */ -static set *cur_reg_set = NULL; - -/************************************************** - * _ _ _ __ - * | | | (_)/ _| - * _ __ ___ __ _ __ _| | | ___ ___ _| |_ - * | '__/ _ \/ _` | / _` | | |/ _ \ / __| | | _| - * | | | __/ (_| | | (_| | | | (_) | (__ | | | - * |_| \___|\__, | \__,_|_|_|\___/ \___| |_|_| - * __/ | - * |___/ - **************************************************/ +static arch_irn_class_t TEMPLATE_classify(const ir_node *irn) +{ + (void) irn; + return 0; +} -static ir_node *my_skip_proj(const ir_node *n) { - while (is_Proj(n)) - n = get_Proj_pred(n); - return (ir_node *)n; +static ir_entity *TEMPLATE_get_frame_entity(const ir_node *node) +{ + (void) node; + /* TODO: return the ir_entity assigned to the frame */ + return NULL; } /** - * Return register requirements for a TEMPLATE node. - * If the node returns a tuple (mode_T) then the proj's - * will be asked for this information. + * This function is called by the generic backend to correct offsets for + * nodes accessing the stack. */ -static const arch_register_req_t *TEMPLATE_get_irn_reg_req(const void *self, arch_register_req_t *req, const ir_node *irn, int pos) { - const TEMPLATE_register_req_t *irn_req; - long node_pos = pos == -1 ? 0 : pos; - ir_mode *mode = get_irn_mode(irn); - firm_dbg_module_t *mod = firm_dbg_register(DEBUG_MODULE); - - if (mode == mode_T || mode == mode_M) { - DBG((mod, LEVEL_1, "ignoring mode_T, mode_M node %+F\n", irn)); - return NULL; - } - - DBG((mod, LEVEL_1, "get requirements at pos %d for %+F ... ", pos, irn)); - - if (is_Proj(irn)) { - /* in case of a proj, we need to get the correct OUT slot */ - /* of the node corresponding to the proj number */ - if (pos == -1) { - node_pos = TEMPLATE_translate_proj_pos(irn); - } - else { - node_pos = pos; - } - - irn = my_skip_proj(irn); - - DB((mod, LEVEL_1, "skipping Proj, going to %+F at pos %d ... ", irn, node_pos)); - } - - /* get requirements for our own nodes */ - if (is_TEMPLATE_irn(irn)) { - if (pos >= 0) { - irn_req = get_TEMPLATE_in_req(irn, pos); - } - else { - irn_req = get_TEMPLATE_out_req(irn, node_pos); - } - - DB((mod, LEVEL_1, "returning reqs for %+F at pos %d\n", irn, pos)); - - memcpy(req, &(irn_req->req), sizeof(*req)); - - if (arch_register_req_is(&(irn_req->req), should_be_same) || - arch_register_req_is(&(irn_req->req), should_be_different)) { - assert(irn_req->pos >= 0 && "should be same/different constraint for in -> out NYI"); - req->other = get_irn_n(irn, irn_req->pos); - } - } - /* get requirements for FIRM nodes */ - else { - /* treat Phi like Const with default requirements */ - if (is_Phi(irn)) { - DB((mod, LEVEL_1, "returning standard reqs for %+F\n", irn)); - - if (mode_is_float(mode)) { - memcpy(req, &(TEMPLATE_default_req_TEMPLATE_floating_point.req), sizeof(*req)); - } - else if (mode_is_int(mode) || mode_is_reference(mode)) { - memcpy(req, &(TEMPLATE_default_req_TEMPLATE_general_purpose.req), sizeof(*req)); - } - else if (mode == mode_T || mode == mode_M) { - DBG((mod, LEVEL_1, "ignoring Phi node %+F\n", irn)); - return NULL; - } - else { - assert(0 && "unsupported Phi-Mode"); - } - } - else if ((get_irn_op(irn) == op_Return) && pos > 0) { - /* pos == 0 is Memory -> no requirements */ - DB((mod, LEVEL_1, "giving return (%+F) requirements\n", irn)); - - if (pos == 1) { - /* pos == 1 is Stackpointer */ - memcpy(req, &(TEMPLATE_default_req_TEMPLATE_general_purpose_r6.req), sizeof(*req)); - } - else { - if (mode_is_float(get_irn_mode(get_Return_res(irn, pos)))) { - /* fp result */ - memcpy(req, &(TEMPLATE_default_req_TEMPLATE_floating_point_f0.req), sizeof(*req)); - } - else { - /* integer result, 64bit results are returned as two 32bit values */ - if (pos == 2) { - memcpy(req, &(TEMPLATE_default_req_TEMPLATE_general_purpose_r0.req), sizeof(*req)); - } - else { - memcpy(req, &(TEMPLATE_default_req_TEMPLATE_general_purpose_r1.req), sizeof(*req)); - } - } - } - } - else { - DB((mod, LEVEL_1, "returning NULL for %+F (node not supported)\n", irn)); - req = NULL; - } - } - - return req; -} - -static void TEMPLATE_set_irn_reg(const void *self, ir_node *irn, const arch_register_t *reg) { - int pos = 0; - - else if (is_Proj(irn)) { - pos = TEMPLATE_translate_proj_pos(irn); - irn = my_skip_proj(irn); - } - - if (is_TEMPLATE_irn(irn)) { - const arch_register_t **slots; - - slots = get_TEMPLATE_slots(irn); - slots[pos] = reg; - } - else { - /* here we set the registers for the Phi nodes */ - TEMPLATE_set_firm_reg(irn, reg, cur_reg_set); - } -} - -static const arch_register_t *TEMPLATE_get_irn_reg(const void *self, const ir_node *irn) { - int pos = 0; - const arch_register_t *reg = NULL; - - else if (is_Proj(irn)) { - pos = TEMPLATE_translate_proj_pos(irn); - irn = my_skip_proj(irn); - } - - if (is_TEMPLATE_irn(irn)) { - const arch_register_t **slots; - slots = get_TEMPLATE_slots(irn); - reg = slots[pos]; - } - else { - reg = TEMPLATE_get_firm_reg(irn, cur_reg_set); - } - - return reg; -} - -static arch_irn_class_t TEMPLATE_classify(const void *self, const ir_node *irn) { - irn = my_skip_proj(irn); - - if (is_cfop(irn)) { - return arch_irn_class_branch; - } - else if (is_TEMPLATE_irn(irn)) { - return arch_irn_class_normal; - } - - return 0; +static void TEMPLATE_set_frame_offset(ir_node *irn, int offset) +{ + (void) irn; + (void) offset; + /* TODO: correct offset if irn accesses the stack */ } -static arch_irn_flags_t TEMPLATE_get_flags(const void *self, const ir_node *irn) { - irn = my_skip_proj(irn); - - if (is_TEMPLATE_irn(irn)) { - return get_TEMPLATE_flags(irn); - } - else if (is_Unknown(irn)) { - return arch_irn_flags_ignore; - } - +static int TEMPLATE_get_sp_bias(const ir_node *irn) +{ + (void) irn; return 0; } /* fill register allocator interface */ -static const arch_irn_ops_if_t TEMPLATE_irn_ops_if = { - TEMPLATE_get_irn_reg_req, - TEMPLATE_set_irn_reg, - TEMPLATE_get_irn_reg, +static const arch_irn_ops_t TEMPLATE_irn_ops = { + get_TEMPLATE_in_req, TEMPLATE_classify, - TEMPLATE_get_flags -}; - -TEMPLATE_irn_ops_t TEMPLATE_irn_ops = { - &TEMPLATE_irn_ops_if, - NULL + TEMPLATE_get_frame_entity, + TEMPLATE_set_frame_offset, + TEMPLATE_get_sp_bias, + NULL, /* get_inverse */ + NULL, /* get_op_estimated_cost */ + NULL, /* possible_memory_operand */ + NULL, /* perform_memory_operand */ }; -/************************************************** - * _ _ __ - * | | (_)/ _| - * ___ ___ __| | ___ __ _ ___ _ __ _| |_ - * / __/ _ \ / _` |/ _ \/ _` |/ _ \ '_ \ | | _| - * | (_| (_) | (_| | __/ (_| | __/ | | | | | | - * \___\___/ \__,_|\___|\__, |\___|_| |_| |_|_| - * __/ | - * |___/ - **************************************************/ - /** * Transforms the standard firm graph into * a TEMLPATE firm graph */ -static void TEMPLATE_prepare_graph(void *self) { +static void TEMPLATE_prepare_graph(void *self) +{ TEMPLATE_code_gen_t *cg = self; - irg_walk_blkwise_graph(cg->irg, TEMPLATE_place_consts, TEMPLATE_transform_node, cg); + /* transform nodes into assembler instructions */ + TEMPLATE_transform_graph(cg); } /** - * Fix offsets and stacksize + * Called immediatly before emit phase. */ -static void TEMPLATE_finish_irg(ir_graph *irg, TEMPLATE_code_gen_t *cg) { - /* TODO */ +static void TEMPLATE_finish_irg(void *self) +{ + (void) self; } -static void TEMPLATE_before_sched(void *self) { -} - -static void TEMPLATE_before_ra(void *self) { +static void TEMPLATE_before_ra(void *self) +{ + (void) self; + /* Some stuff you need to do after scheduling but before register allocation */ } - -/** - * Creates a Store for a Spill - */ -static ir_node *TEMPLATE_lower_spill(void *self, ir_node *spill) { - TEMPLATE_code_gen_t *cg = self; - dbg_info *dbg = get_irn_dbg_info(spill); - ir_node *block = get_nodes_block(spill); - ir_node *ptr = get_irg_frame(cg->irg); - ir_node *val = be_get_Spill_context(spill); - ir_node *mem = new_rd_NoMem(cg->irg); - ir_mode *mode = get_irn_mode(spill); - ir_node *res; - entity *ent = be_get_spill_entity(spill); - unsigned offs = get_entity_offset_bytes(ent); - - DB((cg->mod, LEVEL_1, "lower_spill: got offset %d for %+F\n", offs, ent)); - - /* TODO: create Store */ - - return res; +static void TEMPLATE_after_ra(void *self) +{ + (void) self; + /* Some stuff you need to do immediatly after register allocation */ } -/** - * Create a Load for a Spill - */ -static ir_node *TEMPLATE_lower_reload(void *self, ir_node *reload) { - TEMPLATE_code_gen_t *cg = self; - dbg_info *dbg = get_irn_dbg_info(reload); - ir_node *block = get_nodes_block(reload); - ir_node *ptr = get_irg_frame(cg->irg); - ir_mode *mode = get_irn_mode(reload); - ir_node *pred = get_irn_n(reload, 0); - tarval *tv; - ir_node *res; - - /* TODO: create Load */ - return res; -} - -/** - * Returns the Stackregister - */ -static const arch_register_t *TEMPLATE_get_stack_register(void *self) { - /* TODO */ -} /** * Emits the code, closes the output file and frees * the code generator interface. */ -static void TEMPLATE_codegen(void *self) { +static void TEMPLATE_emit_and_done(void *self) +{ TEMPLATE_code_gen_t *cg = self; ir_graph *irg = cg->irg; - FILE *out = cg->out; - - if (cg->emit_decls) { - TEMPLATE_gen_decls(cg->out); - cg->emit_decls = 0; - } - TEMPLATE_finish_irg(irg, cg); - dump_ir_block_graph_sched(irg, "-TEMPLATE-finished"); - TEMPLATE_gen_routine(out, irg, cg); - - cur_reg_set = NULL; + TEMPLATE_emit_routine(irg); /* de-allocate code generator */ - del_set(cg->reg_set); - free(self); + free(cg); } -static void *TEMPLATE_cg_init(FILE *F, ir_graph *irg, const arch_env_t *arch_env); +static void *TEMPLATE_cg_init(ir_graph *irg); static const arch_code_generator_if_t TEMPLATE_code_gen_if = { TEMPLATE_cg_init, + NULL, /* get_pic_base hook */ + NULL, /* before abi introduce hook */ TEMPLATE_prepare_graph, - TEMPLATE_before_sched, /* before scheduling hook */ + NULL, /* spill hook */ TEMPLATE_before_ra, /* before register allocation hook */ - TEMPLATE_lower_spill, - TEMPLATE_lower_reload, - TEMPLATE_get_stack_register, - TEMPLATE_codegen /* emit && done */ + TEMPLATE_after_ra, /* after register allocation hook */ + TEMPLATE_finish_irg, + TEMPLATE_emit_and_done }; /** * Initializes the code generator. */ -static void *TEMPLATE_cg_init(FILE *F, ir_graph *irg, const arch_env_t *arch_env) { - TEMPLATE_isa_t *isa = (TEMPLATE_isa_t *)arch_env->isa; - TEMPLATE_code_gen_t *cg = xmalloc(sizeof(*cg)); - - cg->impl = &TEMPLATE_code_gen_if; - cg->irg = irg; - cg->reg_set = new_set(TEMPLATE_cmp_irn_reg_assoc, 1024); - cg->mod = firm_dbg_register("firm.be.TEMPLATE.cg"); - cg->out = F; - cg->arch_env = arch_env; - - isa->num_codegens++; - - if (isa->num_codegens > 1) - cg->emit_decls = 0; - else - cg->emit_decls = 1; - - cur_reg_set = cg->reg_set; +static void *TEMPLATE_cg_init(ir_graph *irg) +{ + const arch_env_t *arch_env = be_get_irg_arch_env(irg); + TEMPLATE_isa_t *isa = (TEMPLATE_isa_t *) arch_env; + TEMPLATE_code_gen_t *cg = XMALLOC(TEMPLATE_code_gen_t); - TEMPLATE_irn_ops.cg = cg; + cg->impl = &TEMPLATE_code_gen_if; + cg->irg = irg; + cg->isa = isa; return (arch_code_generator_t *)cg; } -/***************************************************************** - * ____ _ _ _____ _____ - * | _ \ | | | | |_ _|/ ____| /\ - * | |_) | __ _ ___| | _____ _ __ __| | | | | (___ / \ - * | _ < / _` |/ __| |/ / _ \ '_ \ / _` | | | \___ \ / /\ \ - * | |_) | (_| | (__| < __/ | | | (_| | _| |_ ____) / ____ \ - * |____/ \__,_|\___|_|\_\___|_| |_|\__,_| |_____|_____/_/ \_\ - * - *****************************************************************/ +const arch_isa_if_t TEMPLATE_isa_if; +static TEMPLATE_isa_t TEMPLATE_isa_template = { + { + &TEMPLATE_isa_if, /* isa interface implementation */ + &TEMPLATE_gp_regs[REG_SP], /* stack pointer register */ + &TEMPLATE_gp_regs[REG_BP], /* base pointer register */ + &TEMPLATE_reg_classes[CLASS_TEMPLATE_gp], /* link pointer register class */ + -1, /* stack direction */ + 2, /* power of two stack alignment for calls, 2^2 == 4 */ + NULL, /* main environment */ + 7, /* costs for a spill instruction */ + 5, /* costs for a reload instruction */ + false, /* no custom abi handling */ + }, +}; /** - * Initializes the backend ISA and opens the output file. + * Initializes the backend ISA */ -static void *TEMPLATE_init(void) { - static int inited = 0; - TEMPLATE_isa_t *isa = xmalloc(sizeof(*isa)); - - isa->impl = &TEMPLATE_isa_if; +static arch_env_t *TEMPLATE_init(FILE *outfile) +{ + static int run_once = 0; + TEMPLATE_isa_t *isa; - if(inited) + if (run_once) return NULL; + run_once = 1; + + isa = XMALLOC(TEMPLATE_isa_t); + memcpy(isa, &TEMPLATE_isa_template, sizeof(*isa)); - inited = 1; - isa->num_codegens = 0; + be_emit_init(outfile); - TEMPLATE_register_init(isa); - TEMPLATE_create_opcodes(); + TEMPLATE_register_init(); + TEMPLATE_create_opcodes(&TEMPLATE_irn_ops); - return isa; + return &isa->arch_env; } @@ -425,41 +226,189 @@ static void *TEMPLATE_init(void) { /** * Closes the output file and frees the ISA structure. */ -static void TEMPLATE_done(void *self) { +static void TEMPLATE_done(void *self) +{ + TEMPLATE_isa_t *isa = self; + + /* emit now all global declarations */ + be_gas_emit_decls(isa->arch_env.main_env); + + be_emit_exit(); free(self); } - -static int TEMPLATE_get_n_reg_class(const void *self) { +static unsigned TEMPLATE_get_n_reg_class(void) +{ return N_CLASSES; } -static const arch_register_class_t *TEMPLATE_get_reg_class(const void *self, int i) { - assert(i >= 0 && i < N_CLASSES && "Invalid TEMPLATE register class requested."); +static const arch_register_class_t *TEMPLATE_get_reg_class(unsigned i) +{ + assert(i < N_CLASSES); return &TEMPLATE_reg_classes[i]; } -static const void *TEMPLATE_get_irn_ops(const arch_irn_handler_t *self, const ir_node *irn) { - return &TEMPLATE_irn_ops; + + +/** + * Get the register class which shall be used to store a value of a given mode. + * @param self The this pointer. + * @param mode The mode in question. + * @return A register class which can hold values of the given mode. + */ +static const arch_register_class_t *TEMPLATE_get_reg_class_for_mode(const ir_mode *mode) +{ + if (mode_is_float(mode)) + return &TEMPLATE_reg_classes[CLASS_TEMPLATE_fp]; + else + return &TEMPLATE_reg_classes[CLASS_TEMPLATE_gp]; +} + + + +typedef struct { + be_abi_call_flags_bits_t flags; + const arch_env_t *arch_env; + ir_graph *irg; +} TEMPLATE_abi_env_t; + +static void *TEMPLATE_abi_init(const be_abi_call_t *call, const arch_env_t *arch_env, ir_graph *irg) +{ + TEMPLATE_abi_env_t *env = XMALLOC(TEMPLATE_abi_env_t); + be_abi_call_flags_t fl = be_abi_call_get_flags(call); + env->flags = fl.bits; + env->irg = irg; + env->arch_env = arch_env; + return env; +} + +/** + * Get the between type for that call. + * @param self The callback object. + * @return The between type of for that call. + */ +static ir_type *TEMPLATE_get_between_type(void *self) +{ + static ir_type *between_type = NULL; + static ir_entity *old_bp_ent = NULL; + (void) self; + + if (!between_type) { + ir_entity *ret_addr_ent; + ir_type *ret_addr_type = new_type_primitive(mode_P); + ir_type *old_bp_type = new_type_primitive(mode_P); + + between_type = new_type_class(new_id_from_str("TEMPLATE_between_type")); + old_bp_ent = new_entity(between_type, new_id_from_str("old_bp"), old_bp_type); + ret_addr_ent = new_entity(between_type, new_id_from_str("old_bp"), ret_addr_type); + + set_entity_offset(old_bp_ent, 0); + set_entity_offset(ret_addr_ent, get_type_size_bytes(old_bp_type)); + set_type_size_bytes(between_type, get_type_size_bytes(old_bp_type) + get_type_size_bytes(ret_addr_type)); + } + + return between_type; +} + +/** + * Build the prolog, return the BASE POINTER register + */ +static const arch_register_t *TEMPLATE_abi_prologue(void *self, ir_node **mem, + pmap *reg_map, int *stack_bias) +{ + TEMPLATE_abi_env_t *env = self; + (void) reg_map; + (void) mem; + (void) stack_bias; + + if (env->flags.try_omit_fp) + return env->arch_env->sp; + return env->arch_env->bp; +} + +/* Build the epilog */ +static void TEMPLATE_abi_epilogue(void *self, ir_node *bl, ir_node **mem, + pmap *reg_map) +{ + (void) self; + (void) bl; + (void) mem; + (void) reg_map; } -const arch_irn_handler_t TEMPLATE_irn_handler = { - TEMPLATE_get_irn_ops +static const be_abi_callbacks_t TEMPLATE_abi_callbacks = { + TEMPLATE_abi_init, + free, + TEMPLATE_get_between_type, + TEMPLATE_abi_prologue, + TEMPLATE_abi_epilogue, }; -const arch_irn_handler_t *TEMPLATE_get_irn_handler(const void *self) { - return &TEMPLATE_irn_handler; +/** + * Get the ABI restrictions for procedure calls. + * @param self The this pointer. + * @param method_type The type of the method (procedure) in question. + * @param abi The abi object to be modified + */ +static void TEMPLATE_get_call_abi(const void *self, ir_type *method_type, + be_abi_call_t *abi) +{ + ir_type *tp; + ir_mode *mode; + int i, n = get_method_n_params(method_type); + be_abi_call_flags_t call_flags; + (void) self; + + /* set abi flags for calls */ + call_flags.bits.left_to_right = 0; + call_flags.bits.store_args_sequential = 1; + call_flags.bits.try_omit_fp = 1; + call_flags.bits.fp_free = 0; + call_flags.bits.call_has_imm = 1; + + /* set stack parameter passing style */ + be_abi_call_set_flags(abi, call_flags, &TEMPLATE_abi_callbacks); + + for (i = 0; i < n; i++) { + /* TODO: implement register parameter: */ + /* reg = get reg for param i; */ + /* be_abi_call_param_reg(abi, i, reg, ABI_CONTEXT_BOTH); */ + + /* default: all parameters on stack */ + tp = get_method_param_type(method_type, i); + mode = get_type_mode(tp); + be_abi_call_param_stack(abi, i, mode, 4, 0, 0, ABI_CONTEXT_BOTH); + } + + /* TODO: set correct return register */ + /* default: return value is in R0 resp. F0 */ + if (get_method_n_ress(method_type) > 0) { + tp = get_method_res_type(method_type, 0); + mode = get_type_mode(tp); + + be_abi_call_res_reg(abi, 0, + mode_is_float(mode) ? &TEMPLATE_fp_regs[REG_F0] : &TEMPLATE_gp_regs[REG_R0], ABI_CONTEXT_BOTH); + } } -int TEMPLATE_to_appear_in_schedule(void *block_env, const ir_node *irn) { - return is_TEMPLATE_irn(irn); +static int TEMPLATE_to_appear_in_schedule(void *block_env, const ir_node *irn) +{ + (void) block_env; + + if (!is_TEMPLATE_irn(irn)) + return -1; + + return 1; } /** * Initializes the code generator interface. */ -static const arch_code_generator_if_t *TEMPLATE_get_code_generator_if(void *self) { +static const arch_code_generator_if_t *TEMPLATE_get_code_generator_if( + void *self) +{ + (void) self; return &TEMPLATE_code_gen_if; } @@ -468,27 +417,114 @@ list_sched_selector_t TEMPLATE_sched_selector; /** * Returns the reg_pressure scheduler with to_appear_in_schedule() overloaded */ -static const list_sched_selector_t *TEMPLATE_get_list_sched_selector(const void *self) { - memcpy(&TEMPLATE_sched_selector, trivial_selector, sizeof(list_sched_selector_t)); +static const list_sched_selector_t *TEMPLATE_get_list_sched_selector( + const void *self, list_sched_selector_t *selector) +{ + (void) self; + (void) selector; + + TEMPLATE_sched_selector = trivial_selector; TEMPLATE_sched_selector.to_appear_in_schedule = TEMPLATE_to_appear_in_schedule; return &TEMPLATE_sched_selector; } -#ifdef WITH_LIBCORE -static void TEMPLATE_register_options(lc_opt_entry_t *ent) +static const ilp_sched_selector_t *TEMPLATE_get_ilp_sched_selector( + const void *self) +{ + (void) self; + return NULL; +} + +/** + * Returns the necessary byte alignment for storing a register of given class. + */ +static int TEMPLATE_get_reg_class_alignment(const arch_register_class_t *cls) +{ + ir_mode *mode = arch_register_class_mode(cls); + return get_mode_size_bytes(mode); +} + +/** + * Returns the libFirm configuration parameter for this backend. + */ +static const backend_params *TEMPLATE_get_backend_params(void) +{ + static backend_params p = { + 0, /* no dword lowering */ + 0, /* no inline assembly */ + NULL, /* will be set later */ + NULL, /* no creator function */ + NULL, /* context for create_intrinsic_fkt */ + NULL, /* parameter for if conversion */ + NULL, /* float arithmetic mode */ + 0, /* no trampoline support: size 0 */ + 0, /* no trampoline support: align 0 */ + NULL, /* no trampoline support: no trampoline builder */ + 4 /* alignment of stack parameter: typically 4 (32bit) or 8 (64bit) */ + }; + return &p; +} + +static const be_execution_unit_t ***TEMPLATE_get_allowed_execution_units( + const ir_node *irn) +{ + (void) irn; + /* TODO */ + return NULL; +} + +static const be_machine_t *TEMPLATE_get_machine(const void *self) +{ + (void) self; + /* TODO */ + return NULL; +} + +static ir_graph **TEMPLATE_get_backend_irg_list(const void *self, + ir_graph ***irgs) +{ + (void) self; + (void) irgs; + return NULL; +} + +static asm_constraint_flags_t TEMPLATE_parse_asm_constraint(const char **c) { + (void) c; + return ASM_CONSTRAINT_FLAG_INVALID; +} + +static int TEMPLATE_is_valid_clobber(const char *clobber) +{ + (void) clobber; + return 0; } -#endif /* WITH_LIBCORE */ const arch_isa_if_t TEMPLATE_isa_if = { -#ifdef WITH_LIBCORE - TEMPLATE_register_options, -#endif TEMPLATE_init, TEMPLATE_done, + NULL, /* handle intrinsics */ TEMPLATE_get_n_reg_class, TEMPLATE_get_reg_class, - TEMPLATE_get_irn_handler, + TEMPLATE_get_reg_class_for_mode, + TEMPLATE_get_call_abi, TEMPLATE_get_code_generator_if, TEMPLATE_get_list_sched_selector, + TEMPLATE_get_ilp_sched_selector, + TEMPLATE_get_reg_class_alignment, + TEMPLATE_get_backend_params, + TEMPLATE_get_allowed_execution_units, + TEMPLATE_get_machine, + TEMPLATE_get_backend_irg_list, + NULL, /* mark remat */ + TEMPLATE_parse_asm_constraint, + TEMPLATE_is_valid_clobber }; + +BE_REGISTER_MODULE_CONSTRUCTOR(be_init_arch_TEMPLATE); +void be_init_arch_TEMPLATE(void) +{ + be_register_isa_if("TEMPLATE", &TEMPLATE_isa_if); + FIRM_DBG_REGISTER(dbg, "firm.be.TEMPLATE.cg"); + TEMPLATE_init_transform(); +}