X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=arch%2Fx86_64%2Fatomic.h;h=7690183d010c7f073a80ad1f1848ded488dfc593;hb=6fef8cafbd0f6f185897bc87feb1ff66e2e204e1;hp=e74e45352574859ed06fbfea614750068846c623;hpb=1e12632591ab98a6ea3af8680716c28282552981;p=musl

diff --git a/arch/x86_64/atomic.h b/arch/x86_64/atomic.h
index e74e4535..7690183d 100644
--- a/arch/x86_64/atomic.h
+++ b/arch/x86_64/atomic.h
@@ -1,37 +1,35 @@
-#ifndef _INTERNAA_ATOMIC_H
-#define _INTERNAA_ATOMIC_H
+#ifndef _INTERNAL_ATOMIC_H
+#define _INTERNAL_ATOMIC_H
 
 #include <stdint.h>
 
 static inline int a_ctz_64(uint64_t x)
 {
-	int r;
-	__asm__( "bsf %1,%0 ; jnz 1f ; bsf %2,%0 ; addl $32,%0\n1:"
-		: "=r"(r) : "r"((unsigned)x), "r"((unsigned)(x>>32)) );
-	return r;
+	__asm__( "bsf %1,%0" : "=r"(x) : "r"(x) );
+	return x;
 }
 
-
-static inline void a_and_64(volatile uint64_t *p, uint64_t v)
+static inline int a_ctz_l(unsigned long x)
 {
-	__asm__( "lock ; andl %1, (%0) ; lock ; andl %2, 4(%0)"
-		: : "r"((long *)p), "r"((unsigned)v), "r"((unsigned)(v>>32)) : "memory" );
+	__asm__( "bsf %1,%0" : "=r"(x) : "r"(x) );
+	return x;
 }
 
-static inline void a_or_64(volatile uint64_t *p, uint64_t v)
+static inline void a_and_64(volatile uint64_t *p, uint64_t v)
 {
-	__asm__( "lock ; orl %1, (%0) ; lock ; orl %2, 4(%0)"
-		: : "r"((long *)p), "r"((unsigned)v), "r"((unsigned)(v>>32)) : "memory" );
+	__asm__( "lock ; and %1, %0"
+			 : "=m"(*p) : "r"(v) : "memory" );
 }
 
-static inline void a_store_l(volatile void *p, long x)
+static inline void a_or_64(volatile uint64_t *p, uint64_t v)
 {
-	__asm__( "movl %1, %0" : "=m"(*(long *)p) : "r"(x) : "memory" );
+	__asm__( "lock ; or %1, %0"
+			 : "=m"(*p) : "r"(v) : "memory" );
 }
 
 static inline void a_or_l(volatile void *p, long v)
 {
-	__asm__( "lock ; orl %1, %0"
+	__asm__( "lock ; or %1, %0"
 		: "=m"(*(long *)p) : "r"(v) : "memory" );
 }
 
@@ -42,34 +40,23 @@ static inline void *a_cas_p(volatile void *p, void *t, void *s)
 	return t;
 }
 
-static inline long a_cas_l(volatile void *p, long t, long s)
+static inline int a_cas(volatile int *p, int t, int s)
 {
 	__asm__( "lock ; cmpxchg %3, %1"
-		: "=a"(t), "=m"(*(long *)p) : "a"(t), "r"(s) : "memory" );
+		: "=a"(t), "=m"(*p) : "a"(t), "r"(s) : "memory" );
 	return t;
 }
 
-static inline void *a_swap_p(void *volatile *x, void *v)
-{
-	__asm__( "xchg %0, %1" : "=r"(v), "=m"(*(void **)x) : "0"(v) : "memory" );
-	return v;
-}
-static inline long a_swap_l(volatile void *x, long v)
-{
-	__asm__( "xchg %0, %1" : "=r"(v), "=m"(*(long *)x) : "0"(v) : "memory" );
-	return v;
-}
-
-static inline void a_or(volatile void *p, int v)
+static inline void a_or(volatile int *p, int v)
 {
-	__asm__( "lock ; orl %1, %0"
-		: "=m"(*(int *)p) : "r"(v) : "memory" );
+	__asm__( "lock ; or %1, %0"
+		: "=m"(*p) : "r"(v) : "memory" );
 }
 
-static inline void a_and(volatile void *p, int v)
+static inline void a_and(volatile int *p, int v)
 {
-	__asm__( "lock ; andl %1, %0"
-		: "=m"(*(int *)p) : "r"(v) : "memory" );
+	__asm__( "lock ; and %1, %0"
+		: "=m"(*p) : "r"(v) : "memory" );
 }
 
 static inline int a_swap(volatile int *x, int v)
@@ -78,8 +65,6 @@ static inline int a_swap(volatile int *x, int v)
 	return v;
 }
 
-#define a_xchg a_swap
-
 static inline int a_fetch_add(volatile int *x, int v)
 {
 	__asm__( "lock ; xadd %0, %1" : "=r"(v), "=m"(*x) : "0"(v) : "memory" );
@@ -98,7 +83,7 @@ static inline void a_dec(volatile int *x)
 
 static inline void a_store(volatile int *p, int x)
 {
-	__asm__( "movl %1, %0" : "=m"(*p) : "r"(x) : "memory" );
+	__asm__( "mov %1, %0 ; lock ; orl $0,(%%rsp)" : "=m"(*p) : "r"(x) : "memory" );
 }
 
 static inline void a_spin()
@@ -106,5 +91,15 @@ static inline void a_spin()
 	__asm__ __volatile__( "pause" : : : "memory" );
 }
 
+static inline void a_barrier()
+{
+	__asm__ __volatile__( "" : : : "memory" );
+}
+
+static inline void a_crash()
+{
+	__asm__ __volatile__( "hlt" : : : "memory" );
+}
+
 
 #endif