X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;ds=sidebyside;f=ir%2Fbe%2Fppc32%2Fbearch_ppc32.c;h=f6234599bf5becc9d6e792c2835fa21c78986f50;hb=205396c4f4f5abe7abd6dc2350c8c398a7623afc;hp=8bbe55318ef026ede1848e2070bd8fca7a3c1fdd;hpb=3fbdb6259cfddf9af895da3207d92571bb92b705;p=libfirm diff --git a/ir/be/ppc32/bearch_ppc32.c b/ir/be/ppc32/bearch_ppc32.c index 8bbe55318..f6234599b 100644 --- a/ir/be/ppc32/bearch_ppc32.c +++ b/ir/be/ppc32/bearch_ppc32.c @@ -1,6 +1,5 @@ /* The main ppc backend driver file. */ /* $Id$ */ - #ifdef HAVE_CONFIG_H #include "config.h" #endif @@ -16,13 +15,16 @@ #include "bitset.h" #include "debug.h" -#include "../bearch.h" /* the general register allocator interface */ +#include "../bearch_t.h" /* the general register allocator interface */ #include "../benode_t.h" #include "../belower.h" #include "../besched_t.h" #include "../be.h" #include "../beabi.h" #include "../bemachine.h" +#include "../bemodule.h" +#include "../beblocksched.h" +#include "../beirg_t.h" #include "pset.h" @@ -55,31 +57,26 @@ static set *cur_reg_set = NULL; * |___/ **************************************************/ -static ir_node *my_skip_proj(const ir_node *n) { - while (is_Proj(n)) - n = get_Proj_pred(n); - return (ir_node *)n; -} - /** * Return register requirements for a ppc node. * If the node returns a tuple (mode_T) then the proj's * will be asked for this information. */ -static const arch_register_req_t *ppc32_get_irn_reg_req(const void *self, arch_register_req_t *req, const ir_node *irn, int pos) { - const ppc32_register_req_t *irn_req; +static const +arch_register_req_t *ppc32_get_irn_reg_req(const void *self, + const ir_node *irn, int pos) { long node_pos = pos == -1 ? 0 : pos; ir_mode *mode = get_irn_mode(irn); FIRM_DBG_REGISTER(firm_dbg_module_t *mod, DEBUG_MODULE); if (is_Block(irn) || mode == mode_X || mode == mode_M) { DBG((mod, LEVEL_1, "ignoring block, mode_X or mode_M node %+F\n", irn)); - return NULL; + return arch_no_register_req; } if (mode == mode_T && pos < 0) { DBG((mod, LEVEL_1, "ignoring request for OUT requirements at %+F", irn)); - return NULL; + return arch_no_register_req; } DBG((mod, LEVEL_1, "get requirements at pos %d for %+F ... ", pos, irn)); @@ -89,66 +86,33 @@ static const arch_register_req_t *ppc32_get_irn_reg_req(const void *self, arch_r /* of the node corresponding to the proj number */ if (pos == -1) { node_pos = ppc32_translate_proj_pos(irn); - } - else { + } else { node_pos = pos; } - irn = my_skip_proj(irn); + irn = skip_Proj_const(irn); DB((mod, LEVEL_1, "skipping Proj, going to %+F at pos %d ... ", irn, node_pos)); } /* get requirements for our own nodes */ if (is_ppc32_irn(irn)) { + const arch_register_req_t *req; if (pos >= 0) { - irn_req = get_ppc32_in_req(irn, pos); - } - else { - irn_req = get_ppc32_out_req(irn, node_pos); + req = get_ppc32_in_req(irn, pos); + } else { + req = get_ppc32_out_req(irn, node_pos); } DB((mod, LEVEL_1, "returning reqs for %+F at pos %d\n", irn, pos)); - - memcpy(req, &(irn_req->req), sizeof(*req)); - - if (arch_register_req_is(&(irn_req->req), should_be_same)) { - assert(irn_req->same_pos >= 0 && "should be same constraint for in -> out NYI"); - req->other_same = get_irn_n(irn, irn_req->same_pos); - } - - if (arch_register_req_is(&(irn_req->req), should_be_different)) { - assert(irn_req->different_pos >= 0 && "should be different constraint for in -> out NYI"); - req->other_different = get_irn_n(irn, irn_req->different_pos); - } + return req; } - /* get requirements for FIRM nodes */ - else { - /* treat Phi like Const with default requirements */ - if (is_Phi(irn)) { - DB((mod, LEVEL_1, "returning standard reqs for %+F\n", irn)); - if (mode_is_float(mode)) { - memcpy(req, &(ppc32_default_req_ppc32_fp.req), sizeof(*req)); - } - else if (mode_is_int(mode) || mode_is_reference(mode)) { - memcpy(req, &(ppc32_default_req_ppc32_gp.req), sizeof(*req)); - } - else if (mode == mode_T || mode == mode_M) { - DBG((mod, LEVEL_1, "ignoring Phi node %+F\n", irn)); - return NULL; - } - else { - assert(0 && "unsupported Phi-Mode"); - } - } - else { - DB((mod, LEVEL_1, "returning NULL for %+F (node not supported)\n", irn)); - req = NULL; - } - } + /* unknowns should be transformed by now */ + assert(!is_Unknown(irn)); - return req; + DB((mod, LEVEL_1, "returning NULL for %+F (node not supported)\n", irn)); + return arch_no_register_req; } static void ppc32_set_irn_reg(const void *self, ir_node *irn, const arch_register_t *reg) { @@ -161,7 +125,7 @@ static void ppc32_set_irn_reg(const void *self, ir_node *irn, const arch_registe } pos = ppc32_translate_proj_pos(irn); - irn = my_skip_proj(irn); + irn = skip_Proj(irn); } if (is_ppc32_irn(irn)) { @@ -187,7 +151,7 @@ static const arch_register_t *ppc32_get_irn_reg(const void *self, const ir_node } pos = ppc32_translate_proj_pos(irn); - irn = my_skip_proj(irn); + irn = skip_Proj_const(irn); } if (is_ppc32_irn(irn)) { @@ -203,7 +167,7 @@ static const arch_register_t *ppc32_get_irn_reg(const void *self, const ir_node } static arch_irn_class_t ppc32_classify(const void *self, const ir_node *irn) { - irn = my_skip_proj(irn); + irn = skip_Proj_const(irn); if (is_cfop(irn)) { return arch_irn_class_branch; @@ -216,7 +180,7 @@ static arch_irn_class_t ppc32_classify(const void *self, const ir_node *irn) { } static arch_irn_flags_t ppc32_get_flags(const void *self, const ir_node *irn) { - irn = my_skip_proj(irn); + irn = skip_Proj_const(irn); if (is_ppc32_irn(irn)) { return get_ppc32_flags(irn); @@ -234,7 +198,7 @@ static ir_entity *ppc32_get_frame_entity(const void *self, const ir_node *irn) { return get_ppc32_frame_entity(irn); } -static void ppc32_set_frame_entity(const void *self, const ir_node *irn, ir_entity *ent) { +static void ppc32_set_frame_entity(const void *self, ir_node *irn, ir_entity *ent) { if (! is_ppc32_irn(irn) || get_ppc32_type(irn) != ppc32_ac_FrameEntity) return; set_ppc32_frame_entity(irn, ent); @@ -471,7 +435,7 @@ static void ppc32_before_sched(void *self) { */ static void ppc32_before_ra(void *self) { ppc32_code_gen_t *cg = self; - cg->blk_sched = sched_create_block_schedule(cg->irg, cg->birg->exec_freq); + cg->blk_sched = be_create_block_schedule(cg->irg, cg->birg->exec_freq); } static void ppc32_transform_spill(ir_node *node, void *env) @@ -606,7 +570,7 @@ void ppc32_collect_symconsts_walk(ir_node *node, void *env) { } } -static void *ppc32_cg_init(const be_irg_t *birg); +static void *ppc32_cg_init(be_irg_t *birg); static const arch_code_generator_if_t ppc32_code_gen_if = { ppc32_cg_init, @@ -623,7 +587,7 @@ static const arch_code_generator_if_t ppc32_code_gen_if = { /** * Initializes the code generator. */ -static void *ppc32_cg_init(const be_irg_t *birg) { +static void *ppc32_cg_init(be_irg_t *birg) { ppc32_isa_t *isa = (ppc32_isa_t *)birg->main_env->arch_env->isa; ppc32_code_gen_t *cg = xmalloc(sizeof(*cg)); @@ -882,6 +846,13 @@ static const be_machine_t *ppc32_get_machine(const void *self) { return NULL; } +/** + * Return irp irgs in the desired order. + */ +static ir_graph **ppc32_get_irg_list(const void *self, ir_graph ***irg_list) { + return NULL; +} + /** * Returns the libFirm configuration parameter for this backend. */ @@ -906,12 +877,6 @@ static const backend_params *ppc32_get_libfirm_params(void) { return &p; } -#ifdef WITH_LIBCORE -static void ppc32_register_options(lc_opt_entry_t *ent) -{ -} -#endif /* WITH_LIBCORE */ - const arch_isa_if_t ppc32_isa_if = { ppc32_init, ppc32_done, @@ -927,7 +892,12 @@ const arch_isa_if_t ppc32_isa_if = { ppc32_get_libfirm_params, ppc32_get_allowed_execution_units, ppc32_get_machine, -#ifdef WITH_LIBCORE - ppc32_register_options -#endif + ppc32_get_irg_list, }; + +void be_init_arch_ppc32(void) +{ + be_register_isa_if("ppc32", &ppc32_isa_if); +} + +BE_REGISTER_MODULE_CONSTRUCTOR(be_init_arch_ppc32);