X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;ds=sidebyside;f=ir%2Fbe%2Fia32%2Fia32_spec.pl;h=ffcb5e7f73a2dc723028e29b6ec06d8f9a6ab7fe;hb=aef4d3b28b21856e05c0bd91552b51b69ed5ac50;hp=51ba13bf5a9e116ddad8d9e422b7bbcdc91dadac;hpb=8e779d23665105e51f6278f7ed461019bef813af;p=libfirm

diff --git a/ir/be/ia32/ia32_spec.pl b/ir/be/ia32/ia32_spec.pl
index 51ba13bf5..ffcb5e7f7 100644
--- a/ir/be/ia32/ia32_spec.pl
+++ b/ir/be/ia32/ia32_spec.pl
@@ -333,7 +333,7 @@ Immediate => {
 	op_flags  => "c",
 	irn_flags => "I",
 	reg_req   => { out => [ "gp_NOREG" ] },
-	attr      => "ir_entity *symconst, int symconst_sign, tarval *offset",
+	attr      => "ir_entity *symconst, int symconst_sign, long offset",
 	attr_type => "ia32_immediate_attr_t",
 	mode      => $mode_gp,
 },
@@ -891,7 +891,7 @@ ChangeCW => {
 
 FldCW => {
 	op_flags  => "L|F",
-	state     => "exc_pinned",
+	state     => "pinned",
 	reg_req   => { in => [ "gp", "gp", "none" ], out => [ "fp_cw" ] },
 	latency   => 5,
 	emit      => ". fldcw %AM",
@@ -902,7 +902,7 @@ FldCW => {
 
 FnstCW => {
 	op_flags  => "L|F",
-	state     => "exc_pinned",
+	state     => "pinned",
 	reg_req   => { in => [ "gp", "gp", "fp_cw", "none" ], out => [ "none" ] },
 	latency   => 5,
 	emit      => ". fnstcw %AM",
@@ -913,19 +913,23 @@ FnstCW => {
 Cltd => {
 	# we should not rematrialize this node. It produces 2 results and has
 	# very strict constrains
-	reg_req   => { in => [ "gp" ], out => [ "eax in_r1", "edx" ] },
+	reg_req   => { in => [ "eax" ], out => [ "edx" ] },
+	ins       => [ "val" ],
 	emit      => '. cltd',
-	outs      => [ "EAX", "EDX" ],
+	mode      => $mode_gp,
 	units     => [ "GP" ],
 },
 
 # Load / Store
+#
+# Note that we add additional latency values depending on address mode, so a
+# lateny of 0 for load is correct
 
 Load => {
 	op_flags  => "L|F",
 	state     => "exc_pinned",
 	reg_req   => { in => [ "gp", "gp", "none" ], out => [ "gp", "none" ] },
-	latency   => 3,
+	latency   => 0,
 	emit      => ". mov%SE%ME%.l %AM, %D0",
 	outs      => [ "res", "M" ],
 	units     => [ "GP" ],
@@ -951,7 +955,7 @@ Store => {
 	state     => "exc_pinned",
 	reg_req   => { in => [ "gp", "gp", "gp", "none" ], out => [ "none" ] },
 	emit      => '. mov%M %binop',
-	latency   => 3,
+	latency   => 2,
 	units     => [ "GP" ],
 	mode      => "mode_M",
 },
@@ -961,7 +965,7 @@ Store8Bit => {
 	state     => "exc_pinned",
 	reg_req   => { in => [ "gp", "gp", "eax ebx ecx edx", "none" ], out => ["none" ] },
 	emit      => '. mov%M %binop',
-	latency   => 3,
+	latency   => 2,
 	units     => [ "GP" ],
 	mode      => "mode_M",
 },
@@ -981,7 +985,7 @@ Push => {
 	emit      => '. push%M %unop2',
 	ins       => [ "base", "index", "val", "stack", "mem" ],
 	outs      => [ "stack:I|S", "M" ],
-	latency   => 3,
+	latency   => 2,
 	units     => [ "GP" ],
 	modified_flags => [],
 },
@@ -991,7 +995,7 @@ Pop => {
 	emit      => '. pop%M %DAM1',
 	outs      => [ "stack:I|S", "res", "M" ],
 	ins       => [ "base", "index", "stack", "mem" ],
-	latency   => 4,
+	latency   => 3, # Pop is more expensive than Push on Athlon
 	units     => [ "GP" ],
 	modified_flags => [],
 },
@@ -1246,7 +1250,7 @@ l_SSEtoX87 => {
 GetST0 => {
 	op_flags => "L|F",
 	irn_flags => "I",
-	state    => "exc_pinned",
+	state    => "pinned",
 	reg_req  => { in => [ "gp", "gp", "none" ] },
 	emit     => '. fstp%XM %AM',
 	latency  => 4,
@@ -1257,7 +1261,7 @@ GetST0 => {
 SetST0 => {
 	op_flags => "L|F",
 	irn_flags => "I",
-	state    => "exc_pinned",
+	state    => "pinned",
 	reg_req  => { in => [ "gp", "gp", "none" ], out => [ "vf0", "none" ] },
 	ins      => [ "base", "index", "mem" ],
 	emit     => '. fld%XM %AM',
@@ -1406,7 +1410,8 @@ vfCMov => {
 
 vfadd => {
 	irn_flags => "R",
-	reg_req   => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "vfp" ] },
+	reg_req   => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp" ] },
+	ins       => [ "base", "index", "left", "right", "mem", "fpcw" ],
 	latency   => 4,
 	units     => [ "VFP" ],
 	mode      => "mode_E",
@@ -1415,7 +1420,8 @@ vfadd => {
 
 vfmul => {
 	irn_flags => "R",
-	reg_req   => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "vfp" ] },
+	reg_req   => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp" ] },
+	ins       => [ "base", "index", "left", "right", "mem", "fpcw" ],
 	latency   => 4,
 	units     => [ "VFP" ],
 	mode      => "mode_E",
@@ -1430,7 +1436,8 @@ l_vfmul => {
 
 vfsub => {
 	irn_flags => "R",
-	reg_req   => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "vfp" ] },
+	reg_req   => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp" ] },
+	ins       => [ "base", "index", "left", "right", "mem", "fpcw" ],
 	latency   => 4,
 	units     => [ "VFP" ],
 	mode      => "mode_E",
@@ -1443,7 +1450,8 @@ l_vfsub => {
 },
 
 vfdiv => {
-	reg_req   => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "vfp", "none" ] },
+	reg_req   => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp", "none" ] },
+	ins       => [ "base", "index", "left", "right", "mem", "fpcw" ],
 	outs      => [ "res", "M" ],
 	latency   => 20,
 	units     => [ "VFP" ],
@@ -1457,7 +1465,8 @@ l_vfdiv => {
 },
 
 vfprem => {
-	reg_req   => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "vfp" ] },
+	reg_req   => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp" ] },
+	ins       => [ "base", "index", "left", "right", "mem", "fpcw" ],
 	latency   => 20,
 	units     => [ "VFP" ],
 	mode      => "mode_E",
@@ -1472,6 +1481,7 @@ l_vfprem => {
 vfabs => {
 	irn_flags => "R",
 	reg_req   => { in => [ "vfp"], out => [ "vfp" ] },
+	ins       => [ "value" ],
 	latency   => 2,
 	units     => [ "VFP" ],
 	mode      => "mode_E",
@@ -1481,46 +1491,23 @@ vfabs => {
 vfchs => {
 	irn_flags => "R",
 	reg_req   => { in => [ "vfp"], out => [ "vfp" ] },
+	ins       => [ "value" ],
 	latency   => 2,
 	units     => [ "VFP" ],
 	mode      => "mode_E",
 	attr_type => "ia32_x87_attr_t",
 },
 
-vfsin => {
-	irn_flags => "R",
-	reg_req   => { in => [ "vfp"], out => [ "vfp" ] },
-	latency   => 150,
-	units     => [ "VFP" ],
-	mode      => "mode_E",
-	attr_type => "ia32_x87_attr_t",
-},
-
-vfcos => {
-	irn_flags => "R",
-	reg_req   => { in => [ "vfp"], out => [ "vfp" ] },
-	latency   => 150,
-	units     => [ "VFP" ],
-	mode      => "mode_E",
-	attr_type => "ia32_x87_attr_t",
-},
-
-vfsqrt => {
-	irn_flags => "R",
-	reg_req   => { in => [ "vfp"], out => [ "vfp" ] },
-	latency   => 30,
-	units     => [ "VFP" ],
-	mode      => "mode_E",
-	attr_type => "ia32_x87_attr_t",
-},
-
 # virtual Load and Store
 
 vfld => {
 	op_flags  => "L|F",
 	state     => "exc_pinned",
 	reg_req   => { in => [ "gp", "gp", "none" ], out => [ "vfp", "none" ] },
+	ins       => [ "base", "index", "mem" ],
 	outs      => [ "res", "M" ],
+	attr      => "ir_mode *store_mode",
+	init_attr => "attr->attr.ls_mode = store_mode;",
 	latency   => 2,
 	units     => [ "VFP" ],
 	attr_type => "ia32_x87_attr_t",
@@ -1530,6 +1517,9 @@ vfst => {
 	op_flags  => "L|F",
 	state     => "exc_pinned",
 	reg_req   => { in => [ "gp", "gp", "vfp", "none" ] },
+	ins       => [ "base", "index", "val", "mem" ],
+	attr      => "ir_mode *store_mode",
+	init_attr => "attr->attr.ls_mode = store_mode;",
 	latency   => 2,
 	units     => [ "VFP" ],
 	mode      => "mode_M",
@@ -1539,8 +1529,10 @@ vfst => {
 # Conversions
 
 vfild => {
+	state     => "exc_pinned",
 	reg_req   => { in => [ "gp", "gp", "none" ], out => [ "vfp", "none" ] },
 	outs      => [ "res", "M" ],
+	ins       => [ "base", "index", "mem" ],
 	latency   => 4,
 	units     => [ "VFP" ],
 	attr_type => "ia32_x87_attr_t",
@@ -1553,8 +1545,9 @@ l_vfild => {
 },
 
 vfist => {
-	reg_req   => { in => [ "gp", "gp", "vfp", "fpcw", "none" ] },
 	state     => "exc_pinned",
+	reg_req   => { in => [ "gp", "gp", "vfp", "fpcw", "none" ] },
+	ins       => [ "base", "index", "val", "fpcw", "mem" ],
 	latency   => 4,
 	units     => [ "VFP" ],
 	mode      => "mode_M",
@@ -1803,30 +1796,6 @@ fchs => {
 	attr_type => "ia32_x87_attr_t",
 },
 
-fsin => {
-	op_flags  => "R",
-	rd_constructor => "NONE",
-	reg_req   => { },
-	emit      => '. fsin',
-	attr_type => "ia32_x87_attr_t",
-},
-
-fcos => {
-	op_flags  => "R",
-	rd_constructor => "NONE",
-	reg_req   => { },
-	emit      => '. fcos',
-	attr_type => "ia32_x87_attr_t",
-},
-
-fsqrt => {
-	op_flags  => "R",
-	rd_constructor => "NONE",
-	reg_req   => { },
-	emit      => '. fsqrt $',
-	attr_type => "ia32_x87_attr_t",
-},
-
 # x87 Load and Store
 
 fld => {