X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;ds=sidebyside;f=ir%2Fbe%2Fia32%2Fia32_new_nodes.c;h=e3ddcf61fc431a42fa5beecec827159085f4e8be;hb=c1fdf770d4d000dd5cf22daead32369342c5f5d1;hp=7ff8c49b5cfff40643f5f626c17dbda310bd0fb1;hpb=fd07b1498438629b4ef81343573377e3e535048f;p=libfirm

diff --git a/ir/be/ia32/ia32_new_nodes.c b/ir/be/ia32/ia32_new_nodes.c
index 7ff8c49b5..e3ddcf61f 100644
--- a/ir/be/ia32/ia32_new_nodes.c
+++ b/ir/be/ia32/ia32_new_nodes.c
@@ -26,9 +26,7 @@
  * This file implements the creation of the achitecture specific firm opcodes
  * and the corresponding node constructors for the ia32 assembler irg.
  */
-#ifdef HAVE_CONFIG_H
 #include "config.h"
-#endif
 
 #include <stdlib.h>
 
@@ -190,10 +188,9 @@ static int ia32_dump_node(ir_node *n, FILE *F, dump_reason_t reason) {
 			break;
 
 		case dump_node_mode_txt:
-			if (is_ia32_Ld(n) || is_ia32_St(n)) {
-				mode = get_ia32_ls_mode(n);
-				fprintf(F, "[%s]", mode ? get_mode_name(mode) : "?NOMODE?");
-			}
+			mode = get_ia32_ls_mode(n);
+			if (mode != NULL)
+				fprintf(F, "[%s]", get_mode_name(mode));
 			break;
 
 		case dump_node_nodeattr_txt:
@@ -972,54 +969,6 @@ int is_ia32_AddrModeD(const ir_node *node) {
 	return (attr->data.tp == ia32_AddrModeD);
 }
 
-/**
- * Checks if node is a Load or xLoad/vfLoad.
- */
-int is_ia32_Ld(const ir_node *node) {
-	int op = get_ia32_irn_opcode(node);
-	return op == iro_ia32_Load ||
-	       op == iro_ia32_xLoad ||
-	       op == iro_ia32_vfld ||
-	       op == iro_ia32_fld;
-}
-
-/**
- * Checks if node is a Store or xStore/vfStore.
- */
-int is_ia32_St(const ir_node *node) {
-	int op = get_ia32_irn_opcode(node);
-	return op == iro_ia32_Store ||
-	       op == iro_ia32_Store8Bit ||
-	       op == iro_ia32_xStore ||
-	       op == iro_ia32_vfst ||
-	       op == iro_ia32_fst ||
-	       op == iro_ia32_fstp;
-}
-
-/**
- * Returns the name of the OUT register at position pos.
- */
-const char *get_ia32_out_reg_name(const ir_node *node, int pos) {
-	const ia32_attr_t *attr = get_ia32_attr_const(node);
-
-	assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
-	assert(attr->slots[pos]  && "No register assigned");
-
-	return arch_register_get_name(attr->slots[pos]);
-}
-
-/**
- * Returns the index of the OUT register at position pos within its register class.
- */
-int get_ia32_out_regnr(const ir_node *node, int pos) {
-	const ia32_attr_t *attr = get_ia32_attr_const(node);
-
-	assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
-	assert(attr->slots[pos]  && "No register assigned");
-
-	return arch_register_get_index(attr->slots[pos]);
-}
-
 void ia32_swap_left_right(ir_node *node)
 {
 	ia32_attr_t *attr  = get_ia32_attr(node);
@@ -1142,19 +1091,6 @@ init_ia32_condcode_attributes(ir_node *res, long pnc) {
 	attr->pn_code = pnc;
 }
 
-ir_node *get_ia32_result_proj(const ir_node *node)
-{
-	const ir_edge_t *edge;
-
-	foreach_out_edge(node, edge) {
-		ir_node *proj = get_edge_src_irn(edge);
-		if(get_Proj_proj(proj) == 0) {
-			return proj;
-		}
-	}
-	return NULL;
-}
-
 /***************************************************************************************
  *                  _                            _                   _
  *                 | |                          | |                 | |