X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;ds=sidebyside;f=ir%2Fbe%2Fia32%2Fia32_emitter.c;h=009d0718a9ad7ad8aded7ddb35fa25e8e8a83bbc;hb=ed85eaaf130c68efbc2b671eee2910071bbc6c8d;hp=ba007bfcfb745e22690481075e888fb926ca7425;hpb=4a00c4a202c77e20fcb4ebb80f6f4152b46aff21;p=libfirm diff --git a/ir/be/ia32/ia32_emitter.c b/ir/be/ia32/ia32_emitter.c index ba007bfcf..009d0718a 100644 --- a/ir/be/ia32/ia32_emitter.c +++ b/ir/be/ia32/ia32_emitter.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved. + * Copyright (C) 1995-2011 University of Karlsruhe. All right reserved. * * This file is part of libFirm. * @@ -24,12 +24,14 @@ * @version $Id$ * * Summary table for x86 floatingpoint compares: + * (remember effect of unordered on x86: ZF=1, PF=1, CF=1) + * * pnc_Eq => !P && E * pnc_Lt => !P && B * pnc_Le => !P && BE * pnc_Gt => A * pnc_Ge => AE - * pnc_Lg => P || NE + * pnc_Lg => NE * pnc_Leg => NP (ordered) * pnc_Uo => P * pnc_Ue => E @@ -37,7 +39,7 @@ * pnc_Ule => BE * pnc_Ug => P || A * pnc_Uge => P || AE - * pnc_Ne => NE + * pnc_Ne => P || NE */ #include "config.h" @@ -70,11 +72,11 @@ #include "../be_dbgout.h" #include "ia32_emitter.h" +#include "ia32_common_transform.h" #include "gen_ia32_emitter.h" #include "gen_ia32_regalloc_if.h" #include "ia32_nodes_attr.h" #include "ia32_new_nodes.h" -#include "ia32_map_regs.h" #include "ia32_architecture.h" #include "bearch_ia32_t.h" @@ -83,7 +85,6 @@ DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;) #define SNPRINTF_BUF_LEN 128 static const ia32_isa_t *isa; -static ia32_code_gen_t *cg; static char pic_base_label[128]; static ir_label_t exc_label_id; static int mark_spill_reload = 0; @@ -92,7 +93,7 @@ static int do_pic; /** Return the next block in Block schedule */ static ir_node *get_prev_block_sched(const ir_node *block) { - return get_irn_link(block); + return (ir_node*)get_irn_link(block); } /** Checks if the current block is a fall-through target. */ @@ -154,23 +155,9 @@ static const arch_register_t *get_in_reg(const ir_node *irn, int pos) assert(reg && "no in register found"); - if (reg == &ia32_gp_regs[REG_GP_NOREG]) + if (reg == &ia32_registers[REG_GP_NOREG]) panic("trying to emit noreg for %+F input %d", irn, pos); - /* in case of unknown register: just return a valid register */ - if (reg == &ia32_gp_regs[REG_GP_UKNWN]) { - const arch_register_req_t *req = arch_get_register_req(irn, pos); - - if (arch_register_req_is(req, limited)) { - /* in case of limited requirements: get the first allowed register */ - unsigned idx = rbitset_next(req->limited, 0, 1); - reg = arch_register_for_index(req->cls, idx); - } else { - /* otherwise get first register in class */ - reg = arch_register_for_index(req->cls, 0); - } - } - return reg; } @@ -215,30 +202,21 @@ static const arch_register_t *get_out_reg(const ir_node *irn, int pos) static char *get_unique_label(char *buf, size_t buflen, const char *prefix) { static unsigned long id = 0; - snprintf(buf, buflen, "%s%lu", prefix, ++id); + snprintf(buf, buflen, "%s%s%lu", be_gas_get_private_prefix(), prefix, ++id); return buf; } -/************************************************************* - * _ _ __ _ _ - * (_) | | / _| | | | | - * _ __ _ __ _ _ __ | |_| |_ | |__ ___| |_ __ ___ _ __ - * | '_ \| '__| | '_ \| __| _| | '_ \ / _ \ | '_ \ / _ \ '__| - * | |_) | | | | | | | |_| | | | | | __/ | |_) | __/ | - * | .__/|_| |_|_| |_|\__|_| |_| |_|\___|_| .__/ \___|_| - * | | | | - * |_| |_| - *************************************************************/ - /** * Emit the name of the 8bit low register */ static void emit_8bit_register(const arch_register_t *reg) { const char *reg_name = arch_register_get_name(reg); + assert(reg->index == REG_GP_EAX || reg->index == REG_GP_EBX + || reg->index == REG_GP_ECX || reg->index == REG_GP_EDX); be_emit_char('%'); - be_emit_char(reg_name[1]); + be_emit_char(reg_name[1]); /* get the basic name of the register */ be_emit_char('l'); } @@ -248,18 +226,20 @@ static void emit_8bit_register(const arch_register_t *reg) static void emit_8bit_register_high(const arch_register_t *reg) { const char *reg_name = arch_register_get_name(reg); + assert(reg->index == REG_GP_EAX || reg->index == REG_GP_EBX + || reg->index == REG_GP_ECX || reg->index == REG_GP_EDX); be_emit_char('%'); - be_emit_char(reg_name[1]); + be_emit_char(reg_name[1]); /* get the basic name of the register */ be_emit_char('h'); } static void emit_16bit_register(const arch_register_t *reg) { - const char *reg_name = ia32_get_mapped_reg_name(isa->regs_16bit, reg); + const char *reg_name = arch_register_get_name(reg); be_emit_char('%'); - be_emit_string(reg_name); + be_emit_string(reg_name+1); /* skip the 'e' prefix of the 32bit names */ } /** @@ -443,7 +423,7 @@ void ia32_emit_x87_mode_suffix(const ir_node *node) case 128: be_emit_char('t'); return; } } else { - assert(mode_is_int(mode)); + assert(mode_is_int(mode) || mode_is_reference(mode)); switch (get_mode_size_bits(mode)) { case 16: be_emit_char('s'); return; case 32: be_emit_char('l'); return; @@ -458,7 +438,7 @@ void ia32_emit_x87_mode_suffix(const ir_node *node) static char get_xmm_mode_suffix(ir_mode *mode) { assert(mode_is_float(mode)); - switch(get_mode_size_bits(mode)) { + switch (get_mode_size_bits(mode)) { case 32: return 's'; case 64: return 'd'; default: panic("Invalid XMM mode"); @@ -507,7 +487,7 @@ void ia32_emit_source_register_or_immediate(const ir_node *node, int pos) static ir_node *get_cfop_target_block(const ir_node *irn) { assert(get_irn_mode(irn) == mode_X); - return get_irn_link(irn); + return (ir_node*)get_irn_link(irn); } /** @@ -519,62 +499,54 @@ static void ia32_emit_cfop_target(const ir_node *node) be_gas_emit_block_name(block); } -/* - * positive conditions for signed compares - */ -static const char *const cmp2condition_s[] = { - NULL, /* always false */ - "e", /* == */ - "l", /* < */ - "le", /* <= */ - "g", /* > */ - "ge", /* >= */ - "ne", /* != */ - NULL /* always true */ -}; - -/* - * positive conditions for unsigned compares - */ -static const char *const cmp2condition_u[] = { - NULL, /* always false */ - "e", /* == */ - "b", /* < */ - "be", /* <= */ - "a", /* > */ - "ae", /* >= */ - "ne", /* != */ - NULL /* always true */ -}; - /** * Emit the suffix for a compare instruction. */ -static void ia32_emit_cmp_suffix(int pnc) -{ - const char *str; - - if (pnc == ia32_pn_Cmp_parity) { - be_emit_char('p'); - return; - } - - if (pnc & ia32_pn_Cmp_float || pnc & ia32_pn_Cmp_unsigned) { - str = cmp2condition_u[pnc & 7]; - } else { - str = cmp2condition_s[pnc & 7]; +static void ia32_emit_condition_code(ia32_condition_code_t cc) +{ + switch (cc) { + case ia32_cc_overflow: be_emit_cstring("o"); return; + case ia32_cc_not_overflow: be_emit_cstring("no"); return; + case ia32_cc_float_below: + case ia32_cc_float_unordered_below: + case ia32_cc_below: be_emit_cstring("b"); return; + case ia32_cc_float_above_equal: + case ia32_cc_float_unordered_above_equal: + case ia32_cc_above_equal: be_emit_cstring("ae"); return; + case ia32_cc_float_equal: + case ia32_cc_equal: be_emit_cstring("e"); return; + case ia32_cc_float_not_equal: + case ia32_cc_not_equal: be_emit_cstring("ne"); return; + case ia32_cc_float_below_equal: + case ia32_cc_float_unordered_below_equal: + case ia32_cc_below_equal: be_emit_cstring("be"); return; + case ia32_cc_float_above: + case ia32_cc_float_unordered_above: + case ia32_cc_above: be_emit_cstring("a"); return; + case ia32_cc_sign: be_emit_cstring("s"); return; + case ia32_cc_not_sign: be_emit_cstring("ns"); return; + case ia32_cc_parity: be_emit_cstring("p"); return; + case ia32_cc_not_parity: be_emit_cstring("np"); return; + case ia32_cc_less: be_emit_cstring("l"); return; + case ia32_cc_greater_equal: be_emit_cstring("ge"); return; + case ia32_cc_less_equal: be_emit_cstring("le"); return; + case ia32_cc_greater: be_emit_cstring("g"); return; + case ia32_cc_float_parity_cases: + case ia32_cc_additional_float_cases: + break; } - - be_emit_string(str); + panic("Invalid ia32 condition code"); } typedef enum ia32_emit_mod_t { + EMIT_NONE = 0, EMIT_RESPECT_LS = 1U << 0, EMIT_ALTERNATE_AM = 1U << 1, EMIT_LONG = 1U << 2, EMIT_HIGH_REG = 1U << 3, EMIT_LOW_REG = 1U << 4 } ia32_emit_mod_t; +ENUM_BITSET(ia32_emit_mod_t) /** * Emits address mode. @@ -665,7 +637,7 @@ static void ia32_emitf(const ir_node *node, const char *fmt, ...) for (;;) { const char *start = fmt; - ia32_emit_mod_t mod = 0; + ia32_emit_mod_t mod = EMIT_NONE; while (*fmt != '%' && *fmt != '\n' && *fmt != '\0') ++fmt; @@ -685,8 +657,8 @@ static void ia32_emitf(const ir_node *node, const char *fmt, ...) break; ++fmt; - while (1) { - switch(*fmt) { + for (;;) { + switch (*fmt) { case '*': mod |= EMIT_ALTERNATE_AM; break; case '#': mod |= EMIT_RESPECT_LS; break; case 'l': mod |= EMIT_LONG; break; @@ -769,8 +741,8 @@ emit_AM: } case 'P': { - int pnc = va_arg(ap, int); - ia32_emit_cmp_suffix(pnc); + ia32_condition_code_t cc = va_arg(ap, ia32_condition_code_t); + ia32_emit_condition_code(cc); break; } @@ -863,7 +835,7 @@ void ia32_emit_binop(const ir_node *node) */ void ia32_emit_x87_binop(const ir_node *node) { - switch(get_ia32_op_type(node)) { + switch (get_ia32_op_type(node)) { case ia32_Normal: { const ia32_x87_attr_t *x87_attr = get_ia32_x87_attr_const(node); @@ -959,7 +931,7 @@ static ir_node *find_original_value(ir_node *node) } } -static int determine_final_pnc(const ir_node *node, int flags_pos, int pnc) +static int determine_final_cc(const ir_node *node, int flags_pos, int cc) { ir_node *flags = get_irn_n(node, flags_pos); const ia32_attr_t *flags_attr; @@ -977,40 +949,21 @@ static int determine_final_pnc(const ir_node *node, int flags_pos, int pnc) } flags_attr = get_ia32_attr_const(cmp); - if (flags_attr->data.ins_permuted) - pnc = get_mirrored_pnc(pnc); - pnc |= ia32_pn_Cmp_float; - } else if (is_ia32_Ucomi(flags) || is_ia32_Fucomi(flags) - || is_ia32_Fucompi(flags)) { - flags_attr = get_ia32_attr_const(flags); - - if (flags_attr->data.ins_permuted) - pnc = get_mirrored_pnc(pnc); - pnc |= ia32_pn_Cmp_float; } else { flags_attr = get_ia32_attr_const(flags); - - if (flags_attr->data.ins_permuted) - pnc = get_mirrored_pnc(pnc); - if (flags_attr->data.cmp_unsigned) - pnc |= ia32_pn_Cmp_unsigned; } - return pnc; -} - -static pn_Cmp ia32_get_negated_pnc(pn_Cmp pnc) -{ - ir_mode *mode = pnc & ia32_pn_Cmp_float ? mode_F : mode_Iu; - return get_negated_pnc(pnc, mode); + if (flags_attr->data.ins_permuted) + cc = ia32_invert_condition_code(cc); + return cc; } void ia32_emit_cmp_suffix_node(const ir_node *node, int flags_pos) { - pn_Cmp pnc = get_ia32_condcode(node); - pnc = determine_final_pnc(node, flags_pos, pnc); + ia32_condition_code_t cc = get_ia32_condcode(node); + cc = determine_final_cc(node, flags_pos, cc); - ia32_emit_cmp_suffix(pnc); + ia32_emit_condition_code(cc); } /** @@ -1057,13 +1010,12 @@ static int can_be_fallthrough(const ir_node *node) */ static void emit_ia32_Jcc(const ir_node *node) { - int need_parity_label = 0; - const ir_node *proj_true; - const ir_node *proj_false; - const ir_node *block; - pn_Cmp pnc = get_ia32_condcode(node); + int need_parity_label = 0; + ia32_condition_code_t cc = get_ia32_condcode(node); + const ir_node *proj_true; + const ir_node *proj_false; - pnc = determine_final_pnc(node, 0, pnc); + cc = determine_final_cc(node, 0, cc); /* get both Projs */ proj_true = get_proj(node, pn_ia32_Jcc_true); @@ -1072,33 +1024,21 @@ static void emit_ia32_Jcc(const ir_node *node) proj_false = get_proj(node, pn_ia32_Jcc_false); assert(proj_false && "Jcc without false Proj"); - block = get_nodes_block(node); - if (can_be_fallthrough(proj_true)) { /* exchange both proj's so the second one can be omitted */ const ir_node *t = proj_true; proj_true = proj_false; proj_false = t; - pnc = ia32_get_negated_pnc(pnc); + cc = ia32_negate_condition_code(cc); } - if (pnc & ia32_pn_Cmp_float) { + if (cc & ia32_cc_float_parity_cases) { /* Some floating point comparisons require a test of the parity flag, * which indicates that the result is unordered */ - switch (pnc & 0x0f) { - case pn_Cmp_Uo: { + if (cc & ia32_cc_negated) { ia32_emitf(proj_true, "\tjp %L\n"); - break; - } - - case pn_Cmp_Leg: - ia32_emitf(proj_true, "\tjnp %L\n"); - break; - - case pn_Cmp_Eq: - case pn_Cmp_Lt: - case pn_Cmp_Le: + } else { /* we need a local label if the false proj is a fallthrough * as the falseblock might have no label emitted then */ if (can_be_fallthrough(proj_false)) { @@ -1107,22 +1047,9 @@ static void emit_ia32_Jcc(const ir_node *node) } else { ia32_emitf(proj_false, "\tjp %L\n"); } - goto emit_jcc; - - case pn_Cmp_Ug: - case pn_Cmp_Uge: - case pn_Cmp_Ne: - ia32_emitf(proj_true, "\tjp %L\n"); - goto emit_jcc; - - default: - goto emit_jcc; } - } else { -emit_jcc: - ia32_emitf(proj_true, "\tj%P %L\n", pnc); } - + ia32_emitf(proj_true, "\tj%P %L\n", cc); if (need_parity_label) { ia32_emitf(NULL, "1:\n"); } @@ -1143,56 +1070,38 @@ static void emit_ia32_Setcc(const ir_node *node) { const arch_register_t *dreg = get_out_reg(node, pn_ia32_Setcc_res); - pn_Cmp pnc = get_ia32_condcode(node); - pnc = determine_final_pnc(node, n_ia32_Setcc_eflags, pnc); - if (pnc & ia32_pn_Cmp_float) { - switch (pnc & 0x0f) { - case pn_Cmp_Uo: - ia32_emitf(node, "\tsetp %#R\n", dreg); - return; - - case pn_Cmp_Leg: - ia32_emitf(node, "\tsetnp %#R\n", dreg); - return; - - case pn_Cmp_Eq: - case pn_Cmp_Lt: - case pn_Cmp_Le: - ia32_emitf(node, "\tset%P %R\n", dreg); - ia32_emitf(node, "\tandb %>R, %R\n", dreg); ia32_emitf(node, "\torb %>R, %R\n", dreg); + ia32_emitf(node, "\tandb %>R, %data.ins_permuted) - pnc = ia32_get_negated_pnc(pnc); + cc = ia32_negate_condition_code(cc); in_true = arch_get_irn_register(get_irn_n(node, n_ia32_CMovcc_val_true)); in_false = arch_get_irn_register(get_irn_n(node, n_ia32_CMovcc_val_false)); @@ -1205,7 +1114,7 @@ static void emit_ia32_CMovcc(const ir_node *node) assert(get_ia32_op_type(node) == ia32_Normal); - pnc = ia32_get_negated_pnc(pnc); + cc = ia32_negate_condition_code(cc); tmp = in_true; in_true = in_false; @@ -1215,43 +1124,22 @@ static void emit_ia32_CMovcc(const ir_node *node) ia32_emitf(node, "\tmovl %R, %R\n", in_false, out); } - /* TODO: handling of Nans isn't correct yet */ - if (pnc & ia32_pn_Cmp_float) { - switch (pnc & 0x0f) { - case pn_Cmp_Uo: - case pn_Cmp_Leg: - case pn_Cmp_Eq: - case pn_Cmp_Lt: - case pn_Cmp_Le: - case pn_Cmp_Ug: - case pn_Cmp_Uge: - case pn_Cmp_Ne: - panic("CMov with floatingpoint compare/parity not supported yet"); - } + if (cc & ia32_cc_float_parity_cases) { + panic("CMov with floatingpoint compare/parity not supported yet"); } - ia32_emitf(node, "\tcmov%P %#AR, %#R\n", pnc, in_true, out); + ia32_emitf(node, "\tcmov%P %#AR, %#R\n", cc, in_true, out); } -/********************************************************* - * _ _ _ - * (_) | (_) - * ___ _ __ ___ _| |_ _ _ _ _ __ ___ _ __ ___ - * / _ \ '_ ` _ \| | __| | | | | | '_ ` _ \| '_ \/ __| - * | __/ | | | | | | |_ | | |_| | | | | | | |_) \__ \ - * \___|_| |_| |_|_|\__| | |\__,_|_| |_| |_| .__/|___/ - * _/ | | | - * |__/ |_| - *********************************************************/ /* jump table entry (target and corresponding number) */ -typedef struct _branch_t { +typedef struct branch_t { ir_node *target; int value; } branch_t; /* jump table for switch generation */ -typedef struct _jmp_tbl_t { +typedef struct jmp_tbl_t { ir_node *defProj; /**< default target */ long min_value; /**< smallest switch case */ long max_value; /**< largest switch case */ @@ -1277,39 +1165,38 @@ static int ia32_cmp_branch_t(const void *a, const void *b) static void generate_jump_table(jmp_tbl_t *tbl, const ir_node *node) { int i; - long pnc; - long default_pn; + long default_pn = get_ia32_default_pn(node); ir_node *proj; const ir_edge_t *edge; /* fill the table structure */ - get_unique_label(tbl->label, SNPRINTF_BUF_LEN, ".TBL_"); + get_unique_label(tbl->label, SNPRINTF_BUF_LEN, "TBL_"); tbl->defProj = NULL; tbl->num_branches = get_irn_n_edges(node) - 1; tbl->branches = XMALLOCNZ(branch_t, tbl->num_branches); tbl->min_value = LONG_MAX; tbl->max_value = LONG_MIN; - default_pn = get_ia32_condcode(node); i = 0; /* go over all proj's and collect them */ foreach_out_edge(node, edge) { + long pn; proj = get_edge_src_irn(edge); assert(is_Proj(proj) && "Only proj allowed at SwitchJmp"); - pnc = get_Proj_proj(proj); + pn = get_Proj_proj(proj); /* check for default proj */ - if (pnc == default_pn) { + if (pn == default_pn) { assert(tbl->defProj == NULL && "found two default Projs at SwitchJmp"); tbl->defProj = proj; } else { - tbl->min_value = pnc < tbl->min_value ? pnc : tbl->min_value; - tbl->max_value = pnc > tbl->max_value ? pnc : tbl->max_value; + tbl->min_value = pn < tbl->min_value ? pn : tbl->min_value; + tbl->max_value = pn > tbl->max_value ? pn : tbl->max_value; /* create branch entry */ tbl->branches[i].target = proj; - tbl->branches[i].value = pnc; + tbl->branches[i].value = pn; ++i; } @@ -1401,17 +1288,16 @@ static const char* emit_asm_operand(const ir_node *node, const char *s) const arch_register_t *reg; const ia32_asm_reg_t *asm_regs = attr->register_map; const ia32_asm_reg_t *asm_reg; - const char *reg_name; char c; char modifier = 0; - int num = -1; + int num; int p; assert(*s == '%'); c = *(++s); /* parse modifiers */ - switch(c) { + switch (c) { case 0: ir_fprintf(stderr, "Warning: asm text (%+F) ends with %%\n", node); be_emit_char('%'); @@ -1445,8 +1331,7 @@ static const char* emit_asm_operand(const ir_node *node, const char *s) } /* parse number */ - sscanf(s, "%d%n", &num, &p); - if (num < 0) { + if (sscanf(s, "%d%n", &num, &p) != 1) { ir_fprintf(stderr, "Warning: Couldn't parse assembler operand (%+F)\n", node); return s; @@ -1454,7 +1339,7 @@ static const char* emit_asm_operand(const ir_node *node, const char *s) s += p; } - if (num < 0 || ARR_LEN(asm_regs) <= num) { + if (num < 0 || ARR_LEN(asm_regs) <= (size_t)num) { ir_fprintf(stderr, "Error: Custom assembler references invalid input/output (%+F)\n", node); @@ -1489,21 +1374,19 @@ static const char* emit_asm_operand(const ir_node *node, const char *s) /* emit it */ if (modifier != 0) { - be_emit_char('%'); - switch(modifier) { + switch (modifier) { case 'b': - reg_name = ia32_get_mapped_reg_name(isa->regs_8bit, reg); + emit_8bit_register(reg); break; case 'h': - reg_name = ia32_get_mapped_reg_name(isa->regs_8bit_high, reg); + emit_8bit_register_high(reg); break; case 'w': - reg_name = ia32_get_mapped_reg_name(isa->regs_16bit, reg); + emit_16bit_register(reg); break; default: panic("Invalid asm op modifier"); } - be_emit_string(reg_name); } else { emit_register(reg, asm_reg->mode); } @@ -1531,7 +1414,7 @@ static void emit_ia32_Asm(const ir_node *node) if (s[0] != '\t') be_emit_char('\t'); - while(*s != 0) { + while (*s != 0) { if (*s == '%') { s = emit_asm_operand(node, s); } else { @@ -1542,16 +1425,6 @@ static void emit_ia32_Asm(const ir_node *node) ia32_emitf(NULL, "\n#NO_APP\n"); } -/********************************** - * _____ ____ - * / ____| | _ \ - * | | ___ _ __ _ _| |_) | - * | | / _ \| '_ \| | | | _ < - * | |___| (_) | |_) | |_| | |_) | - * \_____\___/| .__/ \__, |____/ - * | | __/ | - * |_| |___/ - **********************************/ /** * Emit movsb/w instructions to make mov count divideable by 4 @@ -1591,17 +1464,6 @@ static void emit_ia32_CopyB_i(const ir_node *node) } - -/*************************** - * _____ - * / ____| - * | | ___ _ ____ __ - * | | / _ \| '_ \ \ / / - * | |___| (_) | | | \ V / - * \_____\___/|_| |_|\_/ - * - ***************************/ - /** * Emit code for conversions (I, FP), (FP, I) and (FP, FP). */ @@ -1656,16 +1518,6 @@ static void emit_ia32_Call(const ir_node *node) } -/******************************************* - * _ _ - * | | | | - * | |__ ___ _ __ ___ __| | ___ ___ - * | '_ \ / _ \ '_ \ / _ \ / _` |/ _ \/ __| - * | |_) | __/ | | | (_) | (_| | __/\__ \ - * |_.__/ \___|_| |_|\___/ \__,_|\___||___/ - * - *******************************************/ - /** * Emits code to increase stack pointer. */ @@ -1683,16 +1535,6 @@ static void emit_be_IncSP(const ir_node *node) } } -static inline bool is_unknown_reg(const arch_register_t *reg) -{ - if(reg == &ia32_gp_regs[REG_GP_UKNWN] - || reg == &ia32_xmm_regs[REG_XMM_UKNWN] - || reg == &ia32_vfp_regs[REG_VFP_UKNWN]) - return true; - - return false; -} - /** * Emits code for Copy/CopyKeep. */ @@ -1704,8 +1546,6 @@ static void Copy_emitter(const ir_node *node, const ir_node *op) if (in == out) { return; } - if (is_unknown_reg(in)) - return; /* copies of vf nodes aren't real... */ if (arch_register_get_class(in) == &ia32_reg_classes[CLASS_ia32_vfp]) return; @@ -1904,16 +1744,6 @@ static void emit_Nothing(const ir_node *node) } -/*********************************************************************************** - * _ __ _ - * (_) / _| | | - * _ __ ___ __ _ _ _ __ | |_ _ __ __ _ _ __ ___ _____ _____ _ __| | __ - * | '_ ` _ \ / _` | | '_ \ | _| '__/ _` | '_ ` _ \ / _ \ \ /\ / / _ \| '__| |/ / - * | | | | | | (_| | | | | | | | | | | (_| | | | | | | __/\ V V / (_) | | | < - * |_| |_| |_|\__,_|_|_| |_| |_| |_| \__,_|_| |_| |_|\___| \_/\_/ \___/|_| |_|\_\ - * - ***********************************************************************************/ - /** * Enters the emitter functions for handled nodes into the generic * pointer of an opcode. @@ -1923,9 +1753,9 @@ static void ia32_register_emitters(void) #define IA32_EMIT2(a,b) op_ia32_##a->ops.generic = (op_func)emit_ia32_##b #define IA32_EMIT(a) IA32_EMIT2(a,a) #define EMIT(a) op_##a->ops.generic = (op_func)emit_##a -#define IGN(a) op_##a->ops.generic = (op_func)emit_Nothing +#define IGN(a) op_##a->ops.generic = (op_func)emit_Nothing #define BE_EMIT(a) op_be_##a->ops.generic = (op_func)emit_be_##a -#define BE_IGN(a) op_be_##a->ops.generic = (op_func)emit_Nothing +#define BE_IGN(a) op_be_##a->ops.generic = (op_func)emit_Nothing /* first clear the generic function pointer for all ops */ clear_irp_opcodes_generic_func(); @@ -2061,7 +1891,8 @@ static void ia32_emit_align_label(void) static int should_align_block(const ir_node *block) { static const double DELTA = .0001; - ir_exec_freq *exec_freq = cg->birg->exec_freq; + ir_graph *irg = get_irn_irg(block); + ir_exec_freq *exec_freq = be_get_irg_exec_freq(irg); ir_node *prev = get_prev_block_sched(block); double block_freq; double prev_freq = 0; /**< execfreq of the fallthrough block */ @@ -2078,7 +1909,7 @@ static int should_align_block(const ir_node *block) return 0; n_cfgpreds = get_Block_n_cfgpreds(block); - for(i = 0; i < n_cfgpreds; ++i) { + for (i = 0; i < n_cfgpreds; ++i) { const ir_node *pred = get_Block_cfgpred_block(block, i); double pred_freq = get_block_execfreq(exec_freq, pred); @@ -2108,7 +1939,7 @@ static void ia32_emit_block_header(ir_node *block) ir_graph *irg = current_ir_graph; int need_label = block_needs_label(block); int i, arity; - ir_exec_freq *exec_freq = cg->birg->exec_freq; + ir_exec_freq *exec_freq = be_get_irg_exec_freq(irg); if (block == get_irg_end_block(irg)) return; @@ -2200,7 +2031,7 @@ typedef struct exc_entry { */ static void ia32_gen_labels(ir_node *block, void *data) { - exc_entry **exc_list = data; + exc_entry **exc_list = (exc_entry**)data; ir_node *pred; int n; @@ -2225,8 +2056,8 @@ static void ia32_gen_labels(ir_node *block, void *data) */ static int cmp_exc_entry(const void *a, const void *b) { - const exc_entry *ea = a; - const exc_entry *eb = b; + const exc_entry *ea = (const exc_entry*)a; + const exc_entry *eb = (const exc_entry*)b; if (get_ia32_exc_label_id(ea->exc_instr) < get_ia32_exc_label_id(eb->exc_instr)) return -1; @@ -2236,23 +2067,25 @@ static int cmp_exc_entry(const void *a, const void *b) /** * Main driver. Emits the code for one routine. */ -void ia32_gen_routine(ia32_code_gen_t *ia32_cg, ir_graph *irg) +void ia32_gen_routine(ir_graph *irg) { - ir_entity *entity = get_irg_entity(irg); - exc_entry *exc_list = NEW_ARR_F(exc_entry, 0); + ir_entity *entity = get_irg_entity(irg); + exc_entry *exc_list = NEW_ARR_F(exc_entry, 0); + const arch_env_t *arch_env = be_get_irg_arch_env(irg); + ia32_irg_data_t *irg_data = ia32_get_irg_data(irg); + ir_node **blk_sched = irg_data->blk_sched; int i, n; - cg = ia32_cg; - isa = cg->isa; - do_pic = cg->birg->main_env->options->pic; + isa = (ia32_isa_t*) arch_env; + do_pic = be_get_irg_options(irg)->pic; be_gas_elf_type_char = '@'; ia32_register_emitters(); - get_unique_label(pic_base_label, sizeof(pic_base_label), ".PIC_BASE"); + get_unique_label(pic_base_label, sizeof(pic_base_label), "PIC_BASE"); - be_dbg_method_begin(entity, be_abi_get_stack_layout(cg->birg->abi)); + be_dbg_method_begin(entity); be_gas_emit_function_prolog(entity, ia32_cg_config.function_alignment); /* we use links to point to target blocks */ @@ -2260,16 +2093,16 @@ void ia32_gen_routine(ia32_code_gen_t *ia32_cg, ir_graph *irg) irg_block_walk_graph(irg, ia32_gen_labels, NULL, &exc_list); /* initialize next block links */ - n = ARR_LEN(cg->blk_sched); + n = ARR_LEN(blk_sched); for (i = 0; i < n; ++i) { - ir_node *block = cg->blk_sched[i]; - ir_node *prev = i > 0 ? cg->blk_sched[i-1] : NULL; + ir_node *block = blk_sched[i]; + ir_node *prev = i > 0 ? blk_sched[i-1] : NULL; set_irn_link(block, prev); } for (i = 0; i < n; ++i) { - ir_node *block = cg->blk_sched[i]; + ir_node *block = blk_sched[i]; ia32_gen_block(block); } @@ -2285,7 +2118,7 @@ void ia32_gen_routine(ia32_code_gen_t *ia32_cg, ir_graph *irg) Those are ascending with ascending addresses. */ qsort(exc_list, ARR_LEN(exc_list), sizeof(exc_list[0]), cmp_exc_entry); { - int i; + size_t i; for (i = 0; i < ARR_LEN(exc_list); ++i) { be_emit_cstring("\t.long "); @@ -2309,48 +2142,23 @@ static const lc_opt_table_entry_t ia32_emitter_options[] = { static unsigned char reg_gp_map[N_ia32_gp_REGS]; //static unsigned char reg_mmx_map[N_ia32_mmx_REGS]; //static unsigned char reg_sse_map[N_ia32_xmm_REGS]; -static unsigned char pnc_map_signed[8]; -static unsigned char pnc_map_unsigned[8]; static void build_reg_map(void) { - reg_gp_map[REG_EAX] = 0x0; - reg_gp_map[REG_ECX] = 0x1; - reg_gp_map[REG_EDX] = 0x2; - reg_gp_map[REG_EBX] = 0x3; - reg_gp_map[REG_ESP] = 0x4; - reg_gp_map[REG_EBP] = 0x5; - reg_gp_map[REG_ESI] = 0x6; - reg_gp_map[REG_EDI] = 0x7; - - pnc_map_signed[pn_Cmp_Eq] = 0x04; - pnc_map_signed[pn_Cmp_Lt] = 0x0C; - pnc_map_signed[pn_Cmp_Le] = 0x0E; - pnc_map_signed[pn_Cmp_Gt] = 0x0F; - pnc_map_signed[pn_Cmp_Ge] = 0x0D; - pnc_map_signed[pn_Cmp_Lg] = 0x05; - - pnc_map_unsigned[pn_Cmp_Eq] = 0x04; - pnc_map_unsigned[pn_Cmp_Lt] = 0x02; - pnc_map_unsigned[pn_Cmp_Le] = 0x06; - pnc_map_unsigned[pn_Cmp_Gt] = 0x07; - pnc_map_unsigned[pn_Cmp_Ge] = 0x03; - pnc_map_unsigned[pn_Cmp_Lg] = 0x05; + reg_gp_map[REG_GP_EAX] = 0x0; + reg_gp_map[REG_GP_ECX] = 0x1; + reg_gp_map[REG_GP_EDX] = 0x2; + reg_gp_map[REG_GP_EBX] = 0x3; + reg_gp_map[REG_GP_ESP] = 0x4; + reg_gp_map[REG_GP_EBP] = 0x5; + reg_gp_map[REG_GP_ESI] = 0x6; + reg_gp_map[REG_GP_EDI] = 0x7; } /** Returns the encoding for a pnc field. */ -static unsigned char pnc2cc(int pnc) +static unsigned char pnc2cc(ia32_condition_code_t cc) { - unsigned char cc; - if (pnc == ia32_pn_Cmp_parity) { - cc = 0x0A; - } else if (pnc & ia32_pn_Cmp_float || pnc & ia32_pn_Cmp_unsigned) { - cc = pnc_map_unsigned[pnc & 0x07]; - } else { - cc = pnc_map_signed[pnc & 0x07]; - } - assert(cc != 0); - return cc; + return cc & 0xf; } /** Sign extension bit values for binops */ @@ -2645,7 +2453,7 @@ static void bemit_binop_with_imm( bemit_mod_am(ruval, node); } else { const arch_register_t *reg = get_in_reg(node, n_ia32_binary_left); - if (reg->index == REG_EAX) { + if (reg->index == REG_GP_EAX) { bemit8(opcode_ax); } else { bemit8(opcode); @@ -2726,7 +2534,7 @@ static void bemit_copy(const ir_node *copy) const arch_register_t *in = get_in_reg(copy, 0); const arch_register_t *out = get_out_reg(copy, 0); - if (in == out || is_unknown_reg(in)) + if (in == out) return; /* copies of vf nodes aren't real... */ if (arch_register_get_class(in) == &ia32_reg_classes[CLASS_ia32_vfp]) @@ -2750,9 +2558,9 @@ static void bemit_perm(const ir_node *node) assert(cls0 == arch_register_get_class(in1) && "Register class mismatch at Perm"); if (cls0 == &ia32_reg_classes[CLASS_ia32_gp]) { - if (in0->index == REG_EAX) { + if (in0->index == REG_GP_EAX) { bemit8(0x90 + reg_gp_map[in1->index]); - } else if (in1->index == REG_EAX) { + } else if (in1->index == REG_GP_EAX) { bemit8(0x90 + reg_gp_map[in0->index]); } else { bemit8(0x87); @@ -2962,30 +2770,27 @@ static void bemit_setcc(const ir_node *node) { const arch_register_t *dreg = get_out_reg(node, pn_ia32_Setcc_res); - pn_Cmp pnc = get_ia32_condcode(node); - pnc = determine_final_pnc(node, n_ia32_Setcc_eflags, pnc); - if (pnc & ia32_pn_Cmp_float) { - switch (pnc & 0x0f) { - case pn_Cmp_Uo: - /* setp dreg */ bemit8(0x0F); - bemit8(0x9B); - bemit_modrm8(REG_LOW, dreg); - return; + bemit8(0x9A); + bemit_modrm8(REG_HIGH, dreg); - case pn_Cmp_Eq: - case pn_Cmp_Lt: - case pn_Cmp_Le: + /* orb %>dreg, %dreg */ @@ -2996,34 +2801,13 @@ static void bemit_setcc(const ir_node *node) /* andb %>dreg, %dreg */ - bemit8(0x0F); - bemit8(0x9A); - bemit_modrm8(REG_HIGH, dreg); - - /* orb %>dreg, %data.ins_permuted; const arch_register_t *out = arch_irn_get_register(node, pn_ia32_res); - pn_Cmp pnc = get_ia32_condcode(node); + ia32_condition_code_t cc = get_ia32_condcode(node); const arch_register_t *in_true; const arch_register_t *in_false; - pnc = determine_final_pnc(node, n_ia32_CMovcc_eflags, pnc); + cc = determine_final_cc(node, n_ia32_CMovcc_eflags, cc); in_true = arch_get_irn_register(get_irn_n(node, n_ia32_CMovcc_val_true)); in_false = arch_get_irn_register(get_irn_n(node, n_ia32_CMovcc_val_false)); @@ -3054,12 +2838,13 @@ static void bemit_cmovcc(const ir_node *node) } if (ins_permuted) - pnc = ia32_get_negated_pnc(pnc); + cc = ia32_negate_condition_code(cc); - /* TODO: handling of Nans isn't correct yet */ + if (cc & ia32_cc_float_parity_cases) + panic("cmov can't handle parity float cases"); bemit8(0x0F); - bemit8(0x40 | pnc2cc(pnc)); + bemit8(0x40 | pnc2cc(cc)); if (get_ia32_op_type(node) == ia32_Normal) { bemit_modrr(in_true, out); } else { @@ -3109,7 +2894,7 @@ static void bemit_cmp(const ir_node *node) bemit_mod_am(7, node); } else { const arch_register_t *reg = get_in_reg(node, n_ia32_binary_left); - if (reg->index == REG_EAX) { + if (reg->index == REG_GP_EAX) { bemit8(0x3D); } else { bemit8(0x81); @@ -3142,7 +2927,7 @@ static void bemit_cmp8bit(const ir_node *node) if (is_ia32_Immediate(right)) { if (get_ia32_op_type(node) == ia32_Normal) { const arch_register_t *out = get_in_reg(node, n_ia32_Cmp_left); - if (out->index == REG_EAX) { + if (out->index == REG_GP_EAX) { bemit8(0x3C); } else { bemit8(0x80); @@ -3171,7 +2956,7 @@ static void bemit_test8bit(const ir_node *node) if (is_ia32_Immediate(right)) { if (get_ia32_op_type(node) == ia32_Normal) { const arch_register_t *out = get_in_reg(node, n_ia32_Test8Bit_left); - if (out->index == REG_EAX) { + if (out->index == REG_GP_EAX) { bemit8(0xA8); } else { bemit8(0xF6); @@ -3241,7 +3026,7 @@ static void bemit_ldtls(const ir_node *node) const arch_register_t *out = get_out_reg(node, 0); bemit8(0x65); // gs: - if (out->index == REG_EAX) { + if (out->index == REG_GP_EAX) { bemit8(0xA1); // movl 0, %eax } else { bemit8(0x8B); // movl 0, %reg @@ -3292,9 +3077,9 @@ static void bemit_helper_sbb(const arch_register_t *src, const arch_register_t * /* helper function for bemit_minus64bit */ static void bemit_helper_xchg(const arch_register_t *src, const arch_register_t *dst) { - if (src->index == REG_EAX) { + if (src->index == REG_GP_EAX) { bemit8(0x90 + reg_gp_map[dst->index]); // xchgl %eax, %dst - } else if (dst->index == REG_EAX) { + } else if (dst->index == REG_GP_EAX) { bemit8(0x90 + reg_gp_map[src->index]); // xchgl %src, %eax } else { bemit8(0x87); // xchgl %src, %dst @@ -3402,7 +3187,7 @@ static void bemit_load(const ir_node *node) { const arch_register_t *out = get_out_reg(node, 0); - if (out->index == REG_EAX) { + if (out->index == REG_GP_EAX) { ir_node *base = get_irn_n(node, n_ia32_base); int has_base = !is_ia32_NoReg_GP(base); ir_node *index = get_irn_n(node, n_ia32_index); @@ -3447,7 +3232,7 @@ static void bemit_store(const ir_node *node) } else { const arch_register_t *in = get_in_reg(node, n_ia32_Store_val); - if (in->index == REG_EAX) { + if (in->index == REG_GP_EAX) { ir_node *base = get_irn_n(node, n_ia32_base); int has_base = !is_ia32_NoReg_GP(base); ir_node *index = get_irn_n(node, n_ia32_index); @@ -3587,14 +3372,14 @@ static void bemit_jp(bool odd, const ir_node *dest_block) static void bemit_ia32_jcc(const ir_node *node) { - int pnc = get_ia32_condcode(node); - const ir_node *proj_true; - const ir_node *proj_false; - const ir_node *dest_true; - const ir_node *dest_false; - const ir_node *block; + ia32_condition_code_t cc = get_ia32_condcode(node); + const ir_node *proj_true; + const ir_node *proj_false; + const ir_node *dest_true; + const ir_node *dest_false; + const ir_node *block; - pnc = determine_final_pnc(node, 0, pnc); + cc = determine_final_cc(node, 0, cc); /* get both Projs */ proj_true = get_proj(node, pn_ia32_Jcc_true); @@ -3611,51 +3396,29 @@ static void bemit_ia32_jcc(const ir_node *node) proj_true = proj_false; proj_false = t; - pnc = ia32_get_negated_pnc(pnc); + cc = ia32_negate_condition_code(cc); } dest_true = get_cfop_target_block(proj_true); dest_false = get_cfop_target_block(proj_false); - if (pnc & ia32_pn_Cmp_float) { + if (cc & ia32_cc_float_parity_cases) { /* Some floating point comparisons require a test of the parity flag, * which indicates that the result is unordered */ - switch (pnc & 15) { - case pn_Cmp_Uo: { - bemit_jp(false, dest_true); - break; + if (cc & ia32_cc_negated) { + bemit_jp(false, dest_true); + } else { + /* we need a local label if the false proj is a fallthrough + * as the falseblock might have no label emitted then */ + if (can_be_fallthrough(proj_false)) { + bemit8(0x7A); + bemit8(0x06); // jp + 6 + } else { + bemit_jp(false, dest_false); } - - case pn_Cmp_Leg: - bemit_jp(true, dest_true); - break; - - case pn_Cmp_Eq: - case pn_Cmp_Lt: - case pn_Cmp_Le: - /* we need a local label if the false proj is a fallthrough - * as the falseblock might have no label emitted then */ - if (can_be_fallthrough(proj_false)) { - bemit8(0x7A); - bemit8(0x06); // jp + 6 - } else { - bemit_jp(false, dest_false); - } - goto emit_jcc; - - case pn_Cmp_Ug: - case pn_Cmp_Uge: - case pn_Cmp_Ne: - bemit_jp(false, dest_true); - goto emit_jcc; - - default: - goto emit_jcc; } - } else { -emit_jcc: - bemit_jcc(pnc, dest_true); } + bemit_jcc(cc, dest_true); /* the second Proj might be a fallthrough */ if (can_be_fallthrough(proj_false)) { @@ -4306,13 +4069,15 @@ static void gen_binary_block(ir_node *block) } } -void ia32_gen_binary_routine(ia32_code_gen_t *ia32_cg, ir_graph *irg) +void ia32_gen_binary_routine(ir_graph *irg) { - ir_entity *entity = get_irg_entity(irg); - int i, n; + ir_entity *entity = get_irg_entity(irg); + const arch_env_t *arch_env = be_get_irg_arch_env(irg); + ia32_irg_data_t *irg_data = ia32_get_irg_data(irg); + ir_node **blk_sched = irg_data->blk_sched; + size_t i, n; - cg = ia32_cg; - isa = cg->isa; + isa = (ia32_isa_t*) arch_env; ia32_register_binary_emitters(); @@ -4323,16 +4088,16 @@ void ia32_gen_binary_routine(ia32_code_gen_t *ia32_cg, ir_graph *irg) irg_block_walk_graph(irg, ia32_gen_labels, NULL, NULL); /* initialize next block links */ - n = ARR_LEN(cg->blk_sched); + n = ARR_LEN(blk_sched); for (i = 0; i < n; ++i) { - ir_node *block = cg->blk_sched[i]; - ir_node *prev = i > 0 ? cg->blk_sched[i-1] : NULL; + ir_node *block = blk_sched[i]; + ir_node *prev = i > 0 ? blk_sched[i-1] : NULL; set_irn_link(block, prev); } for (i = 0; i < n; ++i) { - ir_node *block = cg->blk_sched[i]; + ir_node *block = blk_sched[i]; gen_binary_block(block); } @@ -4345,8 +4110,6 @@ void ia32_gen_binary_routine(ia32_code_gen_t *ia32_cg, ir_graph *irg) } - - void ia32_init_emitter(void) { lc_opt_entry_t *be_grp;