X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;ds=sidebyside;f=ir%2Fbe%2Fia32%2Fbearch_ia32.c;h=f6b4eeeccb83a4c1420fb0c59d2d44ef0db37c0f;hb=e3b765fcef0e337f4fe2e17d57d2fbaf1912ec79;hp=16eb153dbf2006a0694d154f066824e8c6fbea33;hpb=b3c0ae4f67bcfea7110ebd20d1466f1020e9564e;p=libfirm diff --git a/ir/be/ia32/bearch_ia32.c b/ir/be/ia32/bearch_ia32.c index 16eb153db..f6b4eeecc 100644 --- a/ir/be/ia32/bearch_ia32.c +++ b/ir/be/ia32/bearch_ia32.c @@ -56,27 +56,27 @@ #include "lower_mode_b.h" #include "lower_softfloat.h" -#include "../beabi.h" -#include "../beirg.h" -#include "../benode.h" -#include "../belower.h" -#include "../besched.h" +#include "beabi.h" +#include "beirg.h" +#include "benode.h" +#include "belower.h" +#include "besched.h" #include "be.h" -#include "../be_t.h" -#include "../beirgmod.h" -#include "../be_dbgout.h" -#include "../beblocksched.h" -#include "../bemachine.h" -#include "../bespillutil.h" -#include "../bespillslots.h" -#include "../bemodule.h" -#include "../begnuas.h" -#include "../bestate.h" -#include "../beflags.h" -#include "../betranshlp.h" -#include "../belistsched.h" -#include "../beabihelper.h" -#include "../bestack.h" +#include "be_t.h" +#include "beirgmod.h" +#include "be_dbgout.h" +#include "beblocksched.h" +#include "bemachine.h" +#include "bespillutil.h" +#include "bespillslots.h" +#include "bemodule.h" +#include "begnuas.h" +#include "bestate.h" +#include "beflags.h" +#include "betranshlp.h" +#include "belistsched.h" +#include "beabihelper.h" +#include "bestack.h" #include "bearch_ia32_t.h" @@ -99,7 +99,9 @@ transformer_t be_transformer = TRANSFORMER_DEFAULT; #endif -ir_mode *ia32_mode_fpcw = NULL; +ir_mode *ia32_mode_fpcw; +ir_mode *ia32_mode_E; +ir_type *ia32_type_E; /** The current omit-fp state */ static ir_type *omit_fp_between_type = NULL; @@ -1466,7 +1468,6 @@ static ia32_isa_t ia32_isa_template = { 5, /* costs for a reload instruction */ false, /* no custom abi handling */ }, - NULL, /* types */ NULL, /* tv_ents */ NULL, /* abstract machine */ IA32_FPU_ARCH_X87, /* FPU architecture */ @@ -1531,14 +1532,13 @@ static arch_env_t *ia32_init(FILE *file_handle) *isa = ia32_isa_template; if (ia32_mode_fpcw == NULL) { - ia32_mode_fpcw = new_ir_mode("Fpcw", irms_int_number, 16, 0, irma_none, 0); + ia32_mode_fpcw = new_int_mode("Fpcw", irma_twos_complement, 16, 0, 0); } ia32_register_init(); ia32_create_opcodes(&ia32_irn_ops); be_emit_init(file_handle); - isa->types = pmap_create(); isa->tv_ent = pmap_create(); isa->cpu = ia32_init_machine_description(); @@ -1561,7 +1561,6 @@ static void ia32_done(void *self) be_gas_emit_decls(isa->base.main_env); pmap_destroy(isa->tv_ent); - pmap_destroy(isa->types); be_emit_exit(); @@ -1943,6 +1942,9 @@ static int ia32_is_mux_allowed(ir_node *sel, ir_node *mux_false, { ir_mode *mode; + /* middleend can handle some things */ + if (ir_is_optimizable_mux(sel, mux_false, mux_true)) + return true; /* we can handle Set for all modes and compares */ if (mux_is_set(sel, mux_true, mux_false)) return true; @@ -1967,7 +1969,7 @@ static int ia32_is_mux_allowed(ir_node *sel, ir_node *mux_false, if (get_mode_size_bits(mode) > 32) return false; /* we can handle Abs for all modes and compares (except 64bit) */ - if (ir_mux_is_abs(sel, mux_true, mux_false) != 0) + if (ir_mux_is_abs(sel, mux_false, mux_true) != 0) return true; /* we can't handle MuxF yet */ if (mode_is_float(mode)) @@ -2011,21 +2013,9 @@ static int ia32_is_valid_clobber(const char *clobber) return ia32_get_clobber_register(clobber) != NULL; } -static ir_node *ia32_create_set(ir_node *cond) -{ - ir_node *block = get_nodes_block(cond); - ir_node *set = new_bd_ia32_l_Setcc(NULL, block, cond); - ir_node *conv = new_r_Conv(block, set, mode_Iu); - return conv; -} - static void ia32_lower_for_target(void) { size_t i, n_irgs = get_irp_n_irgs(); - lower_mode_b_config_t lower_mode_b_config = { - mode_Iu, /* lowered mode */ - ia32_create_set, - }; /* perform doubleword lowering */ lwrdw_param_t lower_dw_params = { @@ -2057,7 +2047,7 @@ static void ia32_lower_for_target(void) for (i = 0; i < n_irgs; ++i) { ir_graph *irg = get_irp_irg(i); /* lower for mode_b stuff */ - ir_lower_mode_b(irg, &lower_mode_b_config); + ir_lower_mode_b(irg, mode_Iu); /* break up switches with wide ranges */ lower_switch(irg, 4, 256, false); } @@ -2067,7 +2057,7 @@ static void ia32_lower_for_target(void) /* Turn all small CopyBs into loads/stores, keep medium-sized CopyBs, * so we can generate rep movs later, and turn all big CopyBs into * memcpy calls. */ - lower_CopyB(irg, 64, 8193); + lower_CopyB(irg, 64, 8193, true); } } @@ -2134,13 +2124,21 @@ static const backend_params *ia32_get_libfirm_params(void) ia32_create_trampoline_fkt, 4 /* alignment of stack parameter */ }; + + if (ia32_mode_E == NULL) { + /* note mantissa is 64bit but with explicitely encoded 1 so the really + * usable part as counted by firm is only 63 bits */ + ia32_mode_E = new_float_mode("E", irma_x86_extended_float, 15, 63); + ia32_type_E = new_type_primitive(ia32_mode_E); + set_type_size_bytes(ia32_type_E, 12); + set_type_alignment_bytes(ia32_type_E, 16); + } + ir_mode *mode_long_long - = new_ir_mode("long long", irms_int_number, 64, 1, irma_twos_complement, - 64); + = new_int_mode("long long", irma_twos_complement, 64, 1, 64); ir_type *type_long_long = new_type_primitive(mode_long_long); ir_mode *mode_unsigned_long_long - = new_ir_mode("unsigned long long", irms_int_number, 64, 0, - irma_twos_complement, 64); + = new_int_mode("unsigned long long", irma_twos_complement, 64, 0, 64); ir_type *type_unsigned_long_long = new_type_primitive(mode_unsigned_long_long); @@ -2157,13 +2155,8 @@ static const backend_params *ia32_get_libfirm_params(void) p.mode_float_arithmetic = NULL; p.type_long_double = NULL; } else { - p.mode_float_arithmetic = mode_E; - ir_mode *mode = new_ir_mode("long double", irms_float_number, 80, 1, - irma_ieee754, 0); - ir_type *type = new_type_primitive(mode); - set_type_size_bytes(type, 12); - set_type_alignment_bytes(type, 4); - p.type_long_double = type; + p.mode_float_arithmetic = ia32_mode_E; + p.type_long_double = ia32_type_E; } return &p; }