X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;ds=sidebyside;f=ir%2Fbe%2Fia32%2Fbearch_ia32.c;h=5c799f77a7c5989992b3dfb452d3e2789f39b2ca;hb=bba15007f36643c7c6f9281c8be00d8511bfb4f9;hp=592fdb7b80d664bfb6d3d5cc85e637e1690396ca;hpb=4eccff9cdc2a5e114606e8b83745f1339c83c932;p=libfirm diff --git a/ir/be/ia32/bearch_ia32.c b/ir/be/ia32/bearch_ia32.c index 592fdb7b8..5c799f77a 100644 --- a/ir/be/ia32/bearch_ia32.c +++ b/ir/be/ia32/bearch_ia32.c @@ -80,12 +80,10 @@ #include "ia32_common_transform.h" #include "ia32_transform.h" #include "ia32_emitter.h" -#include "ia32_map_regs.h" #include "ia32_optimize.h" #include "ia32_x87.h" #include "ia32_dbg_stat.h" #include "ia32_finish.h" -#include "ia32_util.h" #include "ia32_fpu.h" #include "ia32_architecture.h" @@ -97,10 +95,9 @@ transformer_t be_transformer = TRANSFORMER_DEFAULT; DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;) -ir_mode *mode_fpcw = NULL; +ir_mode *ia32_mode_fpcw = NULL; /** The current omit-fp state */ -static unsigned ia32_curr_fp_ommitted = 0; static ir_type *omit_fp_between_type = NULL; static ir_type *between_type = NULL; static ir_entity *old_bp_ent = NULL; @@ -193,7 +190,7 @@ static ir_node *ia32_get_admissible_noreg(ir_node *irn, int pos) static arch_irn_class_t ia32_classify(const ir_node *irn) { - arch_irn_class_t classification = 0; + arch_irn_class_t classification = arch_irn_class_none; assert(is_ia32_irn(irn)); @@ -259,149 +256,11 @@ static int ia32_get_sp_bias(const ir_node *node) if (is_ia32_Pop(node) || is_ia32_PopMem(node)) return -4; - return 0; -} - -/** - * Generate the routine prologue. - * - * @param self The callback object. - * @param mem A pointer to the mem node. Update this if you define new memory. - * @param reg_map A map mapping all callee_save/ignore/parameter registers to their defining nodes. - * @param stack_bias Points to the current stack bias, can be modified if needed. - * - * @return The register which shall be used as a stack frame base. - * - * All nodes which define registers in @p reg_map must keep @p reg_map current. - */ -static const arch_register_t *ia32_abi_prologue(void *self, ir_node **mem, pmap *reg_map, int *stack_bias) -{ - ia32_abi_env_t *env = self; - ir_graph *irg = env->irg; - const arch_env_t *arch_env = be_get_irg_arch_env(irg); - - ia32_curr_fp_ommitted = env->flags.try_omit_fp; - if (! env->flags.try_omit_fp) { - ir_node *bl = get_irg_start_block(env->irg); - ir_node *curr_sp = be_abi_reg_map_get(reg_map, arch_env->sp); - ir_node *curr_bp = be_abi_reg_map_get(reg_map, arch_env->bp); - ir_node *noreg = ia32_new_NoReg_gp(irg); - ir_node *push; - - /* mark bp register as ignore */ - be_set_constr_single_reg_out(get_Proj_pred(curr_bp), - get_Proj_proj(curr_bp), arch_env->bp, arch_register_req_type_ignore); - - /* push ebp */ - push = new_bd_ia32_Push(NULL, bl, noreg, noreg, *mem, curr_bp, curr_sp); - curr_sp = new_r_Proj(push, get_irn_mode(curr_sp), pn_ia32_Push_stack); - *mem = new_r_Proj(push, mode_M, pn_ia32_Push_M); - - /* the push must have SP out register */ - arch_set_irn_register(curr_sp, arch_env->sp); - - /* this modifies the stack bias, because we pushed 32bit */ - *stack_bias -= 4; - - /* move esp to ebp */ - curr_bp = be_new_Copy(arch_env->bp->reg_class, bl, curr_sp); - be_set_constr_single_reg_out(curr_bp, 0, arch_env->bp, - arch_register_req_type_ignore); - - /* beware: the copy must be done before any other sp use */ - curr_sp = be_new_CopyKeep_single(arch_env->sp->reg_class, bl, curr_sp, curr_bp, get_irn_mode(curr_sp)); - be_set_constr_single_reg_out(curr_sp, 0, arch_env->sp, - arch_register_req_type_produces_sp); - - be_abi_reg_map_set(reg_map, arch_env->sp, curr_sp); - be_abi_reg_map_set(reg_map, arch_env->bp, curr_bp); - - return arch_env->bp; - } - - return arch_env->sp; -} - -/** - * Generate the routine epilogue. - * @param self The callback object. - * @param bl The block for the epilog - * @param mem A pointer to the mem node. Update this if you define new memory. - * @param reg_map A map mapping all callee_save/ignore/parameter registers to their defining nodes. - * @return The register which shall be used as a stack frame base. - * - * All nodes which define registers in @p reg_map must keep @p reg_map current. - */ -static void ia32_abi_epilogue(void *self, ir_node *bl, ir_node **mem, pmap *reg_map) -{ - ia32_abi_env_t *env = self; - const arch_env_t *arch_env = be_get_irg_arch_env(env->irg); - ir_node *curr_sp = be_abi_reg_map_get(reg_map, arch_env->sp); - ir_node *curr_bp = be_abi_reg_map_get(reg_map, arch_env->bp); - - if (env->flags.try_omit_fp) { - /* simply remove the stack frame here */ - curr_sp = be_new_IncSP(arch_env->sp, bl, curr_sp, BE_STACK_FRAME_SIZE_SHRINK, 0); - } else { - ir_mode *mode_bp = arch_env->bp->reg_class->mode; - - if (ia32_cg_config.use_leave) { - ir_node *leave; - - /* leave */ - leave = new_bd_ia32_Leave(NULL, bl, curr_bp); - curr_bp = new_r_Proj(leave, mode_bp, pn_ia32_Leave_frame); - curr_sp = new_r_Proj(leave, get_irn_mode(curr_sp), pn_ia32_Leave_stack); - } else { - ir_node *pop; - - /* the old SP is not needed anymore (kill the proj) */ - assert(is_Proj(curr_sp)); - kill_node(curr_sp); - - /* copy ebp to esp */ - curr_sp = be_new_Copy(&ia32_reg_classes[CLASS_ia32_gp], bl, curr_bp); - arch_set_irn_register(curr_sp, arch_env->sp); - be_set_constr_single_reg_out(curr_sp, 0, arch_env->sp, - arch_register_req_type_ignore); - - /* pop ebp */ - pop = new_bd_ia32_PopEbp(NULL, bl, *mem, curr_sp); - curr_bp = new_r_Proj(pop, mode_bp, pn_ia32_Pop_res); - curr_sp = new_r_Proj(pop, get_irn_mode(curr_sp), pn_ia32_Pop_stack); - - *mem = new_r_Proj(pop, mode_M, pn_ia32_Pop_M); - } - arch_set_irn_register(curr_sp, arch_env->sp); - arch_set_irn_register(curr_bp, arch_env->bp); + if (is_ia32_Leave(node) || is_ia32_CopyEbpEsp(node)) { + return SP_BIAS_RESET; } - be_abi_reg_map_set(reg_map, arch_env->sp, curr_sp); - be_abi_reg_map_set(reg_map, arch_env->bp, curr_bp); -} - -/** - * Initialize the callback object. - * @param call The call object. - * @param irg The graph with the method. - * @return Some pointer. This pointer is passed to all other callback functions as self object. - */ -static void *ia32_abi_init(const be_abi_call_t *call, ir_graph *irg) -{ - ia32_abi_env_t *env = XMALLOC(ia32_abi_env_t); - be_abi_call_flags_t fl = be_abi_call_get_flags(call); - env->flags = fl.bits; - env->irg = irg; - return env; -} - -/** - * Destroy the callback object. - * @param self The callback object. - */ -static void ia32_abi_done(void *self) -{ - free(self); + return 0; } /** @@ -438,30 +297,31 @@ static void ia32_build_between_type(void) * it will contain the return address and space to store the old base pointer. * @return The Firm type modeling the ABI between type. */ -static ir_type *ia32_abi_get_between_type(void *self) +static ir_type *ia32_abi_get_between_type(ir_graph *irg) { - ia32_abi_env_t *env = self; - + const be_stack_layout_t *layout = be_get_irg_stack_layout(irg); ia32_build_between_type(); - return env->flags.try_omit_fp ? omit_fp_between_type : between_type; + return layout->sp_relative ? omit_fp_between_type : between_type; } /** * Return the stack entity that contains the return address. */ -ir_entity *ia32_get_return_address_entity(void) +ir_entity *ia32_get_return_address_entity(ir_graph *irg) { + const be_stack_layout_t *layout = be_get_irg_stack_layout(irg); ia32_build_between_type(); - return ia32_curr_fp_ommitted ? omit_fp_ret_addr_ent : ret_addr_ent; + return layout->sp_relative ? omit_fp_ret_addr_ent : ret_addr_ent; } /** * Return the stack entity that contains the frame address. */ -ir_entity *ia32_get_frame_address_entity(void) +ir_entity *ia32_get_frame_address_entity(ir_graph *irg) { + const be_stack_layout_t *layout = be_get_irg_stack_layout(irg); ia32_build_between_type(); - return ia32_curr_fp_ommitted ? NULL : old_bp_ent; + return layout->sp_relative ? NULL : old_bp_ent; } /** @@ -568,7 +428,6 @@ static arch_inverse_t *ia32_get_inverse(const ir_node *irn, int i, arch_inverse_ switch (get_ia32_irn_opcode(irn)) { case iro_ia32_Add: -#if 0 if (get_ia32_immop_type(irn) == ia32_ImmConst) { /* we have an add with a const here */ /* invers == add with negated const */ @@ -590,10 +449,8 @@ static arch_inverse_t *ia32_get_inverse(const ir_node *irn, int i, arch_inverse_ inverse->nodes[0] = new_bd_ia32_Sub(dbg, block, noreg, noreg, nomem, (ir_node*) irn, get_irn_n(irn, i ^ 1)); inverse->costs += 2; } -#endif break; case iro_ia32_Sub: -#if 0 if (get_ia32_immop_type(irn) != ia32_ImmNone) { /* we have a sub with a const/symconst here */ /* invers == add with this const */ @@ -611,10 +468,8 @@ static arch_inverse_t *ia32_get_inverse(const ir_node *irn, int i, arch_inverse_ } inverse->costs += 1; } -#endif break; case iro_ia32_Xor: -#if 0 if (get_ia32_immop_type(irn) != ia32_ImmNone) { /* xor with const: inverse = xor */ inverse->nodes[0] = new_bd_ia32_Xor(dbg, block, noreg, noreg, nomem, get_irn_n(irn, i), noreg); @@ -626,7 +481,6 @@ static arch_inverse_t *ia32_get_inverse(const ir_node *irn, int i, arch_inverse_ inverse->nodes[0] = new_bd_ia32_Xor(dbg, block, noreg, noreg, nomem, (ir_node *) irn, get_irn_n(irn, i)); inverse->costs += 1; } -#endif break; case iro_ia32_Not: { inverse->nodes[0] = new_bd_ia32_Not(dbg, block, (ir_node*) irn); @@ -771,11 +625,7 @@ static void ia32_perform_memory_operand(ir_node *irn, ir_node *spill, } static const be_abi_callbacks_t ia32_abi_callbacks = { - ia32_abi_init, - ia32_abi_done, ia32_abi_get_between_type, - ia32_abi_prologue, - ia32_abi_epilogue }; /* register allocator interface */ @@ -791,10 +641,11 @@ static const arch_irn_ops_t ia32_irn_ops = { }; static ir_entity *mcount = NULL; +static int gprof = 0; static void ia32_before_abi(ir_graph *irg) { - if (be_get_irg_options(irg)->gprof) { + if (gprof) { if (mcount == NULL) { ir_type *tp = new_type_method(0, 0); ident *id = new_id_from_str("mcount"); @@ -851,7 +702,7 @@ static void ia32_prepare_graph(ir_graph *irg) dump_ir_graph(irg, "place"); } -ir_node *turn_back_am(ir_node *node) +ir_node *ia32_turn_back_am(ir_node *node) { dbg_info *dbgi = get_irn_dbg_info(node); ir_graph *irg = get_irn_irg(node); @@ -929,7 +780,7 @@ static ir_node *flags_remat(ir_node *node, ir_node *after) type = get_ia32_op_type(node); switch (type) { case ia32_AddrModeS: - turn_back_am(node); + ia32_turn_back_am(node); break; case ia32_AddrModeD: @@ -977,7 +828,7 @@ static void transform_to_Load(ir_node *node) ir_node *noreg = ia32_new_NoReg_gp(irg); ir_node *sched_point = NULL; ir_node *ptr = get_irg_frame(irg); - ir_node *mem = get_irn_n(node, be_pos_Reload_mem); + ir_node *mem = get_irn_n(node, n_be_Reload_mem); ir_node *new_op, *proj; const arch_register_t *reg; @@ -1031,12 +882,12 @@ static void transform_to_Store(ir_node *node) dbg_info *dbg = get_irn_dbg_info(node); ir_node *block = get_nodes_block(node); ir_entity *ent = be_get_frame_entity(node); - const ir_node *spillval = get_irn_n(node, be_pos_Spill_val); + const ir_node *spillval = get_irn_n(node, n_be_Spill_val); ir_mode *mode = get_spill_mode(spillval); ir_node *noreg = ia32_new_NoReg_gp(irg); ir_node *nomem = new_r_NoMem(irg); ir_node *ptr = get_irg_frame(irg); - ir_node *val = get_irn_n(node, be_pos_Spill_val); + ir_node *val = get_irn_n(node, n_be_Spill_val); ir_node *store; ir_node *sched_point = NULL; @@ -1137,7 +988,7 @@ static void transform_MemPerm(ir_node *node) { ir_node *block = get_nodes_block(node); ir_graph *irg = get_irn_irg(node); - ir_node *sp = be_abi_get_ignore_irn(be_get_irg_abi(irg), &ia32_registers[REG_ESP]); + ir_node *sp = be_abi_get_ignore_irn(irg, &ia32_registers[REG_ESP]); int arity = be_get_MemPerm_entity_arity(node); ir_node **pops = ALLOCAN(ir_node*, arity); ir_node *in[1]; @@ -1250,7 +1101,7 @@ static void ia32_after_ra_walker(ir_node *block, void *env) */ static void ia32_collect_frame_entity_nodes(ir_node *node, void *data) { - be_fec_env_t *env = data; + be_fec_env_t *env = (be_fec_env_t*)data; const ir_mode *mode; int align; @@ -1319,20 +1170,161 @@ need_stackent: be_node_needs_frame_entity(env, node, mode, align); } +static int determine_ebp_input(ir_node *ret) +{ + const arch_register_t *bp = &ia32_registers[REG_EBP]; + int arity = get_irn_arity(ret); + int i; + + for (i = 0; i < arity; ++i) { + ir_node *input = get_irn_n(ret, i); + if (arch_get_irn_register(input) == bp) + return i; + } + panic("no ebp input found at %+F", ret); +} + +static void introduce_epilog(ir_node *ret) +{ + const arch_register_t *sp = &ia32_registers[REG_ESP]; + const arch_register_t *bp = &ia32_registers[REG_EBP]; + ir_graph *irg = get_irn_irg(ret); + ir_type *frame_type = get_irg_frame_type(irg); + unsigned frame_size = get_type_size_bytes(frame_type); + be_stack_layout_t *layout = be_get_irg_stack_layout(irg); + ir_node *block = get_nodes_block(ret); + ir_node *first_sp = get_irn_n(ret, n_be_Return_sp); + ir_node *curr_sp = first_sp; + ir_mode *mode_gp = mode_Iu; + + if (!layout->sp_relative) { + int n_ebp = determine_ebp_input(ret); + ir_node *curr_bp = get_irn_n(ret, n_ebp); + if (ia32_cg_config.use_leave) { + ir_node *leave = new_bd_ia32_Leave(NULL, block, curr_bp); + curr_bp = new_r_Proj(leave, mode_gp, pn_ia32_Leave_frame); + curr_sp = new_r_Proj(leave, mode_gp, pn_ia32_Leave_stack); + arch_set_irn_register(curr_bp, bp); + arch_set_irn_register(curr_sp, sp); + sched_add_before(ret, leave); + } else { + ir_node *pop; + ir_node *curr_mem = get_irn_n(ret, n_be_Return_mem); + /* copy ebp to esp */ + curr_sp = new_bd_ia32_CopyEbpEsp(NULL, block, curr_bp); + arch_set_irn_register(curr_sp, sp); + sched_add_before(ret, curr_sp); + + /* pop ebp */ + pop = new_bd_ia32_PopEbp(NULL, block, curr_mem, curr_sp); + curr_bp = new_r_Proj(pop, mode_gp, pn_ia32_PopEbp_res); + curr_sp = new_r_Proj(pop, mode_gp, pn_ia32_PopEbp_stack); + curr_mem = new_r_Proj(pop, mode_M, pn_ia32_Pop_M); + arch_set_irn_register(curr_bp, bp); + arch_set_irn_register(curr_sp, sp); + sched_add_before(ret, pop); + + set_irn_n(ret, n_be_Return_mem, curr_mem); + } + set_irn_n(ret, n_ebp, curr_bp); + } else { + ir_node *incsp = be_new_IncSP(sp, block, curr_sp, -(int)frame_size, 0); + sched_add_before(ret, incsp); + curr_sp = incsp; + } + set_irn_n(ret, n_be_Return_sp, curr_sp); + + /* keep verifier happy... */ + if (get_irn_n_edges(first_sp) == 0 && is_Proj(first_sp)) { + kill_node(first_sp); + } +} + +/** + * put the Prolog code at the beginning, epilog code before each return + */ +static void introduce_prolog_epilog(ir_graph *irg) +{ + const arch_register_t *sp = &ia32_registers[REG_ESP]; + const arch_register_t *bp = &ia32_registers[REG_EBP]; + ir_node *start = get_irg_start(irg); + ir_node *block = get_nodes_block(start); + ir_type *frame_type = get_irg_frame_type(irg); + unsigned frame_size = get_type_size_bytes(frame_type); + be_stack_layout_t *layout = be_get_irg_stack_layout(irg); + ir_node *initial_sp = be_abi_get_ignore_irn(irg, sp); + ir_node *curr_sp = initial_sp; + ir_mode *mode_gp = mode_Iu; + + if (!layout->sp_relative) { + /* push ebp */ + ir_node *mem = get_irg_initial_mem(irg); + ir_node *noreg = ia32_new_NoReg_gp(irg); + ir_node *initial_bp = be_abi_get_ignore_irn(irg, bp); + ir_node *curr_bp = initial_bp; + ir_node *push = new_bd_ia32_Push(NULL, block, noreg, noreg, mem, curr_bp, curr_sp); + ir_node *incsp; + + curr_sp = new_r_Proj(push, mode_gp, pn_ia32_Push_stack); + mem = new_r_Proj(push, mode_M, pn_ia32_Push_M); + arch_set_irn_register(curr_sp, sp); + sched_add_after(start, push); + + /* move esp to ebp */ + curr_bp = be_new_Copy(bp->reg_class, block, curr_sp); + sched_add_after(push, curr_bp); + be_set_constr_single_reg_out(curr_bp, 0, bp, arch_register_req_type_ignore); + curr_sp = be_new_CopyKeep_single(sp->reg_class, block, curr_sp, curr_bp, mode_gp); + sched_add_after(curr_bp, curr_sp); + be_set_constr_single_reg_out(curr_sp, 0, sp, arch_register_req_type_produces_sp); + edges_reroute(initial_bp, curr_bp); + set_irn_n(push, n_ia32_Push_val, initial_bp); + + incsp = be_new_IncSP(sp, block, curr_sp, frame_size, 0); + edges_reroute(initial_sp, incsp); + set_irn_n(push, n_ia32_Push_stack, initial_sp); + sched_add_after(curr_sp, incsp); + + layout->initial_bias = -4; + } else { + ir_node *incsp = be_new_IncSP(sp, block, curr_sp, frame_size, 0); + edges_reroute(initial_sp, incsp); + be_set_IncSP_pred(incsp, curr_sp); + sched_add_after(start, incsp); + } + + /* introduce epilog for every return node */ + { + ir_node *end_block = get_irg_end_block(irg); + int arity = get_irn_arity(end_block); + int i; + + for (i = 0; i < arity; ++i) { + ir_node *ret = get_irn_n(end_block, i); + assert(be_is_Return(ret)); + introduce_epilog(ret); + } + } +} + /** * We transform Spill and Reload here. This needs to be done before * stack biasing otherwise we would miss the corrected offset for these nodes. */ static void ia32_after_ra(ir_graph *irg) { - be_fec_env_t *fec_env = be_new_frame_entity_coalescer(irg); + be_stack_layout_t *stack_layout = be_get_irg_stack_layout(irg); + bool at_begin = stack_layout->sp_relative ? true : false; + be_fec_env_t *fec_env = be_new_frame_entity_coalescer(irg); /* create and coalesce frame entities */ irg_walk_graph(irg, NULL, ia32_collect_frame_entity_nodes, fec_env); - be_assign_entities(fec_env, ia32_set_frame_entity); + be_assign_entities(fec_env, ia32_set_frame_entity, at_begin); be_free_frame_entity_coalescer(fec_env); irg_block_walk_graph(irg, NULL, ia32_after_ra_walker, NULL); + + introduce_prolog_epilog(irg); } /** @@ -1348,7 +1340,7 @@ static void ia32_finish(ir_graph *irg) /* we might have to rewrite x87 virtual registers */ if (irg_data->do_x87_sim) { - x87_simulate_graph(irg); + ia32_x87_simulate_graph(irg); } /* do peephole optimisations */ @@ -1387,7 +1379,6 @@ static ir_node *ia32_get_pic_base(ir_graph *irg) get_eip = new_bd_ia32_GetEIP(NULL, block); irg_data->get_eip = get_eip; - be_dep_on_frame(get_eip); return get_eip; } @@ -1401,7 +1392,7 @@ static void ia32_init_graph(ir_graph *irg) irg_data->dump = (be_get_irg_options(irg)->dump_flags & DUMP_BE) ? 1 : 0; - if (be_get_irg_options(irg)->gprof) { + if (gprof) { /* Linux gprof implementation needs base pointer */ be_get_irg_options(irg)->omit_fp = 0; } @@ -1424,17 +1415,17 @@ static const tarval_mode_info mo_integer = { */ static void set_tarval_output_modes(void) { - int i; + size_t i; - for (i = get_irp_n_modes() - 1; i >= 0; --i) { - ir_mode *mode = get_irp_mode(i); + for (i = get_irp_n_modes(); i > 0;) { + ir_mode *mode = get_irp_mode(--i); if (mode_is_int(mode)) set_tarval_mode_output_option(mode, &mo_integer); } } -const arch_isa_if_t ia32_isa_if; +extern const arch_isa_if_t ia32_isa_if; /** * The template that generates a new ISA object. @@ -1451,16 +1442,12 @@ static ia32_isa_t ia32_isa_template = { &ia32_registers[REG_ESP], /* stack pointer register */ &ia32_registers[REG_EBP], /* base pointer register */ &ia32_reg_classes[CLASS_ia32_gp], /* static link pointer register class */ - -1, /* stack direction */ 2, /* power of two stack alignment, 2^2 == 4 */ NULL, /* main environment */ 7, /* costs for a spill instruction */ 5, /* costs for a reload instruction */ false, /* no custom abi handling */ }, - NULL, /* 16bit register names */ - NULL, /* 8bit register names */ - NULL, /* 8bit register names high */ NULL, /* types */ NULL, /* tv_ents */ NULL, /* abstract machine */ @@ -1518,54 +1505,27 @@ static void init_asm_constraints(void) */ static arch_env_t *ia32_init(FILE *file_handle) { - static int inited = 0; - ia32_isa_t *isa; - int i, n; - - if (inited) - return NULL; - inited = 1; + ia32_isa_t *isa = XMALLOC(ia32_isa_t); set_tarval_output_modes(); - isa = XMALLOC(ia32_isa_t); memcpy(isa, &ia32_isa_template, sizeof(*isa)); - if (mode_fpcw == NULL) { - mode_fpcw = new_ir_mode("Fpcw", irms_int_number, 16, 0, irma_none, 0); + if (ia32_mode_fpcw == NULL) { + ia32_mode_fpcw = new_ir_mode("Fpcw", irms_int_number, 16, 0, irma_none, 0); } ia32_register_init(); ia32_create_opcodes(&ia32_irn_ops); be_emit_init(file_handle); - isa->regs_16bit = pmap_create(); - isa->regs_8bit = pmap_create(); - isa->regs_8bit_high = pmap_create(); isa->types = pmap_create(); isa->tv_ent = pmap_create(); isa->cpu = ia32_init_machine_description(); - ia32_build_16bit_reg_map(isa->regs_16bit); - ia32_build_8bit_reg_map(isa->regs_8bit); - ia32_build_8bit_reg_map_high(isa->regs_8bit_high); - /* enter the ISA object into the intrinsic environment */ intrinsic_env.isa = isa; - /* emit asm includes */ - n = get_irp_n_asms(); - for (i = 0; i < n; ++i) { - be_emit_cstring("#APP\n"); - be_emit_ident(get_irp_asm(i)); - be_emit_cstring("\n#NO_APP\n"); - } - - /* needed for the debug support */ - be_gas_emit_switch_section(GAS_SECTION_TEXT); - be_emit_irprintf("%stext0:\n", be_gas_get_private_prefix()); - be_emit_write_line(); - return &isa->base; } @@ -1576,14 +1536,11 @@ static arch_env_t *ia32_init(FILE *file_handle) */ static void ia32_done(void *self) { - ia32_isa_t *isa = self; + ia32_isa_t *isa = (ia32_isa_t*)self; /* emit now all global declarations */ be_gas_emit_decls(isa->base.main_env); - pmap_destroy(isa->regs_16bit); - pmap_destroy(isa->regs_8bit); - pmap_destroy(isa->regs_8bit_high); pmap_destroy(isa->tv_ent); pmap_destroy(isa->types); @@ -1839,19 +1796,15 @@ static void ia32_mark_remat(ir_node *node) static bool mux_is_float_min_max(ir_node *sel, ir_node *mux_true, ir_node *mux_false) { - ir_node *cmp_l; - ir_node *cmp_r; - ir_node *cmp; - pn_Cmp pnc; + ir_node *cmp_l; + ir_node *cmp_r; + ir_relation relation; - if (!is_Proj(sel)) - return false; - cmp = get_Proj_pred(sel); - if (!is_Cmp(cmp)) + if (!is_Cmp(sel)) return false; - cmp_l = get_Cmp_left(cmp); - cmp_r = get_Cmp_right(cmp); + cmp_l = get_Cmp_left(sel); + cmp_r = get_Cmp_right(sel); if (!mode_is_float(get_irn_mode(cmp_l))) return false; @@ -1862,28 +1815,28 @@ static bool mux_is_float_min_max(ir_node *sel, ir_node *mux_true, * or max(a, b) = a >= b ? a : b * (Note we only handle float min/max here) */ - pnc = get_Proj_proj(sel); - switch (pnc) { - case pn_Cmp_Ge: - case pn_Cmp_Gt: + relation = get_Cmp_relation(sel); + switch (relation) { + case ir_relation_greater_equal: + case ir_relation_greater: /* this is a max */ if (cmp_l == mux_true && cmp_r == mux_false) return true; break; - case pn_Cmp_Le: - case pn_Cmp_Lt: + case ir_relation_less_equal: + case ir_relation_less: /* this is a min */ if (cmp_l == mux_true && cmp_r == mux_false) return true; break; - case pn_Cmp_Uge: - case pn_Cmp_Ug: + case ir_relation_unordered_greater_equal: + case ir_relation_unordered_greater: /* this is a min */ if (cmp_l == mux_false && cmp_r == mux_true) return true; break; - case pn_Cmp_Ule: - case pn_Cmp_Ul: + case ir_relation_unordered_less_equal: + case ir_relation_unordered_less: /* this is a max */ if (cmp_l == mux_false && cmp_r == mux_true) return true; @@ -1906,7 +1859,8 @@ static bool mux_is_set(ir_node *sel, ir_node *mux_true, ir_node *mux_false) return false; if (is_Const(mux_true) && is_Const(mux_false)) { - /* we can create a set plus up two 3 instructions for any combination of constants */ + /* we can create a set plus up two 3 instructions for any combination + * of constants */ return true; } @@ -1926,35 +1880,30 @@ static bool mux_is_float_const_const(ir_node *sel, ir_node *mux_true, static bool mux_is_doz(ir_node *sel, ir_node *mux_true, ir_node *mux_false) { - ir_node *cmp; - ir_node *cmp_left; - ir_node *cmp_right; - ir_node *sub_left; - ir_node *sub_right; - ir_mode *mode; - long pn; - - if (!is_Proj(sel)) - return false; + ir_node *cmp_left; + ir_node *cmp_right; + ir_node *sub_left; + ir_node *sub_right; + ir_mode *mode; + ir_relation relation; - cmp = get_Proj_pred(sel); - if (!is_Cmp(cmp)) + if (!is_Cmp(sel)) return false; mode = get_irn_mode(mux_true); if (mode_is_signed(mode) || mode_is_float(mode)) return false; - pn = get_Proj_proj(sel); - cmp_left = get_Cmp_left(cmp); - cmp_right = get_Cmp_right(cmp); + relation = get_Cmp_relation(sel); + cmp_left = get_Cmp_left(sel); + cmp_right = get_Cmp_right(sel); /* "move" zero constant to false input */ if (is_Const(mux_true) && is_Const_null(mux_true)) { ir_node *tmp = mux_false; mux_false = mux_true; mux_true = tmp; - pn = get_negated_pnc(pn, mode); + relation = get_negated_relation(relation); } if (!is_Const(mux_false) || !is_Const_null(mux_false)) return false; @@ -1964,11 +1913,11 @@ static bool mux_is_doz(ir_node *sel, ir_node *mux_true, ir_node *mux_false) sub_right = get_Sub_right(mux_true); /* Mux(a >=u b, 0, a-b) */ - if ((pn == pn_Cmp_Gt || pn == pn_Cmp_Ge) + if ((relation & ir_relation_greater) && sub_left == cmp_left && sub_right == cmp_right) return true; /* Mux(a <=u b, 0, b-a) */ - if ((pn == pn_Cmp_Lt || pn == pn_Cmp_Le) + if ((relation & ir_relation_less) && sub_left == cmp_right && sub_right == cmp_left) return true; @@ -2014,19 +1963,16 @@ static int ia32_is_mux_allowed(ir_node *sel, ir_node *mux_false, return true; /* Check Cmp before the node */ - if (is_Proj(sel)) { - ir_node *cmp = get_Proj_pred(sel); - if (is_Cmp(cmp)) { - ir_mode *cmp_mode = get_irn_mode(get_Cmp_left(cmp)); - - /* we can't handle 64bit compares */ - if (get_mode_size_bits(cmp_mode) > 32) - return false; - - /* we can't handle float compares */ - if (mode_is_float(cmp_mode)) - return false; - } + if (is_Cmp(sel)) { + ir_mode *cmp_mode = get_irn_mode(get_Cmp_left(sel)); + + /* we can't handle 64bit compares */ + if (get_mode_size_bits(cmp_mode) > 32) + return false; + + /* we can't handle float compares */ + if (mode_is_float(cmp_mode)) + return false; } /* did we disable cmov generation? */ @@ -2061,13 +2007,19 @@ static ir_node *ia32_create_set(ir_node *cond) static void ia32_lower_for_target(void) { - int n_irgs = get_irp_n_irgs(); - int i; + size_t i, n_irgs = get_irp_n_irgs(); lower_mode_b_config_t lower_mode_b_config = { mode_Iu, /* lowered mode */ ia32_create_set, 0, /* don't lower direct compares */ }; + lower_params_t params = { + 4, /* def_ptr_alignment */ + LF_COMPOUND_RETURN | LF_RETURN_HIDDEN, /* flags */ + ADD_HIDDEN_ALWAYS_IN_FRONT, /* hidden_params */ + NULL, /* find pointer type */ + NULL, /* ret_compound_in_regs */ + }; /* perform doubleword lowering */ lwrdw_param_t lower_dw_params = { @@ -2076,6 +2028,10 @@ static void ia32_lower_for_target(void) ia32_create_intrinsic_fkt, &intrinsic_env, }; + + /* lower compound param handling */ + lower_calls_with_compounds(¶ms); + lower_dw_ops(&lower_dw_params); for (i = 0; i < n_irgs; ++i) { @@ -2098,17 +2054,17 @@ static ir_node *ia32_create_trampoline_fkt(ir_node *block, ir_node *mem, ir_node ir_node *st; /* mov ecx, */ - st = new_r_Store(block, mem, p, new_r_Const_long(irg, mode_Bu, 0xb9), 0); + st = new_r_Store(block, mem, p, new_r_Const_long(irg, mode_Bu, 0xb9), cons_none); mem = new_r_Proj(st, mode_M, pn_Store_M); p = new_r_Add(block, p, new_r_Const_long(irg, mode_Iu, 1), mode); - st = new_r_Store(block, mem, p, env, 0); + st = new_r_Store(block, mem, p, env, cons_none); mem = new_r_Proj(st, mode_M, pn_Store_M); p = new_r_Add(block, p, new_r_Const_long(irg, mode_Iu, 4), mode); /* jmp */ - st = new_r_Store(block, mem, p, new_r_Const_long(irg, mode_Bu, 0xe9), 0); + st = new_r_Store(block, mem, p, new_r_Const_long(irg, mode_Bu, 0xe9), cons_none); mem = new_r_Proj(st, mode_M, pn_Store_M); p = new_r_Add(block, p, new_r_Const_long(irg, mode_Iu, 1), mode); - st = new_r_Store(block, mem, p, callee, 0); + st = new_r_Store(block, mem, p, callee, cons_none); mem = new_r_Proj(st, mode_M, pn_Store_M); p = new_r_Add(block, p, new_r_Const_long(irg, mode_Iu, 4), mode); @@ -2123,7 +2079,7 @@ static const backend_params *ia32_get_libfirm_params(void) static const ir_settings_arch_dep_t ad = { 1, /* also use subs */ 4, /* maximum shifts */ - 31, /* maximum shift amount */ + 63, /* maximum shift amount */ ia32_evaluate_insn, /* evaluate the instruction sequence */ 1, /* allow Mulhs */ @@ -2134,7 +2090,6 @@ static const backend_params *ia32_get_libfirm_params(void) 1, /* support inline assembly */ 1, /* support Rotl nodes */ 0, /* little endian */ - ia32_lower_for_target, NULL, /* will be set later */ ia32_is_mux_allowed, NULL, /* float arithmetic mode, will be set below */ @@ -2185,13 +2140,15 @@ static const lc_opt_table_entry_t ia32_options[] = { #ifdef FIRM_GRGEN_BE LC_OPT_ENT_ENUM_INT("transformer", "the transformer used for code selection", &transformer_var), #endif - LC_OPT_ENT_INT("stackalign", "set power of two stack alignment for calls", - &ia32_isa_template.base.stack_alignment), + LC_OPT_ENT_INT ("stackalign", "set power of two stack alignment for calls", + &ia32_isa_template.base.stack_alignment), + LC_OPT_ENT_BOOL("gprof", "create gprof profiling code", &gprof), LC_OPT_LAST }; const arch_isa_if_t ia32_isa_if = { ia32_init, + ia32_lower_for_target, ia32_done, ia32_handle_intrinsics, ia32_get_reg_class_for_mode,