X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;ds=sidebyside;f=ir%2Fbe%2Fbechordal_common.c;h=d9bea04a2c6f9dbea39b1215976cdc8098761d97;hb=29087feac9466883c278e53eec325d5e3099df1d;hp=2000a06c4fd6890f0c6fc54ca4bd5bd8eb930b1c;hpb=9486037955a5bb2221dfd2bd6cc0b120ee68cf2c;p=libfirm diff --git a/ir/be/bechordal_common.c b/ir/be/bechordal_common.c index 2000a06c4..d9bea04a2 100644 --- a/ir/be/bechordal_common.c +++ b/ir/be/bechordal_common.c @@ -59,10 +59,10 @@ static inline border_t *border_add(be_chordal_env_t *env, struct list_head *head if (!is_def) { border_t *def; - b = OALLOC(env->obst, border_t); + b = OALLOC(&env->obst, border_t); /* also allocate the def and tie it to the use. */ - def = OALLOCZ(env->obst, border_t); + def = OALLOCZ(&env->obst, border_t); b->other_end = def; def->other_end = b; @@ -119,7 +119,7 @@ void create_borders(ir_node *block, void *env_ptr) bitset_clear_all(live); /* Set up the border list in the block info */ - head = OALLOC(env->obst, struct list_head); + head = OALLOC(&env->obst, struct list_head); INIT_LIST_HEAD(head); assert(pmap_get(struct list_head, env->border_heads, block) == NULL); pmap_insert(env->border_heads, block, head); @@ -128,12 +128,10 @@ void create_borders(ir_node *block, void *env_ptr) * Make final uses of all values live out of the block. * They are necessary to build up real intervals. */ - be_lv_foreach(lv, block, be_lv_state_end, irn) { - if (arch_irn_consider_in_reg_alloc(env->cls, irn)) { - DBG((dbg, LEVEL_3, "\tMaking live: %+F/%d\n", irn, get_irn_idx(irn))); - bitset_set(live, get_irn_idx(irn)); - border_use(irn, step, 0); - } + be_lv_foreach_cls(lv, block, be_lv_state_end, env->cls, irn) { + DB((dbg, LEVEL_3, "\tMaking live: %+F/%d\n", irn, get_irn_idx(irn))); + bitset_set(live, get_irn_idx(irn)); + border_use(irn, step, 0); } ++step; @@ -142,57 +140,35 @@ void create_borders(ir_node *block, void *env_ptr) * relevant for the interval borders. */ sched_foreach_reverse(block, irn) { - DBG((dbg, LEVEL_1, "\tinsn: %+F, pressure: %d\n", irn, pressure)); - DBG((dbg, LEVEL_2, "\tlive: %B\n", live)); - - if (get_irn_mode(irn) == mode_T) { - foreach_out_edge(irn, edge) { - ir_node *proj = get_edge_src_irn(edge); - - /* - * If the node defines some value, which can put into a - * register of the current class, make a border for it. - */ - if (arch_irn_consider_in_reg_alloc(env->cls, proj)) { - int nr = get_irn_idx(proj); - - bitset_clear(live, nr); - border_def(proj, step, 1); - } - } - } else { + DB((dbg, LEVEL_1, "\tinsn: %+F, pressure: %d\n", irn, pressure)); + DB((dbg, LEVEL_2, "\tlive: %B\n", live)); + + be_foreach_definition(irn, env->cls, def, req, /* * If the node defines some value, which can put into a * register of the current class, make a border for it. */ - if (arch_irn_consider_in_reg_alloc(env->cls, irn)) { - int nr = get_irn_idx(irn); - - bitset_clear(live, nr); - border_def(irn, step, 1); - } - } + unsigned idx = get_irn_idx(def); + bitset_clear(live, idx); + border_def(def, step, 1); + ); /* * If the node is no phi node we can examine the uses. */ if (!is_Phi(irn)) { - for (int i = 0, n = get_irn_arity(irn); i < n; ++i) { - ir_node *op = get_irn_n(irn, i); - - if (arch_irn_consider_in_reg_alloc(env->cls, op)) { - int nr = get_irn_idx(op); - const char *msg = "-"; - - if (!bitset_is_set(live, nr)) { - border_use(op, step, 1); - bitset_set(live, nr); - msg = "X"; - } - - DBG((dbg, LEVEL_4, "\t\t%s pos: %d, use: %+F\n", msg, i, op)); + be_foreach_use(irn, env->cls, in_req_, op, op_req_, + unsigned idx = get_irn_idx(op); + const char *msg = "-"; + + if (!bitset_is_set(live, idx)) { + border_use(op, step, 1); + bitset_set(live, idx); + msg = "X"; } - } + + DB((dbg, LEVEL_4, "\t\t%s pos: %d, use: %+F\n", msg, i_, op)); + ); } ++step; } @@ -214,7 +190,8 @@ ir_node *pre_process_constraints(be_chordal_env_t *env, be_insn_t **the_insn) * Make the Perm, recompute liveness and re-scan the insn since the * in operands are now the Projs of the Perm. */ - ir_node *const perm = insert_Perm_before(env->irg, env->cls, insn->irn); + ir_node *const irn = insn->irn; + ir_node *const perm = insert_Perm_before(env->irg, env->cls, irn); /* Registers are propagated by insert_Perm_before(). Clean them here! */ if (perm == NULL) @@ -227,24 +204,24 @@ ir_node *pre_process_constraints(be_chordal_env_t *env, be_insn_t **the_insn) * the Perm. Recomputing liveness is also a good idea if a Perm is inserted, since * the live sets may change. */ - obstack_free(env->obst, insn); - *the_insn = insn = be_scan_insn(env, insn->irn); + obstack_free(&env->obst, insn); + *the_insn = insn = be_scan_insn(env, irn); - /* - * Copy the input constraints of the insn to the Perm as output - * constraints. Succeeding phases (coalescing) will need that. - */ - for (int i = insn->use_start; i < insn->n_ops; ++i) { - be_operand_t *op = &insn->ops[i]; - ir_node *proj = op->carrier; + /* Copy the input constraints of the irn to the Perm as output + * constraints. Succeeding phases (coalescing) will need that. */ + for (int i = 0, n = get_irn_arity(irn); i != n; ++i) { + ir_node *const proj = get_irn_n(irn, i); /* Note that the predecessor is not necessarily a Proj of the Perm, * since ignore-nodes are not Perm'ed. */ + if (!is_Proj(proj) || get_Proj_pred(proj) != perm) + continue; /* FIXME: Only setting the constraints, when the register requirement is * limited, is a hack. It will break when multiple differently constrained * inputs use the same value. */ - if (arch_register_req_is(op->req, limited) && is_Proj(proj) && get_Proj_pred(proj) == perm) { - be_set_constr_out(perm, get_Proj_proj(proj), op->req); - } + arch_register_req_t const *const req = arch_get_irn_register_req_in(irn, i); + if (!arch_register_req_is(req, limited)) + continue; + be_set_constr_out(perm, get_Proj_proj(proj), req); } return perm;