X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;ds=sidebyside;f=ir%2Fbe%2Fbearch_t.h;h=e85c872fa0e49bbb2225e0155bae370d6ab3241f;hb=38efd2ac16aa827ae9f07acc9ebfc7d74422290e;hp=4402cc4ec658b25b99ffd9e690acd727cfc8dbd7;hpb=d6768d8d4427959eb045aafb1d15bd189beaa5dd;p=libfirm diff --git a/ir/be/bearch_t.h b/ir/be/bearch_t.h index 4402cc4ec..e85c872fa 100644 --- a/ir/be/bearch_t.h +++ b/ir/be/bearch_t.h @@ -1,5 +1,5 @@ /* - * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved. + * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved. * * This file is part of libFirm. * @@ -33,6 +33,7 @@ #include "bemachine.h" #include "beirg.h" #include "beabi.h" +#include "raw_bitset.h" /** * A register. @@ -40,7 +41,7 @@ struct arch_register_t { const char *name; /**< The name of the register. */ const arch_register_class_t *reg_class; /**< The class the register belongs to. */ - int index; /**< The index of the register in the class. */ + unsigned index; /**< The index of the register in the class. */ arch_register_type_t type; /**< The type of the register. */ void *data; /**< Custom data. */ }; @@ -51,12 +52,14 @@ _arch_register_get_class(const arch_register_t *reg) return reg->reg_class; } -static INLINE int _arch_register_get_index(const arch_register_t *reg) +static INLINE +unsigned _arch_register_get_index(const arch_register_t *reg) { return reg->index; } -static INLINE const char *_arch_register_get_name(const arch_register_t *reg) +static INLINE +const char *_arch_register_get_name(const arch_register_t *reg) { return reg->name; } @@ -79,10 +82,13 @@ static INLINE const char *_arch_register_get_name(const arch_register_t *reg) * Like general purpose or floating point. */ struct arch_register_class_t { - const char *name; /**< The name of the register class. */ - int n_regs; /**< Number of registers in this class. */ - ir_mode *mode; /**< The mode of the register class. */ - const arch_register_t *regs; /**< The array of registers. */ + unsigned index; /**< index of this register class */ + const char *name; /**< The name of the register class.*/ + unsigned n_regs; /**< Number of registers in this + class. */ + ir_mode *mode; /**< The mode of the register class.*/ + const arch_register_t *regs; /**< The array of registers. */ + arch_register_class_flags_t flags; /**< register class flags. */ }; /** return the number of registers in this register class */ @@ -94,10 +100,16 @@ struct arch_register_class_t { /** return the name of this register class */ #define arch_register_class_name(cls) ((cls)->name) +/** return the index of this register class */ +#define arch_register_class_index(cls) ((cls)->index) + +/** return the register class flags */ +#define arch_register_class_flags(cls) ((cls)->flags) + static INLINE const arch_register_t * -_arch_register_for_index(const arch_register_class_t *cls, int idx) +_arch_register_for_index(const arch_register_class_t *cls, unsigned idx) { - assert(0 <= idx && idx < cls->n_regs); + assert(idx < cls->n_regs); return &cls->regs[idx]; } @@ -121,17 +133,38 @@ struct arch_register_req_t { const unsigned *limited; /**< allowed register bitset */ - int other_same; /**< The in number which shall have - the same res (should_be_same)*/ - int other_different; /**< The other node from which this - one's register must be different - (case must_be_different). */ + unsigned other_same; /**< Bitmask of ins which should use the + same register (should_be_same). */ + unsigned other_different; /**< Bitmask of ins which shall use a + different register + (must_be_different) */ }; -struct arch_flag_t { - const char *name; - unsigned index; -}; +static INLINE int reg_reqs_equal(const arch_register_req_t *req1, + const arch_register_req_t *req2) +{ + if (req1 == req2) + return 1; + + if (req1->type != req2->type + || req1->cls != req2->cls + || req1->other_same != req2->other_same + || req1->other_different != req2->other_different) + return 0; + + if (req1->limited != NULL) { + size_t n_regs; + + if (req2->limited == NULL) + return 0; + + n_regs = arch_register_class_n_regs(req1->cls); + if (!rbitset_equal(req1->limited, req2->limited, n_regs)) + return 0; + } + + return 1; +} /** * An inverse operation returned by the backend @@ -285,21 +318,6 @@ struct arch_irn_ops_t { const arch_irn_ops_if_t *impl; }; -/** - * Somebody who can be asked about IR nodes. - */ -struct arch_irn_handler_t { - - /** - * Get the operations of an irn. - * @param self The handler from which the method is invoked. - * @param irn Some node. - * @return Operations for that irn. - */ - const void *(*get_irn_ops)(const arch_irn_handler_t *handler, - const ir_node *irn); -}; - /** * The code generator interface. */ @@ -311,6 +329,11 @@ struct arch_code_generator_if_t { */ void *(*init)(be_irg_t *birg); + /** + * return node used as base in pic code addresses + */ + ir_node* (*get_pic_base)(void *self); + /** * Called before abi introduce. */ @@ -381,6 +404,8 @@ do { \ #define arch_code_generator_done(cg) _arch_cg_call(cg, done) #define arch_code_generator_spill(cg, birg) _arch_cg_call_env(cg, birg, spill) #define arch_code_generator_has_spiller(cg) ((cg)->impl->spill != NULL) +#define arch_code_generator_get_pic_base(cg) \ + ((cg)->impl->get_pic_base != NULL ? (cg)->impl->get_pic_base(cg) : NULL) /** * Code generator base class. @@ -396,8 +421,11 @@ struct arch_isa_t { const arch_isa_if_t *impl; const arch_register_t *sp; /** The stack pointer register. */ const arch_register_t *bp; /** The base pointer register. */ - const int stack_dir; /** -1 for decreasing, 1 for increasing. */ + int stack_dir; /** -1 for decreasing, 1 for increasing. */ + int stack_alignment; /** stack alignment */ const be_main_env_t *main_env; /** the be main environment */ + int spill_cost; /** cost for a be_Spill node */ + int reload_cost; /** cost for a be_Reload node */ }; #define arch_isa_stack_dir(isa) ((isa)->stack_dir) @@ -425,14 +453,14 @@ struct arch_isa_if_t { * Get the the number of register classes in the isa. * @return The number of register classes. */ - int (*get_n_reg_class)(const void *self); + unsigned (*get_n_reg_class)(const void *self); /** * Get the i-th register class. * @param i The number of the register class. * @return The register class. */ - const arch_register_class_t *(*get_reg_class)(const void *self, int i); + const arch_register_class_t *(*get_reg_class)(const void *self, unsigned i); /** * Get the register class which shall be used to store a value of a given mode. @@ -445,18 +473,17 @@ struct arch_isa_if_t { /** * Get the ABI restrictions for procedure calls. * @param self The this pointer. - * @param method_type The type of the method (procedure) in question. + * @param call_type The call type of the method (procedure) in question. * @param p The array of parameter locations to be filled. */ - void (*get_call_abi)(const void *self, ir_type *method_type, be_abi_call_t *abi); + void (*get_call_abi)(const void *self, ir_type *call_type, be_abi_call_t *abi); /** * The irn handler for this architecture. * The irn handler is registered by the Firm back end * when the architecture is initialized. - * (May be NULL). */ - const arch_irn_handler_t *(*get_irn_handler)(const void *self); + arch_get_irn_ops_t *(*get_irn_handler)(const void *self); /** * Get the code generator interface. @@ -498,7 +525,8 @@ struct arch_isa_if_t { /** * Returns an 2-dim array of execution units, @p irn can be executed on. - * The first dimension is the type, the second the allowed units of this type. + * The first dimension is the type, the second the allowed units of this + * type. * Each dimension is a NULL terminated list. * @param self The isa object. * @param irn The node. @@ -520,10 +548,10 @@ struct arch_isa_if_t { /** * Return an ordered list of irgs where code should be generated for. - * If NULL is returned, all irg will be taken into account and they will be - * generated in an arbitrary order. + * If NULL is returned, all irg will be taken into account and they will be + * generated in an arbitrary order. * @param self The isa object. - * @param irgs A flexible array ARR_F of length 0 where the backend cann append the desired irgs. + * @param irgs A flexible array ARR_F of length 0 where the backend can append the desired irgs. * @return A flexible array ARR_F containing all desired irgs in the desired order. */ ir_graph **(*get_backend_irg_list)(const void *self, ir_graph ***irgs); @@ -540,20 +568,14 @@ struct arch_isa_if_t { #define arch_isa_get_machine(isa) ((isa)->impl->get_machine((isa))) #define arch_isa_get_backend_irg_list(isa, irgs) ((isa)->impl->get_backend_irg_list((isa), (irgs))) -#define ARCH_MAX_HANDLERS 8 - /** * Environment for the architecture infrastructure. * Keep this everywhere you're going. */ struct arch_env_t { - arch_isa_t *isa; /**< The isa about which everything is. */ - - arch_irn_handler_t const *handlers[ARCH_MAX_HANDLERS]; /**< The handlers are organized as - a stack. */ + arch_isa_t *isa; /**< The isa about which everything is. */ - int handlers_tos; /**< The stack pointer of the handler - stack. */ + arch_get_irn_ops_t *arch_handler; /**< The get_irn_ops handler for the selected architecture. */ }; /**