X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;ds=sidebyside;f=ir%2Fbe%2Farm%2Fbearch_arm.c;h=e4a350e1808604b7a179f28d6942148b5cee990b;hb=78a7ccdf4f405f1bd41e82f60b6e996a75f631fb;hp=0503bcc1c75bdd6a2b799887b244c7b0d1174fd3;hpb=ee3a6ec345c917df7b019e74da96283a5c6e2c88;p=libfirm

diff --git a/ir/be/arm/bearch_arm.c b/ir/be/arm/bearch_arm.c
index 0503bcc1c..e4a350e18 100644
--- a/ir/be/arm/bearch_arm.c
+++ b/ir/be/arm/bearch_arm.c
@@ -92,7 +92,7 @@ arch_register_req_t *arm_get_irn_reg_req(const void *self, const ir_node *node,
 	ir_mode           *mode     = get_irn_mode(node);
 	(void) self;
 
-	if (is_Block(node) || mode == mode_X || mode == mode_M) {
+	if (is_Block(node) || mode == mode_X) {
 		return arch_no_register_req;
 	}
 
@@ -101,8 +101,9 @@ arch_register_req_t *arm_get_irn_reg_req(const void *self, const ir_node *node,
 	}
 
 	if (is_Proj(node)) {
-		/* in case of a proj, we need to get the correct OUT slot */
-		/* of the node corresponding to the proj number */
+		if(mode == mode_M)
+			return arch_no_register_req;
+
 		if(pos >= 0) {
 			return arch_no_register_req;
 		}
@@ -222,7 +223,11 @@ static ir_entity *arm_get_frame_entity(const void *self, const ir_node *irn)
 	return NULL;
 }
 
-static void arm_set_frame_entity(const void *self, ir_node *irn, ir_entity *ent) {
+static void arm_set_frame_entity(const void *self, ir_node *irn, ir_entity *ent)
+{
+	(void) self;
+	(void) irn;
+	(void) ent;
 	/* TODO: set the entity assigned to the frame */
 }
 
@@ -230,7 +235,11 @@ static void arm_set_frame_entity(const void *self, ir_node *irn, ir_entity *ent)
  * This function is called by the generic backend to correct offsets for
  * nodes accessing the stack.
  */
-static void arm_set_stack_bias(const void *self, ir_node *irn, int bias) {
+static void arm_set_stack_bias(const void *self, ir_node *irn, int bias)
+{
+	(void) self;
+	(void) irn;
+	(void) bias;
 	/* TODO: correct offset if irn accesses the stack */
 }
 
@@ -439,7 +448,7 @@ static ir_node *convert_sng_to_int(ir_node *bl, ir_node *arg)
 static void handle_calls(ir_node *call, void *env)
 {
 	arm_code_gen_t *cg = env;
-	int i, j, n, size, idx, flag, n_param, n_res;
+	int i, j, n, size, idx, flag, n_param, n_res, first_variadic;
 	ir_type *mtp, *new_mtd, *new_tp[5];
 	ir_node *new_in[5], **in;
 	ir_node *bl;
@@ -518,7 +527,9 @@ static void handle_calls(ir_node *call, void *env)
 		set_method_res_type(new_mtd, i, get_method_res_type(mtp, i));
 
 	set_method_calling_convention(new_mtd, get_method_calling_convention(mtp));
-	set_method_first_variadic_param_index(new_mtd, get_method_first_variadic_param_index(mtp));
+	first_variadic = get_method_first_variadic_param_index(mtp);
+	if (first_variadic >= 0)
+		set_method_first_variadic_param_index(new_mtd, first_variadic);
 
 	if (is_lowered_type(mtp)) {
 		mtp = get_associated_type(mtp);
@@ -587,6 +598,8 @@ static void *arm_cg_init(be_irg_t *birg) {
 	cg->birg         = birg;
 	cg->int_tp       = int_tp;
 	cg->have_fp_insn = 0;
+	cg->unknown_gp   = NULL;
+	cg->unknown_fpa  = NULL;
 	cg->dump         = (birg->main_env->options->dump_flags & DUMP_BE) ? 1 : 0;
 
 	FIRM_DBG_REGISTER(cg->mod, "firm.be.arm.cg");
@@ -749,7 +762,7 @@ static arm_isa_t arm_isa_template = {
 	0,                     /* use generic register names instead of SP, LR, PC */
 	ARM_FPU_ARCH_FPE,      /* FPU architecture */
 	NULL,                  /* current code generator */
-	{ NULL, },             /* emitter environment */
+	NULL_EMITTER,          /* emitter environment */
 };
 
 /**
@@ -817,6 +830,7 @@ static int arm_get_n_reg_class(const void *self) {
  * Return the register class with requested index.
  */
 static const arch_register_class_t *arm_get_reg_class(const void *self, int i) {
+	(void) self;
 	return i == 0 ? &arm_reg_classes[CLASS_arm_gp] : &arm_reg_classes[CLASS_arm_fpa];
 }
 
@@ -1049,14 +1063,34 @@ void arm_get_call_abi(const void *self, ir_type *method_type, be_abi_call_t *abi
 			be_abi_call_param_stack(abi, i, 4, 0, 0);
 	}
 
-	/* default: return value is in R0 resp. F0 */
-	assert(get_method_n_ress(method_type) < 2);
-	if (get_method_n_ress(method_type) > 0) {
+	/* set return registers */
+	n = get_method_n_ress(method_type);
+
+	assert(n <= 2 && "more than two results not supported");
+
+	/* In case of 64bit returns, we will have two 32bit values */
+	if (n == 2) {
+		tp   = get_method_res_type(method_type, 0);
+		mode = get_type_mode(tp);
+
+		assert(!mode_is_float(mode) && "two FP results not supported");
+
+		tp   = get_method_res_type(method_type, 1);
+		mode = get_type_mode(tp);
+
+		assert(!mode_is_float(mode) && "mixed INT, FP results not supported");
+
+		be_abi_call_res_reg(abi, 0, &arm_gp_regs[REG_R0]);
+		be_abi_call_res_reg(abi, 1, &arm_gp_regs[REG_R1]);
+	} else if (n == 1) {
+		const arch_register_t *reg;
+
 		tp   = get_method_res_type(method_type, 0);
+		assert(is_atomic_type(tp));
 		mode = get_type_mode(tp);
 
-		be_abi_call_res_reg(abi, 0,
-			mode_is_float(mode) ? &arm_fpa_regs[REG_F0] : &arm_gp_regs[REG_R0]);
+		reg = mode_is_float(mode) ? &arm_fpa_regs[REG_F0] : &arm_gp_regs[REG_R0];
+		be_abi_call_res_reg(abi, 0, reg);
 	}
 }