X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;ds=sidebyside;f=ir%2Fbe%2Farm%2Farm_transform.c;h=2ef801958e7d1f878639a674796a6ddd899e92de;hb=ede86ffb1270f07437edcc8ea3dd5d46530f93eb;hp=81665d5e3cf7d74e542d6b6fe2e7a39770f6ef3a;hpb=fad022b108892a74b02bef7dfb13315caef5a3fc;p=libfirm diff --git a/ir/be/arm/arm_transform.c b/ir/be/arm/arm_transform.c index 81665d5e3..2ef801958 100644 --- a/ir/be/arm/arm_transform.c +++ b/ir/be/arm/arm_transform.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved. + * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved. * * This file is part of libFirm. * @@ -132,32 +132,32 @@ static void gen_vals_from_word(unsigned int value, vals *result) /** * Creates a arm_Const node. */ -static ir_node *create_const_node(be_abi_irg_t *abi, dbg_info *dbg, ir_node *block, long value) { +static ir_node *create_const_node(dbg_info *dbg, ir_node *block, long value) { ir_mode *mode = mode_Iu; - tarval *tv = new_tarval_from_long(value, mode); + ir_graph *irg = current_ir_graph; ir_node *res; if (mode_needs_gp_reg(mode)) mode = mode_Iu; - res = new_rd_arm_Mov_i(dbg, current_ir_graph, block, mode, tv); - /* ensure the const is schedules AFTER the barrier */ - add_irn_dep(res, be_abi_get_start_barrier(abi)); + res = new_rd_arm_Mov_i(dbg, irg, block, mode, value); + /* ensure the const is scheduled AFTER the stack frame */ + add_irn_dep(res, get_irg_frame(irg)); return res; } /** * Creates a arm_Const_Neg node. */ -static ir_node *create_const_neg_node(be_abi_irg_t *abi, dbg_info *dbg, ir_node *block, long value) { +static ir_node *create_const_neg_node(dbg_info *dbg, ir_node *block, long value) { ir_mode *mode = mode_Iu; - tarval *tv = new_tarval_from_long(value, mode); + ir_graph *irg = current_ir_graph; ir_node *res; if (mode_needs_gp_reg(mode)) mode = mode_Iu; - res = new_rd_arm_Mvn_i(dbg, current_ir_graph, block, mode, tv); - add_irn_dep(res, be_abi_get_start_barrier(abi)); - /* ensure the const is schedules AFTER the barrier */ + res = new_rd_arm_Mvn_i(dbg, irg, block, mode, value); + /* ensure the const is scheduled AFTER the stack frame */ + add_irn_dep(res, get_irg_frame(irg)); return res; } @@ -173,8 +173,8 @@ static unsigned int arm_encode_imm_w_shift(unsigned int shift, unsigned int imme /** * Decode an immediate with shifter operand */ -unsigned int arm_decode_imm_w_shift(tarval *tv) { - unsigned l = get_tarval_long(tv); +unsigned int arm_decode_imm_w_shift(long imm_value) { + unsigned l = (unsigned)imm_value; unsigned rol = (l & ~0xFF) >> 7; return do_rol(l & 0xFF, rol); @@ -183,7 +183,7 @@ unsigned int arm_decode_imm_w_shift(tarval *tv) { /** * Creates a possible DAG for an constant. */ -static ir_node *create_const_graph_value(be_abi_irg_t *abi, dbg_info *dbg, ir_node *block, unsigned int value) { +static ir_node *create_const_graph_value(dbg_info *dbg, ir_node *block, unsigned int value) { ir_node *result; vals v, vn; int cnt; @@ -194,21 +194,21 @@ static ir_node *create_const_graph_value(be_abi_irg_t *abi, dbg_info *dbg, ir_no if (vn.ops < v.ops) { /* remove bits */ - result = create_const_neg_node(abi, dbg, block, arm_encode_imm_w_shift(vn.shifts[0], vn.values[0])); + result = create_const_neg_node(dbg, block, arm_encode_imm_w_shift(vn.shifts[0], vn.values[0])); for (cnt = 1; cnt < vn.ops; ++cnt) { - tarval *tv = new_tarval_from_long(arm_encode_imm_w_shift(vn.shifts[cnt], vn.values[cnt]), mode); - ir_node *bic_i_node = new_rd_arm_Bic_i(dbg, current_ir_graph, block, result, mode, tv); + long value = arm_encode_imm_w_shift(vn.shifts[cnt], vn.values[cnt]); + ir_node *bic_i_node = new_rd_arm_Bic_i(dbg, current_ir_graph, block, result, mode, value); result = bic_i_node; } } else { /* add bits */ - result = create_const_node(abi, dbg, block, arm_encode_imm_w_shift(v.shifts[0], v.values[0])); + result = create_const_node(dbg, block, arm_encode_imm_w_shift(v.shifts[0], v.values[0])); for (cnt = 1; cnt < v.ops; ++cnt) { - tarval *tv = new_tarval_from_long(arm_encode_imm_w_shift(v.shifts[cnt], v.values[cnt]), mode); - ir_node *orr_i_node = new_rd_arm_Or_i(dbg, current_ir_graph, block, result, mode, tv); + long value = arm_encode_imm_w_shift(v.shifts[cnt], v.values[cnt]); + ir_node *orr_i_node = new_rd_arm_Or_i(dbg, current_ir_graph, block, result, mode, value); result = orr_i_node; } } @@ -220,7 +220,7 @@ static ir_node *create_const_graph_value(be_abi_irg_t *abi, dbg_info *dbg, ir_no * * @param irn a Firm const */ -static ir_node *create_const_graph(be_abi_irg_t *abi, ir_node *irn, ir_node *block) { +static ir_node *create_const_graph(ir_node *irn, ir_node *block) { tarval *tv = get_Const_tarval(irn); ir_mode *mode = get_tarval_mode(tv); int value; @@ -231,25 +231,25 @@ static ir_node *create_const_graph(be_abi_irg_t *abi, ir_node *irn, ir_node *blo tv = tarval_convert_to(tv, mode_Iu); } value = get_tarval_long(tv); - return create_const_graph_value(abi, get_irn_dbg_info(irn), block, value); + return create_const_graph_value(get_irn_dbg_info(irn), block, value); } /** * Create an And that will mask all upper bits */ -static ir_node *gen_zero_extension(be_abi_irg_t *abi, dbg_info *dbg, ir_node *block, ir_node *op, int result_bits) { +static ir_node *gen_zero_extension(dbg_info *dbg, ir_node *block, ir_node *op, int result_bits) { unsigned mask_bits = (1 << result_bits) - 1; - ir_node *mask_node = create_const_graph_value(abi, dbg, block, mask_bits); - return new_rd_arm_And(dbg, current_ir_graph, block, op, mask_node, mode_Iu, ARM_SHF_NONE, NULL); + ir_node *mask_node = create_const_graph_value(dbg, block, mask_bits); + return new_rd_arm_And(dbg, current_ir_graph, block, op, mask_node, mode_Iu, ARM_SHF_NONE, 0); } /** * Generate code for a sign extension. */ -static ir_node *gen_sign_extension(be_abi_irg_t *abi, dbg_info *dbg, ir_node *block, ir_node *op, int result_bits) { +static ir_node *gen_sign_extension(dbg_info *dbg, ir_node *block, ir_node *op, int result_bits) { ir_graph *irg = current_ir_graph; int shift_width = 32 - result_bits; - ir_node *shift_const_node = create_const_graph_value(abi, dbg, block, shift_width); + ir_node *shift_const_node = create_const_graph_value(dbg, block, shift_width); ir_node *lshift_node = new_rd_arm_Shl(dbg, irg, block, op, shift_const_node, mode_Iu); ir_node *rshift_node = new_rd_arm_Shrs(dbg, irg, block, lshift_node, shift_const_node, mode_Iu); return rshift_node; @@ -327,9 +327,9 @@ static ir_node *gen_Conv(ir_node *node) { min_mode = dst_mode; } if (mode_is_signed(min_mode)) { - return gen_sign_extension(env_cg->birg->abi, dbg, block, new_op, min_bits); + return gen_sign_extension(dbg, block, new_op, min_bits); } else { - return gen_zero_extension(env_cg->birg->abi, dbg, block, new_op, min_bits); + return gen_zero_extension(dbg, block, new_op, min_bits); } } else { panic("Cannot handle Conv %+F->%+F with %d->%d bits\n", src_mode, dst_mode, @@ -350,7 +350,7 @@ static int is_shifter_operand(ir_node *n, arm_shift_modifier *pmod) { *pmod = mod; if (mod != ARM_SHF_NONE) { - long v = get_tarval_long(get_arm_value(n)); + long v = get_arm_imm_value(n); if (v < 32) return (int)v; } @@ -379,9 +379,9 @@ static ir_node *gen_Add(ir_node *node) { env_cg->have_fp_insn = 1; if (USE_FPA(env_cg->isa)) { if (is_arm_fpaMvf_i(new_op1)) - return new_rd_arm_fpaAdf_i(dbg, irg, block, new_op2, mode, get_arm_value(new_op1)); + return new_rd_arm_fpaAdf_i(dbg, irg, block, new_op2, mode, get_arm_imm_value(new_op1)); if (is_arm_fpaMvf_i(new_op2)) - return new_rd_arm_fpaAdf_i(dbg, irg, block, new_op1, mode, get_arm_value(new_op2)); + return new_rd_arm_fpaAdf_i(dbg, irg, block, new_op1, mode, get_arm_imm_value(new_op2)); return new_rd_arm_fpaAdf(dbg, irg, block, new_op1, new_op2, mode); } else if (USE_VFP(env_cg->isa)) { assert(mode != mode_E && "IEEE Extended FP not supported"); @@ -397,9 +397,9 @@ static ir_node *gen_Add(ir_node *node) { mode = mode_Iu; if (is_arm_Mov_i(new_op1)) - return new_rd_arm_Add_i(dbg, irg, block, new_op2, mode, get_arm_value(new_op1)); + return new_rd_arm_Add_i(dbg, irg, block, new_op2, mode, get_arm_imm_value(new_op1)); if (is_arm_Mov_i(new_op2)) - return new_rd_arm_Add_i(dbg, irg, block, new_op1, mode, get_arm_value(new_op2)); + return new_rd_arm_Add_i(dbg, irg, block, new_op1, mode, get_arm_imm_value(new_op2)); /* check for MLA */ if (is_arm_Mul(new_op1) && get_irn_n_edges(op1) == 1) { @@ -421,17 +421,17 @@ static ir_node *gen_Add(ir_node *node) { v = is_shifter_operand(new_op1, &mod); if (v) { new_op1 = get_irn_n(new_op1, 0); - return new_rd_arm_Add(dbg, irg, block, new_op2, new_op1, mode, mod, new_tarval_from_long(v, mode_Iu)); + return new_rd_arm_Add(dbg, irg, block, new_op2, new_op1, mode, mod, v); } /* is the second a shifter */ v = is_shifter_operand(new_op2, &mod); if (v) { new_op2 = get_irn_n(new_op2, 0); - return new_rd_arm_Add(dbg, irg, block, new_op1, new_op2, mode, mod, new_tarval_from_long(v, mode_Iu)); + return new_rd_arm_Add(dbg, irg, block, new_op1, new_op2, mode, mod, v); } /* normal ADD */ - return new_rd_arm_Add(dbg, irg, block, new_op1, new_op2, mode, ARM_SHF_NONE, NULL); + return new_rd_arm_Add(dbg, irg, block, new_op1, new_op2, mode, ARM_SHF_NONE, 0); } } @@ -454,9 +454,9 @@ static ir_node *gen_Mul(ir_node *node) { env_cg->have_fp_insn = 1; if (USE_FPA(env_cg->isa)) { if (is_arm_Mov_i(new_op1)) - return new_rd_arm_fpaMuf_i(dbg, irg, block, new_op2, mode, get_arm_value(new_op1)); + return new_rd_arm_fpaMuf_i(dbg, irg, block, new_op2, mode, get_arm_imm_value(new_op1)); if (is_arm_Mov_i(new_op2)) - return new_rd_arm_fpaMuf_i(dbg, irg, block, new_op1, mode, get_arm_value(new_op2)); + return new_rd_arm_fpaMuf_i(dbg, irg, block, new_op1, mode, get_arm_imm_value(new_op2)); return new_rd_arm_fpaMuf(dbg, irg, block, new_op1, new_op2, mode); } else if (USE_VFP(env_cg->isa)) { @@ -494,9 +494,9 @@ static ir_node *gen_Quot(ir_node *node) { env_cg->have_fp_insn = 1; if (USE_FPA(env_cg->isa)) { if (is_arm_Mov_i(new_op1)) - return new_rd_arm_fpaRdf_i(dbg, current_ir_graph, block, new_op2, mode, get_arm_value(new_op1)); + return new_rd_arm_fpaRdf_i(dbg, current_ir_graph, block, new_op2, mode, get_arm_imm_value(new_op1)); if (is_arm_Mov_i(new_op2)) - return new_rd_arm_fpaDvf_i(dbg, current_ir_graph, block, new_op1, mode, get_arm_value(new_op2)); + return new_rd_arm_fpaDvf_i(dbg, current_ir_graph, block, new_op1, mode, get_arm_imm_value(new_op2)); return new_rd_arm_fpaDvf(dbg, current_ir_graph, block, new_op1, new_op2, mode); } else if (USE_VFP(env_cg->isa)) { assert(mode != mode_E && "IEEE Extended FP not supported"); @@ -521,23 +521,23 @@ static ir_node *gen_Quot(ir_node *node) { arm_shift_modifier mod; \ \ if (is_arm_Mov_i(new_op1)) \ - return new_rd_arm_ ## op ## _i(dbg, irg, block, new_op2, mode, get_arm_value(new_op1)); \ + return new_rd_arm_ ## op ## _i(dbg, irg, block, new_op2, mode, get_arm_imm_value(new_op1)); \ if (is_arm_Mov_i(new_op2)) \ - return new_rd_arm_ ## op ## _i(dbg, irg, block, new_op1, mode, get_arm_value(new_op2)); \ + return new_rd_arm_ ## op ## _i(dbg, irg, block, new_op1, mode, get_arm_imm_value(new_op2)); \ /* is the first a shifter */ \ v = is_shifter_operand(new_op1, &mod); \ if (v) { \ new_op1 = get_irn_n(new_op1, 0); \ - return new_rd_arm_ ## op(dbg, irg, block, new_op2, new_op1, mode, mod, new_tarval_from_long(v, mode_Iu)); \ + return new_rd_arm_ ## op(dbg, irg, block, new_op2, new_op1, mode, mod, v); \ } \ /* is the second a shifter */ \ v = is_shifter_operand(new_op2, &mod); \ if (v) { \ new_op2 = get_irn_n(new_op2, 0); \ - return new_rd_arm_ ## op(dbg, irg, block, new_op1, new_op2, mode, mod, new_tarval_from_long(v, mode_Iu)); \ + return new_rd_arm_ ## op(dbg, irg, block, new_op1, new_op2, mode, mod, v); \ } \ /* Normal op */ \ - return new_rd_arm_ ## op(dbg, irg, block, new_op1, new_op2, mode, ARM_SHF_NONE, NULL) \ + return new_rd_arm_ ## op(dbg, irg, block, new_op1, new_op2, mode, ARM_SHF_NONE, 0) \ /** * Creates an ARM And. @@ -588,9 +588,9 @@ static ir_node *gen_Sub(ir_node *node) { env_cg->have_fp_insn = 1; if (USE_FPA(env_cg->isa)) { if (is_arm_Mov_i(new_op1)) - return new_rd_arm_fpaRsf_i(dbg, irg, block, new_op2, mode, get_arm_value(new_op1)); + return new_rd_arm_fpaRsf_i(dbg, irg, block, new_op2, mode, get_arm_imm_value(new_op1)); if (is_arm_Mov_i(new_op2)) - return new_rd_arm_fpaSuf_i(dbg, irg, block, new_op1, mode, get_arm_value(new_op2)); + return new_rd_arm_fpaSuf_i(dbg, irg, block, new_op1, mode, get_arm_imm_value(new_op2)); return new_rd_arm_fpaSuf(dbg, irg, block, new_op1, new_op2, mode); } else if (USE_VFP(env_cg->isa)) { assert(mode != mode_E && "IEEE Extended FP not supported"); @@ -607,24 +607,24 @@ static ir_node *gen_Sub(ir_node *node) { mode = mode_Iu; if (is_arm_Mov_i(new_op1)) - return new_rd_arm_Rsb_i(dbg, irg, block, new_op2, mode, get_arm_value(new_op1)); + return new_rd_arm_Rsb_i(dbg, irg, block, new_op2, mode, get_arm_imm_value(new_op1)); if (is_arm_Mov_i(new_op2)) - return new_rd_arm_Sub_i(dbg, irg, block, new_op1, mode, get_arm_value(new_op2)); + return new_rd_arm_Sub_i(dbg, irg, block, new_op1, mode, get_arm_imm_value(new_op2)); /* is the first a shifter */ v = is_shifter_operand(new_op1, &mod); if (v) { new_op1 = get_irn_n(new_op1, 0); - return new_rd_arm_Rsb(dbg, irg, block, new_op2, new_op1, mode, mod, new_tarval_from_long(v, mode_Iu)); + return new_rd_arm_Rsb(dbg, irg, block, new_op2, new_op1, mode, mod, v); } /* is the second a shifter */ v = is_shifter_operand(new_op2, &mod); if (v) { new_op2 = get_irn_n(new_op2, 0); - return new_rd_arm_Sub(dbg, irg, block, new_op1, new_op2, mode, mod, new_tarval_from_long(v, mode_Iu)); + return new_rd_arm_Sub(dbg, irg, block, new_op1, new_op2, mode, mod, v); } /* normal sub */ - return new_rd_arm_Sub(dbg, irg, block, new_op1, new_op2, mode, ARM_SHF_NONE, NULL); + return new_rd_arm_Sub(dbg, irg, block, new_op1, new_op2, mode, ARM_SHF_NONE, 0); } } @@ -643,7 +643,7 @@ static ir_node *gen_Shl(ir_node *node) { dbg_info *dbg = get_irn_dbg_info(node); if (is_arm_Mov_i(new_op2)) { - return new_rd_arm_Mov(dbg, current_ir_graph, block, new_op1, mode, ARM_SHF_LSL, get_arm_value(new_op2)); + return new_rd_arm_Mov(dbg, current_ir_graph, block, new_op1, mode, ARM_SHF_LSL, get_arm_imm_value(new_op2)); } return new_rd_arm_Shl(dbg, current_ir_graph, block, new_op1, new_op2, mode); } @@ -663,7 +663,7 @@ static ir_node *gen_Shr(ir_node *node) { dbg_info *dbg = get_irn_dbg_info(node); if (is_arm_Mov_i(new_op2)) { - return new_rd_arm_Mov(dbg, current_ir_graph, block, new_op1, mode, ARM_SHF_LSR, get_arm_value(new_op2)); + return new_rd_arm_Mov(dbg, current_ir_graph, block, new_op1, mode, ARM_SHF_LSR, get_arm_imm_value(new_op2)); } return new_rd_arm_Shr(dbg, current_ir_graph, block, new_op1, new_op2, mode); } @@ -683,7 +683,7 @@ static ir_node *gen_Shrs(ir_node *node) { dbg_info *dbg = get_irn_dbg_info(node); if (is_arm_Mov_i(new_op2)) { - return new_rd_arm_Mov(dbg, current_ir_graph, block, new_op1, mode, ARM_SHF_ASR, get_arm_value(new_op2)); + return new_rd_arm_Mov(dbg, current_ir_graph, block, new_op1, mode, ARM_SHF_ASR, get_arm_imm_value(new_op2)); } return new_rd_arm_Shrs(dbg, current_ir_graph, block, new_op1, new_op2, mode); } @@ -698,16 +698,14 @@ static ir_node *gen_Not(ir_node *node) { ir_node *op = get_Not_op(node); ir_node *new_op = be_transform_node(op); dbg_info *dbg = get_irn_dbg_info(node); - tarval *tv = NULL; ir_mode *mode = mode_Iu; arm_shift_modifier mod = ARM_SHF_NONE; int v = is_shifter_operand(new_op, &mod); if (v) { new_op = get_irn_n(new_op, 0); - tv = new_tarval_from_long(v, mode_Iu); } - return new_rd_arm_Mvn(dbg, current_ir_graph, block, new_op, mode, mod, tv); + return new_rd_arm_Mvn(dbg, current_ir_graph, block, new_op, mode, mod, v); } /** @@ -766,7 +764,7 @@ static ir_node *gen_Minus(ir_node *node) { } assert(mode_is_data(mode)); mode = mode_Iu; - return new_rd_arm_Rsb_i(dbg, current_ir_graph, block, new_op, mode, get_mode_null(mode)); + return new_rd_arm_Rsb_i(dbg, current_ir_graph, block, new_op, mode, 0); } /** @@ -955,9 +953,8 @@ static ir_node *gen_Cond(ir_node *node) { set_Proj_proj(proj, pn); } - - const_graph = create_const_graph_value(env_cg->birg->abi, dbg, block, translation); - sub = new_rd_arm_Sub(dbg, irg, block, new_op, const_graph, mode, ARM_SHF_NONE, NULL); + const_graph = create_const_graph_value(dbg, block, translation); + sub = new_rd_arm_Sub(dbg, irg, block, new_op, const_graph, mode, ARM_SHF_NONE, 0); return new_rd_arm_SwitchJmp(dbg, irg, block, sub, n_projs, get_Cond_defaultProj(node) - translation); } } @@ -986,18 +983,6 @@ static ident *get_sc_ident(ir_node *symc) { return NULL; } -enum fpa_immediates { - fpa_null = 0, - fpa_one, - fpa_two, - fpa_three, - fpa_four, - fpa_five, - fpa_ten, - fpa_half, - fpa_max -}; - static tarval *fpa_imm[3][fpa_max]; /** @@ -1026,9 +1011,9 @@ static int is_fpa_immediate(tarval *tv) { for (j = 0; j < fpa_max; ++j) { if (tv == fpa_imm[i][j]) - return res; + return res * j; } - return 0; + return fpa_max; } /** @@ -1048,16 +1033,16 @@ static ir_node *gen_Const(ir_node *node) { tarval *tv = get_Const_tarval(node); int imm = is_fpa_immediate(tv); - if (imm) { + if (imm != fpa_max) { if (imm > 0) - node = new_rd_arm_fpaMvf_i(dbg, irg, block, tv); + node = new_rd_arm_fpaMvf_i(dbg, irg, block, mode, imm); else - node = new_rd_arm_fpaMnf_i(dbg, irg, block, tv); + node = new_rd_arm_fpaMnf_i(dbg, irg, block, mode, -imm); } else { node = new_rd_arm_fpaConst(dbg, irg, block, tv); } - /* ensure the const is schedules AFTER the barrier */ - add_irn_dep(node, be_abi_get_start_barrier(env_cg->birg->abi)); + /* ensure the const is scheduled AFTER the stack frame */ + add_irn_dep(node, get_irg_frame(irg)); return node; } else if (USE_VFP(env_cg->isa)) { @@ -1068,7 +1053,7 @@ static ir_node *gen_Const(ir_node *node) { panic("Softfloat not supported yet\n"); } } - return create_const_graph(env_cg->birg->abi, node, block); + return create_const_graph(node, block); } /** @@ -1080,11 +1065,12 @@ static ir_node *gen_SymConst(ir_node *node) { ir_node *block = be_transform_node(get_nodes_block(node)); ir_mode *mode = mode_Iu; dbg_info *dbg = get_irn_dbg_info(node); + ir_graph *irg = current_ir_graph; ir_node *res; - res = new_rd_arm_SymConst(dbg, current_ir_graph, block, mode, get_sc_ident(node)); - add_irn_dep(res, be_abi_get_start_barrier(env_cg->birg->abi)); - /* ensure the const is schedules AFTER the barrier */ + res = new_rd_arm_SymConst(dbg, irg, block, mode, get_sc_ident(node)); + /* ensure the const is scheduled AFTER the stack frame */ + add_irn_dep(res, get_irg_frame(irg)); return res; } @@ -1114,7 +1100,7 @@ static ir_node *gen_CopyB(ir_node *node) { new_rd_arm_EmptyReg(dbg, irg, block, mode_Iu), new_rd_arm_EmptyReg(dbg, irg, block, mode_Iu), new_rd_arm_EmptyReg(dbg, irg, block, mode_Iu), - new_mem, new_tarval_from_long(size, mode_Iu)); + new_mem, size); } @@ -1205,10 +1191,10 @@ static ir_node *gen_be_FrameAddr(ir_node *node) { is relative. Both must be merged */ offset += get_sp_expand_offset(op); } - cnst = create_const_graph_value(env_cg->birg->abi, dbg, block, (unsigned)offset); + cnst = create_const_graph_value(dbg, block, (unsigned)offset); if (is_arm_Mov_i(cnst)) - return new_rd_arm_Add_i(dbg, current_ir_graph, block, new_op, mode, get_arm_value(cnst)); - return new_rd_arm_Add(dbg, current_ir_graph, block, new_op, cnst, mode, ARM_SHF_NONE, NULL); + return new_rd_arm_Add_i(dbg, current_ir_graph, block, new_op, mode, get_arm_imm_value(cnst)); + return new_rd_arm_Add(dbg, current_ir_graph, block, new_op, cnst, mode, ARM_SHF_NONE, 0); } #if 0 @@ -1411,7 +1397,7 @@ static ir_node *gen_Proj_Quot(ir_node *node) { } /** - * Transform the Projs of an AddSP. + * Transform the Projs of a be_AddSP. */ static ir_node *gen_Proj_be_AddSP(ir_node *node) { ir_node *block = be_transform_node(get_nodes_block(node)); @@ -1421,12 +1407,16 @@ static ir_node *gen_Proj_be_AddSP(ir_node *node) { dbg_info *dbgi = get_irn_dbg_info(node); long proj = get_Proj_proj(node); - if (proj == pn_be_AddSP_res) { - ir_node *res = new_rd_Proj(dbgi, irg, block, new_pred, mode_Iu, pn_arm_AddSP_stack); + if (proj == pn_be_AddSP_sp) { + ir_node *res = new_rd_Proj(dbgi, irg, block, new_pred, mode_Iu, + pn_arm_SubSP_stack); arch_set_irn_register(env_cg->arch_env, res, &arm_gp_regs[REG_SP]); return res; + } else if(proj == pn_be_AddSP_res) { + return new_rd_Proj(dbgi, irg, block, new_pred, mode_Iu, + pn_arm_SubSP_addr); } else if (proj == pn_be_AddSP_M) { - return new_rd_Proj(dbgi, irg, block, new_pred, mode_M, pn_arm_AddSP_M); + return new_rd_Proj(dbgi, irg, block, new_pred, mode_M, pn_arm_SubSP_M); } assert(0); @@ -1434,7 +1424,7 @@ static ir_node *gen_Proj_be_AddSP(ir_node *node) { } /** - * Transform the Projs of a SubSP. + * Transform the Projs of a be_SubSP. */ static ir_node *gen_Proj_be_SubSP(ir_node *node) { ir_node *block = be_transform_node(get_nodes_block(node)); @@ -1446,11 +1436,11 @@ static ir_node *gen_Proj_be_SubSP(ir_node *node) { if (proj == pn_be_SubSP_sp) { ir_node *res = new_rd_Proj(dbgi, irg, block, new_pred, mode_Iu, - pn_arm_SubSP_stack); + pn_arm_AddSP_stack); arch_set_irn_register(env_cg->arch_env, res, &arm_gp_regs[REG_SP]); return res; } else if (proj == pn_be_SubSP_M) { - return new_rd_Proj(dbgi, irg, block, new_pred, mode_M, pn_arm_SubSP_M); + return new_rd_Proj(dbgi, irg, block, new_pred, mode_M, pn_arm_AddSP_M); } assert(0); @@ -1712,7 +1702,6 @@ static void arm_register_transformers(void) { GEN(be_FrameAddr); //GEN(be_Call); //GEN(be_Return); - BAD(be_StackParam); /* unsupported yet */ GEN(be_AddSP); GEN(be_SubSP); GEN(be_Copy);